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Commit 72fc0de

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SourMesenSourMesen
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Allow dipswitches to be manually configured for mappers that use them (instead of incrementing the value on reset)
1 parent c5e4de9 commit 72fc0de

24 files changed

+92
-114
lines changed

‎Core/BaseMapper.cpp‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -405,6 +405,12 @@ uint8_t BaseMapper::GetPowerOnByte(uint8_t defaultValue)
405405
return defaultValue;
406406
}
407407
}
408+
409+
uint32_t BaseMapper::GetDipSwitches()
410+
{
411+
uint32_t mask = (1 << GetDipSwitchCount()) - 1;
412+
return _console->GetSettings()->GetDipSwitches() & mask;
413+
}
408414

409415
bool BaseMapper::HasBattery()
410416
{
@@ -768,6 +774,11 @@ RomInfo BaseMapper::GetRomInfo()
768774
return _romInfo;
769775
}
770776

777+
uint32_t BaseMapper::GetMapperDipSwitchCount()
778+
{
779+
return GetDipSwitchCount();
780+
}
781+
771782
MirroringType BaseMapper::GetMirroringType()
772783
{
773784
return _mirroringType;

‎Core/BaseMapper.h‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -97,6 +97,8 @@ class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificat
9797
virtual uint16_t RegisterEndAddress() { return 0xFFFF; }
9898
virtual bool AllowRegisterRead() { return false; }
9999

100+
virtual uint32_t GetDipSwitchCount() { return 0; }
101+
100102
virtual bool HasBusConflicts() { return false; }
101103

102104
uint8_t InternalReadRam(uint16_t addr);
@@ -129,7 +131,8 @@ class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificat
129131
uint32_t GetCHRPageCount();
130132

131133
uint8_t GetPowerOnByte(uint8_t defaultValue = 0);
132-
134+
uint32_t GetDipSwitches();
135+
133136
void SetupDefaultWorkRam();
134137

135138
void RestoreOriginalPrgRam();
@@ -151,7 +154,7 @@ class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificat
151154
public:
152155
static constexpr uint32_t NametableCount = 0x10;
153156
static constexpr uint32_t NametableSize = 0x400;
154-
157+
155158
void Initialize(RomData &romData);
156159

157160
virtual ~BaseMapper();
@@ -173,6 +176,7 @@ class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificat
173176

174177
shared_ptr<BaseControlDevice> GetMapperControlDevice();
175178
RomInfo GetRomInfo();
179+
uint32_t GetMapperDipSwitchCount();
176180

177181
__forceinline uint8_t ReadRAM(uint16_t addr) override;
178182
uint8_t PeekRAM(uint16_t addr) override;

‎Core/Bmc70in1.h‎

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -9,10 +9,10 @@ class Bmc70in1 : public BaseMapper
99
uint8_t _outerBank;
1010
uint8_t _prgReg;
1111
uint8_t _chrReg;
12-
uint8_t _dipSwitch;
1312
bool _useOuterBank;
1413

1514
protected:
15+
uint32_t GetDipSwitchCount() override { return 4; }
1616
uint16_t GetPRGPageSize() override { return 0x4000; }
1717
uint16_t GetCHRPageSize() override { return 0x2000; }
1818
bool AllowRegisterRead() override { return true; }
@@ -24,10 +24,8 @@ class Bmc70in1 : public BaseMapper
2424

2525
if(HasChrRom()) {
2626
_useOuterBank = false;
27-
_dipSwitch = 0x0C;
2827
} else {
2928
_useOuterBank = true;
30-
_dipSwitch = 0x05;
3129
}
3230

3331
SelectCHRPage(0, 0);
@@ -37,7 +35,7 @@ class Bmc70in1 : public BaseMapper
3735
void StreamState(bool saving) override
3836
{
3937
BaseMapper::StreamState(saving);
40-
Stream(_bankMode, _outerBank, _prgReg, _chrReg, _dipSwitch);
38+
Stream(_bankMode, _outerBank, _prgReg, _chrReg);
4139
}
4240

4341
void Reset(bool softReset) override
@@ -46,7 +44,6 @@ class Bmc70in1 : public BaseMapper
4644

4745
_bankMode = 0;
4846
_outerBank = 0;
49-
_dipSwitch = (_dipSwitch + 1) & 0x0F;
5047
}
5148

5249
void UpdateState()
@@ -75,7 +72,7 @@ class Bmc70in1 : public BaseMapper
7572
uint8_t ReadRegister(uint16_t addr) override
7673
{
7774
if(_bankMode == 0x10) {
78-
return InternalReadRam((addr & 0xFFF0) | _dipSwitch);
75+
return InternalReadRam((addr & 0xFFF0) | GetDipSwitches());
7976
} else {
8077
return InternalReadRam(addr);
8178
}

‎Core/Bmc8157.h‎

Lines changed: 3 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -7,9 +7,9 @@ class Bmc8157 : public BaseMapper
77
{
88
private:
99
uint16_t _lastAddr;
10-
bool _dipSwitch;
1110

1211
protected:
12+
uint32_t GetDipSwitchCount() override { return 1; }
1313
uint16_t GetPRGPageSize() override { return 0x4000; }
1414
uint16_t GetCHRPageSize() override { return 0x2000; }
1515

@@ -20,15 +20,10 @@ class Bmc8157 : public BaseMapper
2020
SelectCHRPage(0, 0);
2121
}
2222

23-
void Reset(bool softReset) override
24-
{
25-
_dipSwitch = !_dipSwitch;
26-
}
27-
2823
void StreamState(bool saving) override
2924
{
3025
BaseMapper::StreamState(saving);
31-
Stream(_lastAddr, _dipSwitch);
26+
Stream(_lastAddr);
3227

3328
if(!saving) {
3429
UpdateState();
@@ -51,7 +46,7 @@ class Bmc8157 : public BaseMapper
5146
baseBank = 7;
5247
}
5348

54-
if(outer512Prg && _prgSize <= 1024 * 512 && _dipSwitch) {
49+
if(outer512Prg && _prgSize <= 1024 * 512 && GetDipSwitches() != 0) {
5550
RemoveCpuMemoryMapping(0x8000, 0xFFFF);
5651
} else {
5752
SelectPRGPage(0, (outer512Prg << 6) | (outer128Prg << 3) | innerPrg0);

‎Core/BmcHpxx.h‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -7,16 +7,15 @@ class BmcHpxx : public MMC3
77
private:
88
uint8_t _exRegs[5];
99
bool _locked;
10-
uint8_t _dipSwitch;
1110

1211
protected:
12+
uint32_t GetDipSwitchCount() override { return 4; }
1313
bool AllowRegisterRead() override { return true; }
1414

1515
void InitMapper() override
1616
{
1717
memset(_exRegs, 0, sizeof(_exRegs));
1818
_locked = false;
19-
_dipSwitch = 0;
2019

2120
MMC3::InitMapper();
2221
AddRegisterRange(0x5000, 0x5FFF, MemoryOperation::Any);
@@ -28,15 +27,14 @@ class BmcHpxx : public MMC3
2827
MMC3::Reset(softReset);
2928
memset(_exRegs, 0, sizeof(_exRegs));
3029
_locked = false;
31-
_dipSwitch = (_dipSwitch + 1) & 0x0F;
3230
MMC3::ResetMmc3();
3331
UpdateState();
3432
}
3533

3634
void StreamState(bool saving) override
3735
{
3836
MMC3::StreamState(saving);
39-
Stream(_exRegs[0], _exRegs[1], _exRegs[2], _exRegs[3], _exRegs[4], _locked, _dipSwitch);
37+
Stream(_exRegs[0], _exRegs[1], _exRegs[2], _exRegs[3], _exRegs[4], _locked);
4038
}
4139

4240
void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default) override
@@ -94,7 +92,7 @@ class BmcHpxx : public MMC3
9492

9593
uint8_t ReadRegister(uint16_t addr) override
9694
{
97-
return _dipSwitch;
95+
return GetDipSwitches();
9896
}
9997

10098
void WriteRegister(uint16_t addr, uint8_t value) override

‎Core/Bs5.h‎

Lines changed: 2 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -4,10 +4,8 @@
44

55
class Bs5 : public BaseMapper
66
{
7-
private:
8-
uint8_t _dipSwitch = 0;
9-
107
protected:
8+
uint32_t GetDipSwitchCount() override { return 2; }
119
uint16_t GetPRGPageSize() override { return 0x2000; }
1210
uint16_t GetCHRPageSize() override { return 0x800; }
1311

@@ -19,19 +17,6 @@ class Bs5 : public BaseMapper
1917
}
2018
}
2119

22-
void StreamState(bool saving) override
23-
{
24-
BaseMapper::StreamState(saving);
25-
Stream(_dipSwitch);
26-
}
27-
28-
void Reset(bool softReset) override
29-
{
30-
if(softReset) {
31-
_dipSwitch = (_dipSwitch + 1) & 0x03;
32-
}
33-
}
34-
3520
void WriteRegister(uint16_t addr, uint8_t value) override
3621
{
3722
int bank = (addr >> 10) & 0x03;
@@ -41,7 +26,7 @@ class Bs5 : public BaseMapper
4126
break;
4227

4328
case 0xA000:
44-
if(addr & (1 << (_dipSwitch + 4))) {
29+
if(addr & (1 << (GetDipSwitches() + 4))) {
4530
SelectPRGPage(bank, addr & 0x0F);
4631
}
4732
break;

‎Core/CPU.cpp‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -395,13 +395,15 @@ void CPU::StreamState(bool saving)
395395
bool overclockAdjustApu = settings->GetOverclockAdjustApu();
396396
uint32_t extraScanlinesBeforeNmi = settings->GetPpuExtraScanlinesBeforeNmi();
397397
uint32_t extraScanlinesAfterNmi = settings->GetPpuExtraScanlinesAfterNmi();
398+
uint32_t dipSwitches = _console->GetSettings()->GetDipSwitches();
398399

399400
Stream(_state.PC, _state.SP, _state.PS, _state.A, _state.X, _state.Y, _cycleCount, _state.NMIFlag,
400401
_state.IRQFlag, _dmcCounter, _dmcDmaRunning, _spriteDmaCounter, _spriteDmaTransfer,
401-
overclockRate, overclockAdjustApu, extraScanlinesBeforeNmi, extraScanlinesBeforeNmi);
402+
overclockRate, overclockAdjustApu, extraScanlinesBeforeNmi, extraScanlinesBeforeNmi, dipSwitches);
402403

403404
if(!saving) {
404405
settings->SetOverclockRate(overclockRate, overclockAdjustApu);
405406
settings->SetPpuNmiConfig(extraScanlinesBeforeNmi, extraScanlinesAfterNmi);
407+
settings->SetDipSwitches(dipSwitches);
406408
}
407409
}

‎Core/Console.cpp‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1243,6 +1243,20 @@ bool Console::UpdateHdPackMode()
12431243
return modeChanged;
12441244
}
12451245

1246+
uint32_t Console::GetDipSwitchCount()
1247+
{
1248+
shared_ptr<ControlManager> controlManager = _controlManager;
1249+
shared_ptr<BaseMapper> mapper = _mapper;
1250+
1251+
if(std::dynamic_pointer_cast<VsControlManager>(controlManager)) {
1252+
return IsDualSystem() ? 16 : 8;
1253+
} else if(mapper) {
1254+
return mapper->GetMapperDipSwitchCount();
1255+
}
1256+
1257+
return 0;
1258+
}
1259+
12461260
ConsoleFeatures Console::GetAvailableFeatures()
12471261
{
12481262
ConsoleFeatures features = ConsoleFeatures::None;

‎Core/Console.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,7 @@ class Console : public std::enable_shared_from_this<Console>
164164
return std::dynamic_pointer_cast<T>(_systemActionManager);
165165
}
166166

167+
uint32_t GetDipSwitchCount();
167168
ConsoleFeatures GetAvailableFeatures();
168169
void InputBarcode(uint64_t barcode, uint32_t digitCount);
169170

‎Core/Eh8813A.h‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5,37 +5,35 @@
55
class Eh8813A : public BaseMapper
66
{
77
private:
8-
uint8_t _dipSwitch;
98
bool _alterReadAddress;
109

1110
protected:
11+
uint32_t GetDipSwitchCount() override { return 4; }
1212
uint16_t GetPRGPageSize() override { return 0x4000; }
1313
uint16_t GetCHRPageSize() override { return 0x2000; }
1414
bool AllowRegisterRead() override { return true; }
1515

1616
void InitMapper() override
1717
{
18-
_dipSwitch = -1;
1918
SetMirroringType(MirroringType::Vertical);
2019
}
2120

2221
void Reset(bool softReset) override
2322
{
2423
WriteRegister(0x8000, 0);
25-
_dipSwitch++;
2624
_alterReadAddress = false;
2725
}
2826

2927
void StreamState(bool saving) override
3028
{
3129
BaseMapper::StreamState(saving);
32-
Stream(_dipSwitch, _alterReadAddress);
30+
Stream(_alterReadAddress);
3331
}
3432

3533
uint8_t ReadRegister(uint16_t addr) override
3634
{
3735
if(_alterReadAddress) {
38-
addr = (addr & 0xFFF0) + _dipSwitch;
36+
addr = (addr & 0xFFF0) + GetDipSwitches();
3937
}
4038
return InternalReadRam(addr);
4139
}

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