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gerekongerekon
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Merge branch 'bugfix/oocd_config_file_for_esp32s3' into 'master'
docs/esp32s3: Fixes OpenOCD configuration files names See merge request espressif/esp-idf!15478
2 parents 7c3a379 + 6d9fbc3 commit 3af4c22

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‎docs/en/api-guides/jtag-debugging/esp32s3.inc‎

Lines changed: 33 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@
1212
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::
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15-
openocd -f board/esp32s3.cfg
15+
openocd -f board/esp32s3-builtin.cfg
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.. |run-openocd-device-name| replace:: ESP32-S3
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@@ -22,59 +22,66 @@
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::
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25-
user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32s3.cfg
26-
Open On-Chip Debugger v0.10.0-esp32-20200420 (2020-04-20-16:15)
25+
user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32s3-builtin.cfg
26+
Open On-Chip Debugger v0.10.0-esp32-20210902 (2021-10-05-23:44)
2727
Licensed under GNU GPL v2
2828
For bug reports, read
29-
http://openocd.org/doc/doxygen/bugs.html
30-
none separate
31-
adapter speed: 20000 kHz
32-
force hard breakpoints
33-
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
34-
Info : clock speed 20000 kHz
29+
http://openocd.org/doc/doxygen/bugs.html
30+
debug_level: 2
31+
32+
Info : only one transport option; autoselect 'jtag'
33+
Warn : Transport "jtag" was already selected
34+
Info : Listening on port 6666 for tcl connections
35+
Info : Listening on port 4444 for telnet connections
36+
Info : esp_usb_jtag: Device found. Base speed 40000KHz, div range 1 to 255
37+
Info : clock speed 40000 kHz
3538
Info : JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
36-
Info : esp32s3: Debug controller was reset (pwrstat=0x5F, after clear 0x0F).
37-
Info : esp32s3: Core was reset (pwrstat=0x5F, after clear 0x0F).
39+
Info : JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
40+
Info : esp32s3.cpu0: Debug controller was reset.
41+
Info : esp32s3.cpu0: Core was reset.
42+
Info : esp32s3.cpu1: Debug controller was reset.
43+
Info : esp32s3.cpu1: Core was reset.
44+
Info : Listening on port 3333 for gdb connections
3845
39-
.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32s3.cfg``
46+
.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32s3-builtin.cfg``
4047

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---
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.. run-openocd-upload
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::
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47-
openocd -f board/esp32s3.cfg -c "program_esp filename.bin 0x10000 verify exit"
54+
openocd -f board/esp32s3-builtin.cfg -c "program_esp filename.bin 0x10000 verify exit"
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---
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.. run-openocd-src-linux
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.. code-block:: bash
5461

55-
src/openocd -f board/esp32s3.cfg
62+
src/openocd -f board/esp32s3-builtin.cfg
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---
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.. run-openocd-src-win
6067

6168
.. code-block:: batch
6269

63-
src\openocd -f board/esp32s3.cfg
70+
src\openocd -f board/esp32s3-builtin.cfg
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---
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.. idf-py-openocd-default-cfg
6875

69-
.. |idf-py-def-cfg| replace:: ``-f board/esp32s3.cfg``
76+
.. |idf-py-def-cfg| replace:: ``-f board/esp32s3-builtin.cfg``
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---
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.. run-openocd-appimage-offset
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::
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77-
openocd -f board/esp32s3.cfg -c "init; halt; esp appimage_offset 0x210000"
84+
openocd -f board/esp32s3-builtin.cfg -c "init; halt; esp appimage_offset 0x210000"
7885

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---
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@@ -86,14 +93,16 @@
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8794
* - Name
8895
- Description
89-
* - ``board/esp32s3.cfg``
90-
- Board configuration file for ESP32-S3, includes target and adapter configuration.
96+
* - ``board/esp32s3-builtin.cfg``
97+
- Board configuration file for ESP32-S3 for debugging via builtin USB JTAG, includes target and adapter configuration.
98+
* - ``board/esp32s3-ftdi.cfg``
99+
- Board configuration file for ESP32-S3 for via externally connected FTDI-based probe like ESP-Prog, includes target and adapter configuration.
91100
* - ``target/esp32s3.cfg``
92101
- ESP32-S3 target configuration file. Can be used together with one of the ``interface/`` configuration files.
93-
* - ``interface/ftdi/esp32s3.cfg``
94-
- JTAG adapter configuration file for ESP32-S3 board.
102+
* - ``interface/ftdi/esp_usb_jtag.cfg``
103+
- JTAG adapter configuration file for ESP32-S3 builtin USB JTAG.
95104
* - ``interface/ftdi/esp32_devkitj_v1.cfg``
96-
- JTAG adapter configuration file for ESP-Prog boards.
105+
- JTAG adapter configuration file for ESP-Prog debug adapter board.
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---
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@@ -129,15 +138,15 @@
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::
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132-
openocd -l openocd_log.txt -d3 -f board/esp32s3.cfg
141+
openocd -l openocd_log.txt -d3 -f board/esp32s3-builtin.cfg
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---
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.. run-openocd-d3-tee
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::
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140-
openocd -d3 -f board/esp32s3.cfg 2>&1 | tee openocd.log
149+
openocd -d3 -f board/esp32s3-builtin.cfg 2>&1 | tee openocd.log
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---
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‎docs/zh_CN/api-guides/jtag-debugging/esp32s3.inc‎

Lines changed: 33 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@
1212
1313
::
1414
15-
openocd -f board/esp32s3.cfg
15+
openocd -f board/esp32s3-builtin.cfg
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.. |run-openocd-device-name| replace:: ESP32-S3
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@@ -22,59 +22,66 @@
2222
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::
2424
25-
user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32s3.cfg
26-
Open On-Chip Debugger v0.10.0-esp32-20200420 (2020-04-20-16:15)
25+
user-name@computer-name:~/esp/esp-idf$ openocd -f board/esp32s3-builtin.cfg
26+
Open On-Chip Debugger v0.10.0-esp32-20210902 (2021-10-05-23:44)
2727
Licensed under GNU GPL v2
2828
For bug reports, read
29-
http://openocd.org/doc/doxygen/bugs.html
30-
none separate
31-
adapter speed: 20000 kHz
32-
force hard breakpoints
33-
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
34-
Info : clock speed 20000 kHz
29+
http://openocd.org/doc/doxygen/bugs.html
30+
debug_level: 2
31+
32+
Info : only one transport option; autoselect 'jtag'
33+
Warn : Transport "jtag" was already selected
34+
Info : Listening on port 6666 for tcl connections
35+
Info : Listening on port 4444 for telnet connections
36+
Info : esp_usb_jtag: Device found. Base speed 40000KHz, div range 1 to 255
37+
Info : clock speed 40000 kHz
3538
Info : JTAG tap: esp32s3.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
36-
Info : esp32s3: Debug controller was reset (pwrstat=0x5F, after clear 0x0F).
37-
Info : esp32s3: Core was reset (pwrstat=0x5F, after clear 0x0F).
39+
Info : JTAG tap: esp32s3.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
40+
Info : esp32s3.cpu0: Debug controller was reset.
41+
Info : esp32s3.cpu0: Core was reset.
42+
Info : esp32s3.cpu1: Debug controller was reset.
43+
Info : esp32s3.cpu1: Core was reset.
44+
Info : Listening on port 3333 for gdb connections
3845
39-
.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32s3.cfg``
46+
.. |run-openocd-cfg-file-err| replace:: ``Can't find board/esp32s3-builtin.cfg``
4047

4148
---
4249

4350
.. run-openocd-upload
4451

4552
::
4653

47-
openocd -f board/esp32s3.cfg -c "program_esp filename.bin 0x10000 verify exit"
54+
openocd -f board/esp32s3-builtin.cfg -c "program_esp filename.bin 0x10000 verify exit"
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---
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.. run-openocd-src-linux
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.. code-block:: bash
5461

55-
src/openocd -f board/esp32s3.cfg
62+
src/openocd -f board/esp32s3-builtin.cfg
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---
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.. run-openocd-src-win
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.. code-block:: batch
6269

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src\openocd -f board/esp32s3.cfg
70+
src\openocd -f board/esp32s3-builtin.cfg
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---
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.. idf-py-openocd-default-cfg
6875

69-
.. |idf-py-def-cfg| replace:: ``-f board/esp32s3.cfg``
76+
.. |idf-py-def-cfg| replace:: ``-f board/esp32s3-builtin.cfg``
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---
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.. run-openocd-appimage-offset
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::
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77-
openocd -f board/esp32s3.cfg -c "init; halt; esp appimage_offset 0x210000"
84+
openocd -f board/esp32s3-builtin.cfg -c "init; halt; esp appimage_offset 0x210000"
7885

7986
---
8087

@@ -86,14 +93,16 @@
8693

8794
* - Name
8895
- Description
89-
* - ``board/esp32s3.cfg``
90-
- Board configuration file for ESP32-S3, includes target and adapter configuration.
96+
* - ``board/esp32s3-builtin.cfg``
97+
- Board configuration file for ESP32-S3 for debugging via builtin USB JTAG, includes target and adapter configuration.
98+
* - ``board/esp32s3-ftdi.cfg``
99+
- Board configuration file for ESP32-S3 for via externally connected FTDI-based probe like ESP-Prog, includes target and adapter configuration.
91100
* - ``target/esp32s3.cfg``
92101
- ESP32-S3 target configuration file. Can be used together with one of the ``interface/`` configuration files.
93-
* - ``interface/ftdi/esp32s3.cfg``
94-
- JTAG adapter configuration file for ESP32-S3 board.
102+
* - ``interface/ftdi/esp_usb_jtag.cfg``
103+
- JTAG adapter configuration file for ESP32-S3 builtin USB JTAG.
95104
* - ``interface/ftdi/esp32_devkitj_v1.cfg``
96-
- JTAG adapter configuration file for ESP-Prog boards.
105+
- JTAG adapter configuration file for ESP-Prog debug adapter board.
97106

98107
---
99108

@@ -126,15 +135,15 @@
126135

127136
::
128137

129-
openocd -l openocd_log.txt -d3 -f board/esp32s3.cfg
138+
openocd -l openocd_log.txt -d3 -f board/esp32s3-builtin.cfg
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---
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.. run-openocd-d3-tee
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::
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137-
openocd -d3 -f board/esp32s3.cfg 2>&1 | tee openocd.log
146+
openocd -d3 -f board/esp32s3-builtin.cfg 2>&1 | tee openocd.log
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---
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