From 496c74aff19a775b8eded4373450319259affc4f Mon Sep 17 00:00:00 2001 From: Huang Qi Date: Fri, 10 Jan 2025 14:14:03 +0800 Subject: [PATCH 1/2] armv7-a.cmake: Improve FPU options table formatting and readability Reformatted the FPU options table to use a clearer markdown-style table format with proper alignment and column headers. Added visual separators (~~~) to make the table stand out from surrounding code. Improved consistency in column widths and fixed line wrapping for better readability. Signed-off-by: Huang Qi --- arch/arm/src/cmake/armv7-a.cmake | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm/src/cmake/armv7-a.cmake b/arch/arm/src/cmake/armv7-a.cmake index 88ac27dfcd7d8..a061cdffe8921 100644 --- a/arch/arm/src/cmake/armv7-a.cmake +++ b/arch/arm/src/cmake/armv7-a.cmake @@ -36,12 +36,15 @@ if(NOT CONFIG_ARM_DPFPU32) set(ARCHFPUD16 -d16) endif() -# Cortex-A5 | -mfpu=vfpv4-fp16 | -mfpu=vfpv4-d16-fp16 | -mfpu=neon-fp16 -# Cortex-A7 | -mfpu=vfpv4 | -mfpu=vfpv4-d16 | -mfpu=neon-vfpv4 -# Cortex-A8 | -mfpu=vfpv3 | | -mfpu=neon (alias for -# neon-vfpv3) Cortex-A9 | -mfpu=vfpv3-fp16 | -mfpu=vfpv3-d16-fp16 | -# -mfpu=neon-fp16 Cortex-A15 | -mfpu=vfpv4 | | -# -mfpu=neon-vfpv4 +# ~~~ +# | Cortex | FPU Option 1 | FPU Option 2 | FPU Option 3 | +# |--------|--------------------|------------------------|-----------------------| +# | A5 | -mfpu=vfpv4-fp16 | -mfpu=vfpv4-d16-fp16 | -mfpu=neon-fp16 | +# | A7 | -mfpu=vfpv4 | -mfpu=vfpv4-d16 | -mfpu=neon-vfpv4 | +# | A8 | -mfpu=vfpv3 | | -mfpu=neon (alias for neon-vfpv3) | +# | A9 | -mfpu=vfpv3-fp16 | -mfpu=vfpv3-d16-fp16 | -mfpu=neon-fp16 | +# | A15 | -mfpu=vfpv4 | | -mfpu=neon-vfpv4 | +# ~~~ if(CONFIG_ARCH_FPU) if(CONFIG_ARM_FPU_ABI_SOFT) From 4ef9495f83e23a89d70264b9f6a9ac2bce456209 Mon Sep 17 00:00:00 2001 From: Huang Qi Date: Fri, 10 Jan 2025 14:17:47 +0800 Subject: [PATCH 2/2] arch/arm: Add LLVM configuration to CMake Added LLVM-specific configuration variables to ARM architecture CMake files: - LLVM_ARCHTYPE for architecture variant (thumbv6m, thumbv7a, etc) - LLVM_CPUTYPE for CPU target (cortex-m0, cortex-a5, etc) - LLVM_ABITYPE for ABI (eabi/eabihf) These changes enable LLVM/Clang toolchain support while maintaining compatibility with existing GCC configurations. The LLVM variables are set based on the same architecture/CPU/FPU configurations used for GCC flags. Signed-off-by: Huang Qi --- arch/arm/src/cmake/armv6-m.cmake | 5 +++++ arch/arm/src/cmake/armv7-a.cmake | 16 ++++++++++++++++ arch/arm/src/cmake/armv7-m.cmake | 19 +++++++++++++++++++ arch/arm/src/cmake/armv8-m.cmake | 25 +++++++++++++++++++++++++ 4 files changed, 65 insertions(+) diff --git a/arch/arm/src/cmake/armv6-m.cmake b/arch/arm/src/cmake/armv6-m.cmake index 32596ab689128..5d52da216da4f 100644 --- a/arch/arm/src/cmake/armv6-m.cmake +++ b/arch/arm/src/cmake/armv6-m.cmake @@ -21,3 +21,8 @@ # ############################################################################## add_compile_options(-mcpu=cortex-m0 -mthumb -mfloat-abi=soft) + +# LLVM Configuration +set(LLVM_ARCHTYPE thumbv6m) +set(LLVM_ABITYPE eabi) +set(LLVM_CPUTYPE cortex-m0) diff --git a/arch/arm/src/cmake/armv7-a.cmake b/arch/arm/src/cmake/armv7-a.cmake index a061cdffe8921..ddd02c324bf5f 100644 --- a/arch/arm/src/cmake/armv7-a.cmake +++ b/arch/arm/src/cmake/armv7-a.cmake @@ -24,12 +24,28 @@ set(PLATFORM_FLAGS) if(CONFIG_ARCH_CORTEXA5) list(APPEND PLATFORM_FLAGS -mcpu=cortex-a5) + set(LLVM_CPUTYPE cortex-a5) elseif(CONFIG_ARCH_CORTEXA7) list(APPEND PLATFORM_FLAGS -mcpu=cortex-a7) + set(LLVM_CPUTYPE cortex-a7) elseif(CONFIG_ARCH_CORTEXA8) list(APPEND PLATFORM_FLAGS -mcpu=cortex-a8) + set(LLVM_CPUTYPE cortex-a8) elseif(CONFIG_ARCH_CORTEXA9) list(APPEND PLATFORM_FLAGS -mcpu=cortex-a9) + set(LLVM_CPUTYPE cortex-a9) +endif() + +if(CONFIG_ARM_THUMB) + set(LLVM_ARCHTYPE thumbv7a) +else() + set(LLVM_ARCHTYPE armv7-a) +endif() + +if(CONFIG_ARCH_FPU) + set(LLVM_ABITYPE eabihf) +else() + set(LLVM_ABITYPE eabi) endif() if(NOT CONFIG_ARM_DPFPU32) diff --git a/arch/arm/src/cmake/armv7-m.cmake b/arch/arm/src/cmake/armv7-m.cmake index 73ef08d18ca8f..1f6d121e78a1a 100644 --- a/arch/arm/src/cmake/armv7-m.cmake +++ b/arch/arm/src/cmake/armv7-m.cmake @@ -38,4 +38,23 @@ else() # gcc set(TOOLCHAIN_ARCH_FILE armv7-m_gcc) endif() +# LLVM Configuration +if(CONFIG_ARCH_CORTEXM3) + set(LLVM_ARCHTYPE thumbv7m) + set(LLVM_CPUTYPE cortex-m3) +else() + set(LLVM_ARCHTYPE thumbv7em) + if(CONFIG_ARCH_CORTEXM4) + set(LLVM_CPUTYPE cortex-m4) + elseif(CONFIG_ARCH_CORTEXM7) + set(LLVM_CPUTYPE cortex-m7) + endif() +endif() + +if(CONFIG_ARCH_FPU) + set(LLVM_ABITYPE eabihf) +else() + set(LLVM_ABITYPE eabi) +endif() + include(${TOOLCHAIN_ARCH_FILE}) diff --git a/arch/arm/src/cmake/armv8-m.cmake b/arch/arm/src/cmake/armv8-m.cmake index fef71a4984b92..71a8747e566df 100644 --- a/arch/arm/src/cmake/armv8-m.cmake +++ b/arch/arm/src/cmake/armv8-m.cmake @@ -22,6 +22,31 @@ set(PLATFORM_FLAGS) +# LLVM Configuration +if(CONFIG_ARCH_CORTEXM23) + set(LLVM_ARCHTYPE thumbv8m.base) + set(LLVM_CPUTYPE cortex-m23) +elseif(CONFIG_ARCH_CORTEXM33) + set(LLVM_ARCHTYPE thumbv8m.main) + set(LLVM_CPUTYPE cortex-m33) +elseif(CONFIG_ARCH_CORTEXM35P) + set(LLVM_ARCHTYPE thumbv8m.main) + set(LLVM_CPUTYPE cortex-m35p) +elseif(CONFIG_ARCH_CORTEXM55) + set(LLVM_ARCHTYPE thumbv8.1m.main) + set(LLVM_CPUTYPE cortex-m55) +elseif(CONFIG_ARCH_CORTEXM85) + set(LLVM_ARCHTYPE thumbv8.1m.main) + set(LLVM_CPUTYPE cortex-m85) +endif() + +# Set ABI type based on FPU configuration +if(CONFIG_ARCH_FPU) + set(LLVM_ABITYPE eabihf) +else() + set(LLVM_ABITYPE eabi) +endif() + if(CONFIG_ARM_DSP) set(EXTCPUFLAGS +dsp) endif()