From b612a49cdd586987097cb57585070f94b05d68b1 Mon Sep 17 00:00:00 2001 From: Masayuki Ishikawa Date: Mon, 20 Feb 2023 16:37:37 +0900 Subject: [PATCH 1/3] arch: imxrt: Fix CONFIG_IMXRT_ENET_ENHANCEDBD Summary: - I noticed that CONFIG_IMXRT_ENET_ENHANCEDBD is not correctly used though it is defined in Kconfig. - This commit fixes this issue. Impact: - None Testing: - Tested with imxrt1060-evk:netnsh_dcache_wb (will be added later) Signed-off-by: Masayuki Ishikawa --- arch/arm/src/imxrt/hardware/imxrt_enet.h | 6 +++--- arch/arm/src/imxrt/imxrt_enet.c | 11 ++++++----- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/arm/src/imxrt/hardware/imxrt_enet.h b/arch/arm/src/imxrt/hardware/imxrt_enet.h index 7b879d6b3fbd4..ca423ae1b6880 100644 --- a/arch/arm/src/imxrt/hardware/imxrt_enet.h +++ b/arch/arm/src/imxrt/hardware/imxrt_enet.h @@ -640,7 +640,7 @@ /* Legacy Buffer Descriptor */ -#ifdef CONFIG_ENET_ENHANCEDBD +#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD #ifdef IMXRT_USE_DBSWAP /* When DBSWP is used to swap the bytes in hardware, it is done 32-bits * at a time. Therefore, all 16 bit elements need to be swapped to @@ -675,7 +675,7 @@ struct enet_desc_s uint32_t reserved2; /* unused */ }; #endif /* IMXRT_USE_DBSWAP */ -#else /* CONFIG_ENET_ENHANCEDBD */ +#else /* CONFIG_IMXRT_ENET_ENHANCEDBD */ #ifdef IMXRT_USE_DBSWAP struct enet_desc_s { @@ -691,7 +691,7 @@ struct enet_desc_s uint8_t *data; /* Buffer address */ }; #endif /* IMXRT_USE_DBSWAP */ -#endif /* CONFIG_ENET_ENHANCEDBD */ +#endif /* CONFIG_IMXRT_ENET_ENHANCEDBD */ /**************************************************************************** * Public Data diff --git a/arch/arm/src/imxrt/imxrt_enet.c b/arch/arm/src/imxrt/imxrt_enet.c index 8fd20c69e48cf..e86960c8d872f 100644 --- a/arch/arm/src/imxrt/imxrt_enet.c +++ b/arch/arm/src/imxrt/imxrt_enet.c @@ -159,7 +159,8 @@ * REVISIT: The size of descriptors and buffers must also be in even units * of the cache line size That is because the operations to clean and * invalidate the cache will operate on a full 32-byte cache line. If - * CONFIG_ENET_ENHANCEDBD is selected, then the size of the descriptor is + * CONFIG_IMXRT_ENET_ENHANCEDBD is selected, + * then the size of the descriptor is * 32-bytes (and probably already the correct size for the cache line); * otherwise, the size of the descriptors much smaller, only 8 bytes. */ @@ -665,7 +666,7 @@ static int imxrt_transmit(struct imxrt_driver_s *priv) */ txdesc->length = imxrt_swap16(priv->dev.d_len); -#ifdef CONFIG_IMXRT_ENETENHANCEDBD +#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD txdesc->bdu = 0x00000000; txdesc->status2 = TXDESC_INT | TXDESC_TS; /* | TXDESC_IINS | TXDESC_PINS; */ #endif @@ -1343,7 +1344,7 @@ static int imxrt_ifup_action(struct net_driver_s *dev, bool resetphy) /* Select legacy of enhanced buffer descriptor format */ -#ifdef CONFIG_IMXRT_ENETENHANCEDBD +#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD imxrt_enet_putreg32(priv, ENET_ECR_EN1588, IMXRT_ENET_ECR_OFFSET); #else imxrt_enet_putreg32(priv, 0, IMXRT_ENET_ECR_OFFSET); @@ -2608,7 +2609,7 @@ static void imxrt_initbuffers(struct imxrt_driver_s *priv) priv->txdesc[i].status1 = 0; priv->txdesc[i].length = 0; priv->txdesc[i].data = (uint8_t *)imxrt_swap32((uint32_t)addr); -#ifdef CONFIG_IMXRT_ENETENHANCEDBD +#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD priv->txdesc[i].status2 = TXDESC_IINS | TXDESC_PINS; #endif addr += ALIGNED_BUFSIZE; @@ -2621,7 +2622,7 @@ static void imxrt_initbuffers(struct imxrt_driver_s *priv) priv->rxdesc[i].status1 = RXDESC_E; priv->rxdesc[i].length = 0; priv->rxdesc[i].data = (uint8_t *)imxrt_swap32((uint32_t)addr); -#ifdef CONFIG_IMXRT_ENETENHANCEDBD +#ifdef CONFIG_IMXRT_ENET_ENHANCEDBD priv->rxdesc[i].bdu = 0; priv->rxdesc[i].status2 = RXDESC_INT; #endif From 94922501ba35a44b124591fe66daa0b0be5d24e1 Mon Sep 17 00:00:00 2001 From: Masayuki Ishikawa Date: Mon, 20 Feb 2023 16:42:01 +0900 Subject: [PATCH 2/3] arch: imxrt: Enable IMXRT_ENET_ENHANCEDBD if !ARMV7M_DCACHE_WRITETHROUGH Summary: - I noticed that there are two kinds of descriptors for imxrt_enet.c - The first one is the legacy descriptor and its size is 8bytes. - The second one is the enhanced descriptor and its size is 32bytes. - In both cases, we can not use a descriptor chain like stm32. - Considering cache line alignment, the second one is perfect because one descriptor fits the Cortex-M7 cache line which would fix networking stability issues in d-cache write-back mode. Impact: - imxrt ethernet in d-cache write-back mode Testing: - Tested with ixmrt1060-evk:netnsh_dcache_wb (will be added later) Signed-off-by: Masayuki Ishikawa --- arch/arm/src/imxrt/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/imxrt/Kconfig b/arch/arm/src/imxrt/Kconfig index ead7d7919dd89..5dc6c436cb128 100644 --- a/arch/arm/src/imxrt/Kconfig +++ b/arch/arm/src/imxrt/Kconfig @@ -2070,7 +2070,8 @@ config IMXRT_ENET_NTXBUFFERS config IMXRT_ENET_ENHANCEDBD bool # not optional - default n + default n if ARMV7M_DCACHE_WRITETHROUGH + default y if !ARMV7M_DCACHE_WRITETHROUGH config IMXRT_ENET_NETHIFS int # Not optional From fa6d48970a59b6a44a9f245a7073a4c7f02a95ce Mon Sep 17 00:00:00 2001 From: Masayuki Ishikawa Date: Mon, 20 Feb 2023 16:54:14 +0900 Subject: [PATCH 3/3] boards: imxrt1060-evk: Add netnsh_dcache_wb configuration Summary: - This commit adds netnsh_dcache_wb configuration which enables d-cache write-back mode with networking. Impact: - None Testing: - Tested with iperf, telnet and ping on imxrt1060-evk board - iperf -s 94Mbps, iperf -c 93Mbps Signed-off-by: Masayuki Ishikawa --- .../configs/netnsh_dcache_wb/defconfig | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 boards/arm/imxrt/imxrt1060-evk/configs/netnsh_dcache_wb/defconfig diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/netnsh_dcache_wb/defconfig b/boards/arm/imxrt/imxrt1060-evk/configs/netnsh_dcache_wb/defconfig new file mode 100644 index 0000000000000..3d7525a95fbd2 --- /dev/null +++ b/boards/arm/imxrt/imxrt1060-evk/configs/netnsh_dcache_wb/defconfig @@ -0,0 +1,86 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="imxrt1060-evk" +CONFIG_ARCH_BOARD_IMXRT1060_EVK=y +CONFIG_ARCH_CHIP="imxrt" +CONFIG_ARCH_CHIP_IMXRT=y +CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_USEBASEPRI=y +CONFIG_BOARD_LOOPSPERMSEC=104926 +CONFIG_BUILTIN=y +CONFIG_DEBUG_BUSFAULT=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_HARDFAULT_ALERT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_USAGEFAULT=y +CONFIG_ETH0_PHY_KSZ8081=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_IMXRT_ENET=y +CONFIG_IMXRT_ENET_NRXBUFFERS=64 +CONFIG_IMXRT_ENET_NTXBUFFERS=64 +CONFIG_IMXRT_LPUART1=y +CONFIG_INIT_ENTRYPOINT="nsh_main" +CONFIG_INIT_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_IOB_BUFSIZE=1514 +CONFIG_LIBC_HOSTNAME="i.MXRT1060 EVK" +CONFIG_LPUART1_SERIAL_CONSOLE=y +CONFIG_NET=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDEV_STATISTICS=y +CONFIG_NETINIT_NOMAC=y +CONFIG_NETUTILS_IPERF=y +CONFIG_NETUTILS_TELNETD=y +CONFIG_NET_ARP_SEND=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ETH_PKTSIZE=1514 +CONFIG_NET_GUARDSIZE=4 +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_ICMPv6=y +CONFIG_NET_ICMPv6_NEIGHBOR=y +CONFIG_NET_ICMPv6_SOCKET=y +CONFIG_NET_IPv6=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_TCPBACKLOG=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_UDP=y +CONFIG_NET_UDP_WRITE_BUFFERS=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_RAM_SIZE=1048576 +CONFIG_RAM_START=0x20200000 +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_STACK_COLORATION=y +CONFIG_START_DAY=20 +CONFIG_START_MONTH=2 +CONFIG_START_YEAR=2023 +CONFIG_SYSLOG_TIMESTAMP=y +CONFIG_SYSTEM_DHCPC_RENEW=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING6=y +CONFIG_SYSTEM_PING=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_TESTING_OSTEST_NBARRIER_THREADS=3 +CONFIG_TESTING_OSTEST_STACKSIZE=2048