|
67 | 67 | /******************************************************************************/ |
68 | 68 |
|
69 | 69 | static int bladerf2_read_flash_vctcxo_trim(struct bladerf *dev, uint16_t *trim); |
70 | | -static int bladerf2_get_rfic_rx_fir(struct bladerf *dev, |
71 | | - bladerf_rfic_rxfir *rxfir); |
72 | | -static int bladerf2_set_rfic_rx_fir(struct bladerf *dev, |
73 | | - bladerf_rfic_rxfir rxfir); |
74 | | -static int bladerf2_get_rfic_tx_fir(struct bladerf *dev, |
75 | | - bladerf_rfic_txfir *txfir); |
76 | | -static int bladerf2_set_rfic_tx_fir(struct bladerf *dev, |
77 | | - bladerf_rfic_txfir txfir); |
78 | 70 |
|
79 | 71 |
|
80 | 72 | /******************************************************************************/ |
@@ -2997,126 +2989,98 @@ int bladerf_get_rfic_ctrl_out(struct bladerf *dev, uint8_t *ctrl_out) |
2997 | 2989 | return 0; |
2998 | 2990 | } |
2999 | 2991 |
|
3000 | | -static int bladerf2_get_rfic_rx_fir(struct bladerf *dev, |
3001 | | - bladerf_rfic_rxfir *rxfir) |
| 2992 | +int bladerf_get_rfic_rx_fir(struct bladerf *dev, bladerf_rfic_rxfir *rxfir) |
3002 | 2993 | { |
| 2994 | + CHECK_BOARD_IS_BLADERF2(dev); |
3003 | 2995 | CHECK_BOARD_STATE(STATE_FPGA_LOADED); |
3004 | 2996 | NULL_CHECK(rxfir); |
3005 | 2997 |
|
3006 | 2998 | struct bladerf2_board_data *board_data = dev->board_data; |
3007 | 2999 | struct controller_fns const *rfic = board_data->rfic; |
| 3000 | + bladerf_channel const ch = BLADERF_CHANNEL_RX(0); |
3008 | 3001 |
|
3009 | | - CHECK_STATUS(rfic->get_filter(dev, BLADERF_CHANNEL_RX(0), rxfir, NULL)); |
| 3002 | + WITH_MUTEX(&dev->lock, { |
| 3003 | + CHECK_STATUS_LOCKED(rfic->get_filter(dev, ch, rxfir, NULL)); |
| 3004 | + }); |
3010 | 3005 |
|
3011 | 3006 | return 0; |
3012 | 3007 | } |
3013 | 3008 |
|
3014 | | -static int bladerf2_set_rfic_rx_fir(struct bladerf *dev, |
3015 | | - bladerf_rfic_rxfir rxfir) |
| 3009 | +int bladerf_set_rfic_rx_fir(struct bladerf *dev, bladerf_rfic_rxfir rxfir) |
3016 | 3010 | { |
| 3011 | + CHECK_BOARD_IS_BLADERF2(dev); |
3017 | 3012 | CHECK_BOARD_STATE(STATE_FPGA_LOADED); |
3018 | 3013 |
|
3019 | 3014 | struct bladerf2_board_data *board_data = dev->board_data; |
3020 | 3015 | struct controller_fns const *rfic = board_data->rfic; |
| 3016 | + struct bladerf_range const sr_range = bladerf2_sample_rate_range_4x; |
| 3017 | + bladerf_channel const ch = BLADERF_CHANNEL_RX(0); |
3021 | 3018 |
|
3022 | | - /* Verify that sample rate is not too low */ |
3023 | | - if (rxfir != BLADERF_RFIC_RXFIR_DEC4) { |
3024 | | - bladerf_sample_rate sr; |
| 3019 | + WITH_MUTEX(&dev->lock, { |
| 3020 | + /* Verify that sample rate is not too low */ |
| 3021 | + if (rxfir != BLADERF_RFIC_RXFIR_DEC4) { |
| 3022 | + bladerf_sample_rate sr; |
3025 | 3023 |
|
3026 | | - CHECK_STATUS( |
3027 | | - dev->board->get_sample_rate(dev, BLADERF_CHANNEL_RX(0), &sr)); |
| 3024 | + CHECK_STATUS_LOCKED(dev->board->get_sample_rate(dev, ch, &sr)); |
3028 | 3025 |
|
3029 | | - if (is_within_range(&bladerf2_sample_rate_range_4x, sr)) { |
3030 | | - log_error("%s: invalid FIR filter: sample rate too low (%d < %d)\n", |
3031 | | - __FUNCTION__, sr, bladerf2_sample_rate_range_4x.min); |
3032 | | - return BLADERF_ERR_INVAL; |
| 3026 | + if (is_within_range(&sr_range, sr)) { |
| 3027 | + log_error("%s: sample rate too low for filter (%d < %d)\n", |
| 3028 | + __FUNCTION__, sr, sr_range.min); |
| 3029 | + MUTEX_UNLOCK(&dev->lock); |
| 3030 | + return BLADERF_ERR_INVAL; |
| 3031 | + } |
3033 | 3032 | } |
3034 | | - } |
3035 | 3033 |
|
3036 | | - CHECK_STATUS(rfic->set_filter(dev, BLADERF_CHANNEL_RX(0), rxfir, 0)); |
| 3034 | + CHECK_STATUS_LOCKED(rfic->set_filter(dev, ch, rxfir, 0)); |
| 3035 | + }); |
3037 | 3036 |
|
3038 | 3037 | return 0; |
3039 | 3038 | } |
3040 | 3039 |
|
3041 | | -static int bladerf2_get_rfic_tx_fir(struct bladerf *dev, |
3042 | | - bladerf_rfic_txfir *txfir) |
| 3040 | +int bladerf_get_rfic_tx_fir(struct bladerf *dev, bladerf_rfic_txfir *txfir) |
3043 | 3041 | { |
| 3042 | + CHECK_BOARD_IS_BLADERF2(dev); |
3044 | 3043 | CHECK_BOARD_STATE(STATE_FPGA_LOADED); |
3045 | 3044 | NULL_CHECK(txfir); |
3046 | 3045 |
|
3047 | 3046 | struct bladerf2_board_data *board_data = dev->board_data; |
3048 | 3047 | struct controller_fns const *rfic = board_data->rfic; |
| 3048 | + bladerf_channel const ch = BLADERF_CHANNEL_TX(0); |
3049 | 3049 |
|
3050 | | - CHECK_STATUS(rfic->get_filter(dev, BLADERF_CHANNEL_TX(0), NULL, txfir)); |
| 3050 | + WITH_MUTEX(&dev->lock, { |
| 3051 | + CHECK_STATUS_LOCKED(rfic->get_filter(dev, ch, NULL, txfir)); |
| 3052 | + }); |
3051 | 3053 |
|
3052 | 3054 | return 0; |
3053 | 3055 | } |
3054 | 3056 |
|
3055 | | -static int bladerf2_set_rfic_tx_fir(struct bladerf *dev, |
3056 | | - bladerf_rfic_txfir txfir) |
| 3057 | +int bladerf_set_rfic_tx_fir(struct bladerf *dev, bladerf_rfic_txfir txfir) |
3057 | 3058 | { |
| 3059 | + CHECK_BOARD_IS_BLADERF2(dev); |
3058 | 3060 | CHECK_BOARD_STATE(STATE_FPGA_LOADED); |
3059 | 3061 |
|
3060 | 3062 | struct bladerf2_board_data *board_data = dev->board_data; |
3061 | 3063 | struct controller_fns const *rfic = board_data->rfic; |
| 3064 | + struct bladerf_range const sr_range = bladerf2_sample_rate_range_4x; |
| 3065 | + bladerf_channel const ch = BLADERF_CHANNEL_TX(0); |
3062 | 3066 |
|
3063 | | - /* Verify that sample rate is not too low */ |
3064 | | - if (txfir != BLADERF_RFIC_TXFIR_INT4) { |
3065 | | - bladerf_sample_rate sr; |
| 3067 | + WITH_MUTEX(&dev->lock, { |
| 3068 | + /* Verify that sample rate is not too low */ |
| 3069 | + if (txfir != BLADERF_RFIC_TXFIR_INT4) { |
| 3070 | + bladerf_sample_rate sr; |
3066 | 3071 |
|
3067 | | - CHECK_STATUS( |
3068 | | - dev->board->get_sample_rate(dev, BLADERF_CHANNEL_TX(0), &sr)); |
| 3072 | + CHECK_STATUS_LOCKED(dev->board->get_sample_rate(dev, ch, &sr)); |
3069 | 3073 |
|
3070 | | - if (is_within_range(&bladerf2_sample_rate_range_4x, sr)) { |
3071 | | - log_error("%s: invalid FIR filter: sample rate too low (%d < %d)\n", |
3072 | | - __FUNCTION__, sr, bladerf2_sample_rate_range_4x.min); |
3073 | | - return BLADERF_ERR_INVAL; |
| 3074 | + if (is_within_range(&sr_range, sr)) { |
| 3075 | + log_error("%s: sample rate too low for filter (%d < %d)\n", |
| 3076 | + __FUNCTION__, sr, sr_range.min); |
| 3077 | + MUTEX_UNLOCK(&dev->lock); |
| 3078 | + return BLADERF_ERR_INVAL; |
| 3079 | + } |
3074 | 3080 | } |
3075 | | - } |
3076 | | - |
3077 | | - CHECK_STATUS(rfic->set_filter(dev, BLADERF_CHANNEL_TX(0), 0, txfir)); |
3078 | 3081 |
|
3079 | | - return 0; |
3080 | | -} |
3081 | | - |
3082 | | -/* mutex'd wrappers for above */ |
3083 | | - |
3084 | | -int bladerf_get_rfic_rx_fir(struct bladerf *dev, bladerf_rfic_rxfir *rxfir) |
3085 | | -{ |
3086 | | - CHECK_BOARD_IS_BLADERF2(dev); |
3087 | | - |
3088 | | - WITH_MUTEX(&dev->lock, |
3089 | | - CHECK_STATUS_LOCKED(bladerf2_get_rfic_rx_fir(dev, rxfir))); |
3090 | | - |
3091 | | - return 0; |
3092 | | -} |
3093 | | - |
3094 | | -int bladerf_set_rfic_rx_fir(struct bladerf *dev, bladerf_rfic_rxfir rxfir) |
3095 | | -{ |
3096 | | - CHECK_BOARD_IS_BLADERF2(dev); |
3097 | | - |
3098 | | - WITH_MUTEX(&dev->lock, |
3099 | | - CHECK_STATUS_LOCKED(bladerf2_set_rfic_rx_fir(dev, rxfir))); |
3100 | | - |
3101 | | - return 0; |
3102 | | -} |
3103 | | - |
3104 | | -int bladerf_get_rfic_tx_fir(struct bladerf *dev, bladerf_rfic_txfir *txfir) |
3105 | | -{ |
3106 | | - CHECK_BOARD_IS_BLADERF2(dev); |
3107 | | - |
3108 | | - WITH_MUTEX(&dev->lock, |
3109 | | - CHECK_STATUS_LOCKED(bladerf2_get_rfic_tx_fir(dev, txfir))); |
3110 | | - |
3111 | | - return 0; |
3112 | | -} |
3113 | | - |
3114 | | -int bladerf_set_rfic_tx_fir(struct bladerf *dev, bladerf_rfic_txfir txfir) |
3115 | | -{ |
3116 | | - CHECK_BOARD_IS_BLADERF2(dev); |
3117 | | - |
3118 | | - WITH_MUTEX(&dev->lock, |
3119 | | - CHECK_STATUS_LOCKED(bladerf2_set_rfic_tx_fir(dev, txfir))); |
| 3082 | + CHECK_STATUS_LOCKED(rfic->set_filter(dev, ch, 0, txfir)); |
| 3083 | + }); |
3120 | 3084 |
|
3121 | 3085 | return 0; |
3122 | 3086 | } |
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