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Add SIMD double-precision conversion instructions (#218)
* Add SIMD double-precision conversion instructions * v8 encoding
1 parent 3c6e0e7 commit 6650f2e

6 files changed

Lines changed: 63 additions & 0 deletions

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crates/wasmparser/src/binary_reader.rs

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@@ -1645,6 +1645,11 @@ impl<'a> BinaryReader<'a> {
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0x50 => Operator::V128Or,
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0x51 => Operator::V128Xor,
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0x52 => Operator::V128Bitselect,
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0x53 => Operator::F64x2ConvertLowI32x4S,
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0x54 => Operator::F64x2ConvertLowI32x4U,
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0x55 => Operator::I32x4TruncSatF64x2SZero,
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0x56 => Operator::I32x4TruncSatF64x2UZero,
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0x57 => Operator::F32x4DemoteF64x2Zero,
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0x58 => Operator::V128Load8Lane {
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memarg: self.read_memarg()?,
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lane: self.read_lane_index(16)?,
@@ -1684,6 +1689,7 @@ impl<'a> BinaryReader<'a> {
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0x64 => Operator::I8x16Bitmask,
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0x65 => Operator::I8x16NarrowI16x8S,
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0x66 => Operator::I8x16NarrowI16x8U,
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0x69 => Operator::F64x2PromoteLowF32x4,
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0x6b => Operator::I8x16Shl,
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0x6c => Operator::I8x16ShrS,
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0x6d => Operator::I8x16ShrU,

crates/wasmparser/src/operators_validator.rs

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@@ -1625,6 +1625,12 @@ impl OperatorValidator {
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| Operator::F64x2Abs
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| Operator::F64x2Neg
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| Operator::F64x2Sqrt
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| Operator::F32x4DemoteF64x2Zero
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| Operator::F64x2PromoteLowF32x4
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| Operator::F64x2ConvertLowI32x4S
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| Operator::F64x2ConvertLowI32x4U
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| Operator::I32x4TruncSatF64x2SZero
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| Operator::I32x4TruncSatF64x2UZero
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| Operator::F32x4ConvertI32x4S
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| Operator::F32x4ConvertI32x4U => {
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self.check_non_deterministic_enabled()?;

crates/wasmparser/src/primitives.rs

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@@ -1196,4 +1196,10 @@ pub enum Operator<'a> {
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I8x16RoundingAverageU,
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I16x8RoundingAverageU,
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I16x8Q15MulrSatS,
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F32x4DemoteF64x2Zero,
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F64x2PromoteLowF32x4,
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F64x2ConvertLowI32x4S,
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F64x2ConvertLowI32x4U,
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I32x4TruncSatF64x2SZero,
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I32x4TruncSatF64x2UZero,
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}

crates/wasmprinter/src/lib.rs

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Original file line numberDiff line numberDiff line change
@@ -1441,6 +1441,13 @@ impl Printer {
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I32x4MaxS => self.result.push_str("i32x4.max_s"),
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I32x4MaxU => self.result.push_str("i32x4.max_u"),
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I32x4DotI16x8S => self.result.push_str("i32x4.dot_i16x8_s"),
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F32x4DemoteF64x2Zero => self.result.push_str("f32x4.demote_f64x2_zero"),
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F64x2PromoteLowF32x4 => self.result.push_str("f64x2.promote_low_f32x4"),
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F64x2ConvertLowI32x4S => self.result.push_str("f64x2.convert_low_i32x4_s"),
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F64x2ConvertLowI32x4U => self.result.push_str("f64x2.convert_low_i32x4_u"),
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I32x4TruncSatF64x2SZero => self.result.push_str("i32x4.trunc_sat_f64x2_s_zero"),
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I32x4TruncSatF64x2UZero => self.result.push_str("i32x4.trunc_sat_f64x2_u_zero"),
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}
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Ok(())
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}

crates/wast/src/ast/expr.rs

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Original file line numberDiff line numberDiff line change
@@ -936,6 +936,13 @@ instructions! {
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V128Or : [0xfd, 0x50] : "v128.or",
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V128Xor : [0xfd, 0x51] : "v128.xor",
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V128Bitselect : [0xfd, 0x52] : "v128.bitselect",
939+
940+
F64x2ConvertLowI32x4S : [0xfd, 0x53] : "f64x2.convert_low_i32x4_s",
941+
F64x2ConvertLowI32x4U : [0xfd, 0x54] : "f64x2.convert_low_i32x4_u",
942+
I32x4TruncSatF64x2SZero : [0xfd, 0x55] : "i32x4.trunc_sat_f64x2_s_zero",
943+
I32x4TruncSatF64x2UZero : [0xfd, 0x56] : "i32x4.trunc_sat_f64x2_u_zero",
944+
F32x4DemoteF64x2Zero : [0xfd, 0x57] : "f32x4.demote_f64x2_zero",
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V128Load8Lane(LoadOrStoreLane<1>) : [0xfd, 0x58] : "v128.load8_lane",
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V128Load16Lane(LoadOrStoreLane<2>) : [0xfd, 0x59] : "v128.load16_lane",
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V128Load32Lane(LoadOrStoreLane<4>) : [0xfd, 0x5a] : "v128.load32_lane",
@@ -952,6 +959,7 @@ instructions! {
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I8x16Bitmask : [0xfd, 0x64] : "i8x16.bitmask",
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I8x16NarrowI16x8S : [0xfd, 0x65] : "i8x16.narrow_i16x8_s",
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I8x16NarrowI16x8U : [0xfd, 0x66] : "i8x16.narrow_i16x8_u",
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F64x2PromoteLowF32x4 : [0xfd, 0x69] : "f64x2.promote_low_f32x4",
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I8x16Shl : [0xfd, 0x6b] : "i8x16.shl",
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I8x16ShrS : [0xfd, 0x6c] : "i8x16.shr_s",
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I8x16ShrU : [0xfd, 0x6d] : "i8x16.shr_u",

tests/local/simd.wat

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@@ -189,6 +189,36 @@
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i8x16.neg
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drop
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v128.const i32x4 0 0 0 0
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f32x4.demote_f64x2_zero
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i8x16.neg
195+
drop
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v128.const i32x4 0 0 0 0
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f64x2.promote_low_f32x4
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i8x16.neg
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drop
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v128.const i32x4 0 0 0 0
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f64x2.convert_low_i32x4_s
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i8x16.neg
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drop
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v128.const i32x4 0 0 0 0
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f64x2.convert_low_i32x4_u
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i8x16.neg
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drop
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v128.const i32x4 0 0 0 0
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i32x4.trunc_sat_f64x2_s_zero
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i8x16.neg
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drop
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v128.const i32x4 0 0 0 0
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i32x4.trunc_sat_f64x2_u_zero
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i8x16.neg
220+
drop
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)
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(memory (;0;) 1)

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