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Forbid rustdoc warnings in CI (#12420)
* Forbid rustdoc warnings in CI This commit corrects our handling of rustdoc flags in CI to ensure that warnings indeed fire. Additionally this changes our flags to pass `-Dwarnings` to ensure that we have warning-free doc builds when all features are enabled at least. There were quite a lot of preexisting issues to fix, so this additionally goes through and fixes all the warnings that cropped up. * Update nightly toolchain again prtest:full * Update another nightly * Fix a warning in generated code
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.github/actions/install-rust/action.yml

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@@ -32,7 +32,7 @@ runs:
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elif [ "${{ inputs.toolchain }}" = "msrv" ]; then
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echo "version=1.$msrv.0" >> "$GITHUB_OUTPUT"
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elif [ "${{ inputs.toolchain }}" = "wasmtime-ci-pinned-nightly" ]; then
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echo "version=nightly-2026-01-22" >> "$GITHUB_OUTPUT"
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echo "version=nightly-2026-01-26" >> "$GITHUB_OUTPUT"
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else
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echo "version=${{ inputs.toolchain }}" >> "$GITHUB_OUTPUT"
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fi

.github/workflows/main.yml

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@@ -261,7 +261,7 @@ jobs:
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env:
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MDBOOK_VERSION: 0.4.37
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MDBOOK_LANGTABS_VERSION: 0.1.1
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RUSTDOCFLAGS: -Dbroken_intra_doc_links --cfg docsrs
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RUSTDOCFLAGS: -Dwarnings --cfg docsrs
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OPENVINO_SKIP_LINKING: 1
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steps:
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- uses: actions/checkout@v4
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--exclude wasm-spec-interpreter \
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--exclude calculator \
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--all-features
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env:
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RUSTDOCFLAGS: --cfg=docsrs
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- run: cargo doc --package cranelift-codegen-meta --document-private-items
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env:
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RUSTDOCFLAGS: --cfg=docsrs
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# Assemble the documentation, and always upload it as an artifact for
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# inspection on PRs and such.

cranelift/assembler-x64/meta/src/dsl/custom.rs

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@@ -16,7 +16,7 @@ pub enum Customization {
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/// Modify how an instruction is emitted into the code buffer.
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Encode,
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/// Modify the instruction mnemonic (see [`crate::dsl::Inst::mnemonic`]);
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/// this customization is irrelevant if [`CustomOperation::Display`] is also
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/// this customization is irrelevant if [`Customization::Display`] is also
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/// specified.
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Mnemonic,
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/// Modify how a register allocator visits the operands of an instruction.

cranelift/assembler-x64/meta/src/dsl/encoding.rs

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@@ -184,9 +184,9 @@ pub struct Rex {
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/// instruction lists the corresponding hexadecimal value of the opcode byte
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/// with low 3 bits as 000b. In non-64-bit mode, a register code, from 0
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/// through 7, is added to the hexadecimal value of the opcode byte. In
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/// 64-bit mode, indicates the four bit field of REX.b and opcode[2:0] field
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/// encodes the register operand of the instruction. “+ro” is applicable
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/// only in 64-bit mode."
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/// 64-bit mode, indicates the four bit field of REX.b and `opcode[2:0]`
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/// field encodes the register operand of the instruction. “+ro” is
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/// applicable only in 64-bit mode."
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pub opcode_mod: Option<OpcodeMod>,
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}
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}
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/// An 8-bit immediate byte is present containing a source register
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/// specifier in either imm8[7:4] (for 64-bit
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/// mode) or imm8[6:4] (for 32-bit mode), and instruction-specific payload
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/// in imm8[3:0].
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/// specifier in either `imm8[7:4]` (for 64-bit
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/// mode) or `imm8[6:4]` (for 32-bit mode), and instruction-specific payload
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/// in `imm8[3:0]`.
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pub fn is4(self) -> Self {
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Self { is4: true, ..self }
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}

cranelift/assembler-x64/meta/src/dsl/format.rs

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@@ -591,7 +591,7 @@ impl core::fmt::Display for Extension {
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/// In the future, we might want to model specific EFLAGS bits instead of the
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/// entire EFLAGS register.
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/// Some related discussion in this GitHub issue
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/// https://github.com/bytecodealliance/wasmtime/issues/10298
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/// <https://github.com/bytecodealliance/wasmtime/issues/10298>
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#[derive(Clone, Copy, Debug, PartialEq)]
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pub enum Eflags {
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None,

cranelift/assembler-x64/src/mem.rs

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@@ -128,7 +128,7 @@ impl core::fmt::LowerHex for AmodeOffset {
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/// Cranelift, this structure stores an optional [`KnownOffset`]. The following
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/// happens immediately before emission:
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/// - the [`KnownOffset`] is looked up, mapping it to an offset value
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/// - the [`Simm32`] value is added to the offset value
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/// - the [`AmodeOffset`] value is added to the offset value
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#[derive(Copy, Clone, Debug, PartialEq)]
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pub struct AmodeOffsetPlusKnownOffset {
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pub simm32: AmodeOffset,

cranelift/codegen/src/ir/debug_tags.rs

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@@ -73,7 +73,7 @@ impl DebugTags {
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/// Set the tags on an instruction, overwriting existing tag list.
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///
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/// Tags can only be set on call instructions (those for which
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/// [`crate::Opcode::is_call()`] returns `true`) and on
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/// [`crate::ir::Opcode::is_call()`] returns `true`) and on
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/// `sequence_point` instructions. This property is checked by the
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/// CLIF verifier.
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pub fn set(&mut self, inst: Inst, tags: impl IntoIterator<Item = DebugTag>) {

cranelift/codegen/src/ir/entities.rs

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@@ -57,7 +57,6 @@ impl Block {
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/// - [`f64const`](super::InstBuilder::f64const) for 64-bit float constants
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/// - [`f128const`](super::InstBuilder::f128const) for 128-bit float constants
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/// - [`vconst`](super::InstBuilder::vconst) for vector constants
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/// - [`null`](super::InstBuilder::null) for null reference constants
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///
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/// Any `InstBuilder` instruction that has an output will also return a `Value`.
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///

cranelift/codegen/src/ir/exception_table.rs

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@@ -129,7 +129,7 @@ impl ExceptionTableData {
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/// `BlockArg::TryCallExn` in the exceptional-return cases, with
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/// types corresponding to native machine words and an arity
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/// corresponding to the number of payload values that the calling
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/// convention and platform support. (See [`isa::CallConv`] for
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/// convention and platform support. (See [`CallConv`](crate::isa::CallConv) for
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/// more details.)
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pub fn new(
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sig: SigRef,

cranelift/codegen/src/lib.rs

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@@ -74,10 +74,10 @@ pub use crate::machinst::buffer::{
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OpenPatchRegion, PatchRegion,
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};
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pub use crate::machinst::{
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CallInfo, CompiledCode, Final, MachBuffer, MachBufferDebugTagList, MachBufferFinalized,
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MachBufferFrameLayout, MachDebugTagPos, MachInst, MachInstEmit, MachInstEmitState, MachLabel,
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RealReg, Reg, RelocDistance, TextSectionBuilder, VCodeConstant, VCodeConstantData,
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VCodeConstants, VCodeInst, Writable,
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CallInfo, CompiledCode, Final, FrameLayout, MachBuffer, MachBufferDebugTagList,
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MachBufferFinalized, MachBufferFrameLayout, MachDebugTagPos, MachInst, MachInstEmit,
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MachInstEmitState, MachLabel, RealReg, Reg, RelocDistance, TextSectionBuilder, VCodeConstant,
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VCodeConstantData, VCodeConstants, VCodeInst, Writable,
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};
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mod alias_analysis;

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