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Merge tag 'drm-for-v4.10' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie: "This is the main pull request for drm for 4.10 kernel. New drivers: - ZTE VOU display driver (zxdrm) - Amlogic Meson Graphic Controller GXBB/GXL/GXM SoCs (meson) - MXSFB support (mxsfb) Core: - Format handling has been reworked - Better atomic state debugging - drm_mm leak debugging - Atomic explicit fencing support - fbdev helper ops - Documentation updates - MST fbcon fixes Bridge: - Silicon Image SiI8620 driver Panel: - Add support for new simple panels i915: - GVT Device model - Better HDMI2.0 support on skylake - More watermark fixes - GPU idling rework for suspend/resume - DP Audio workarounds - Scheduler prep-work - Opregion CADL handling - GPU scheduler and priority boosting amdgfx/radeon: - Support for virtual devices - New VM manager for non-contig VRAM buffers - UVD powergating - SI register header cleanup - Cursor fixes - Powermanagement fixes nouveau: - Powermangement reworks for better voltage/clock changes - Atomic modesetting support - Displayport Multistream (MST) support. - GP102/104 hang and cursor fixes - GP106 support hisilicon: - hibmc support (BMC chip for aarch64 servers) armada: - add tracing support for overlay change - refactor plane support - de-midlayer the driver omapdrm: - Timing code cleanups rcar-du: - R8A7792/R8A7796 support - Misc fixes. sunxi: - A31 SoC display engine support imx-drm: - YUV format support - Cleanup plane atomic update mali-dp: - Misc fixes dw-hdmi: - Add support for HDMI i2c master controller tegra: - IOMMU support fixes - Error handling fixes tda998x: - Fix connector registration - Improved robustness - Fix infoframe/audio compliance virtio: - fix busid issues - allocate more vbufs qxl: - misc fixes and cleanups. vc4: - Fragment shader threading - ETC1 support - VEC (tv-out) support msm: - A5XX GPU support - Lots of atomic changes tilcdc: - Misc fixes and cleanups. etnaviv: - Fix dma-buf export path - DRAW_INSTANCED support - fix driver on i.MX6SX exynos: - HDMI refactoring fsl-dcu: - fbdev changes" * tag 'drm-for-v4.10' of git://people.freedesktop.org/~airlied/linux: (1343 commits) drm/nouveau/kms/nv50: fix atomic regression on original G80 drm/nouveau/bl: Do not register interface if Apple GMUX detected drm/nouveau/bl: Assign different names to interfaces drm/nouveau/bios/dp: fix handling of LevelEntryTableIndex on DP table 4.2 drm/nouveau/ltc: protect clearing of comptags with mutex drm/nouveau/gr/gf100-: handle GPC/TPC/MPC trap drm/nouveau/core: recognise GP106 chipset drm/nouveau/ttm: wait for bo fence to signal before unmapping vmas drm/nouveau/gr/gf100-: FECS intr handling is not relevant on proprietary ucode drm/nouveau/gr/gf100-: properly ack all FECS error interrupts drm/nouveau/fifo/gf100-: recover from host mmu faults drm: Add fake controlD* symlinks for backwards compat drm/vc4: Don't use drm_put_dev drm/vc4: Document VEC DT binding drm/vc4: Add support for the VEC (Video Encoder) IP drm: Add TV connector states to drm_connector_state drm: Turn DRM_MODE_SUBCONNECTOR_xx definitions into an enum drm/vc4: Fix ->clock_select setting for the VEC encoder drm/amdgpu/dce6: Set MASTER_UPDATE_MODE to 0 in resume_mc_access as well drm/amdgpu: use pin rather than pin_restricted in a few cases ...
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‎Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt‎

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Amlogic Meson Display Controller
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================================
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The Amlogic Meson Display controller is composed of several components
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that are going to be documented below:
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DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
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| vd1 _______ _____________ _________________ | |
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D |-------| |----| | | | | HDMI PLL |
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D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
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R |-------| |----| Processing | | | | |
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| osd2 | | | |---| Enci ----------|----|-----VDAC------|
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R |-------| CSC |----| Scalers | | Encp ----------|----|----HDMI-TX----|
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A | osd1 | | | Blenders | | Encl ----------|----|---------------|
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M |-------|______|----|____________| |________________| | |
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___|__________________________________________________________|_______________|
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VIU: Video Input Unit
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---------------------
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The Video Input Unit is in charge of the pixel scanout from the DDR memory.
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It fetches the frames addresses, stride and parameters from the "Canvas" memory.
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This part is also in charge of the CSC (Colorspace Conversion).
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It can handle 2 OSD Planes and 2 Video Planes.
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VPP: Video Post Processing
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--------------------------
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The Video Post Processing is in charge of the scaling and blending of the
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various planes into a single pixel stream.
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There is a special "pre-blending" used by the video planes with a dedicated
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scaler and a "post-blending" to merge with the OSD Planes.
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The OSD planes also have a dedicated scaler for one of the OSD.
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VENC: Video Encoders
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--------------------
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The VENC is composed of the multiple pixel encoders :
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- ENCI : Interlace Video encoder for CVBS and Interlace HDMI
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- ENCP : Progressive Video Encoder for HDMI
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- ENCL : LCD LVDS Encoder
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The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock
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tree and provides the scanout clock to the VPP and VIU.
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The ENCI is connected to a single VDAC for Composite Output.
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The ENCI and ENCP are connected to an on-chip HDMI Transceiver.
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Device Tree Bindings:
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---------------------
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VPU: Video Processing Unit
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--------------------------
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Required properties:
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- compatible: value should be different for each SoC family as :
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- GXBB (S905) : "amlogic,meson-gxbb-vpu"
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- GXL (S905X, S905D) : "amlogic,meson-gxl-vpu"
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- GXM (S912) : "amlogic,meson-gxm-vpu"
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followed by the common "amlogic,meson-gx-vpu"
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- reg: base address and size of he following memory-mapped regions :
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- vpu
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- hhi
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- dmc
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- reg-names: should contain the names of the previous memory regions
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- interrupts: should contain the VENC Vsync interrupt number
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Required nodes:
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The connections to the VPU output video ports are modeled using the OF graph
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bindings specified in Documentation/devicetree/bindings/graph.txt.
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The following table lists for each supported model the port number
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corresponding to each VPU output.
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Port 0 Port 1
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-----------------------------------------
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S905 (GXBB) CVBS VDAC HDMI-TX
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S905X (GXL) CVBS VDAC HDMI-TX
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S905D (GXL) CVBS VDAC HDMI-TX
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S912 (GXM) CVBS VDAC HDMI-TX
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Example:
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tv-connector {
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compatible = "composite-video-connector";
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port {
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tv_connector_in: endpoint {
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remote-endpoint = <&cvbs_vdac_out>;
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};
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};
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};
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vpu: vpu@d0100000 {
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compatible = "amlogic,meson-gxbb-vpu";
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reg = <0x0 0xd0100000 0x0 0x100000>,
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<0x0 0xc883c000 0x0 0x1000>,
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<0x0 0xc8838000 0x0 0x1000>;
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reg-names = "vpu", "hhi", "dmc";
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interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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/* CVBS VDAC output port */
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port@0 {
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reg = <0>;
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cvbs_vdac_out: endpoint {
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remote-endpoint = <&tv_connector_in>;
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};
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};
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};

‎Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt‎

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- port: Port node with a single endpoint connecting to the panel
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device, as defined in [1]
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Required properties for VEC:
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- compatible: Should be "brcm,bcm2835-vec"
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- reg: Physical base address and length of the registers
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- clocks: The core clock the unit runs on
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- interrupts: The interrupt number
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See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt
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Required properties for V3D:
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- compatible: Should be "brcm,bcm2835-v3d"
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- reg: Physical base address and length of the V3D's registers
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};
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};
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vec: vec@7e806000 {
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compatible = "brcm,bcm2835-vec";
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reg = <0x7e806000 0x1000>;
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clocks = <&clocks BCM2835_CLOCK_VEC>;
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interrupts = <2 27>;
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};
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v3d: v3d@7ec00000 {
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compatible = "brcm,bcm2835-v3d";
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reg = <0x7ec00000 0x1000>;

‎Documentation/devicetree/bindings/display/bridge/dumb-vga-dac.txt‎

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- Video port 0 for RGB input
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- Video port 1 for VGA output
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Optional properties:
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- vdd-supply: Power supply for DAC
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Example
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-------

‎Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt‎

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Optional properties
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- reg-io-width: the width of the reg:1,4, default set to 1 if not present
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- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
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- ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing,
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if the property is omitted, a functionally reduced I2C bus
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controller on DW HDMI is probed
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- clocks, clock-names: phandle to the HDMI CEC clock, name should be "cec"
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Example:

Documentation/devicetree/bindings/display/ti/ti,tfp410.txt renamed to Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt

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Optional properties:
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- powerdown-gpios: power-down gpio
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- reg: I2C address. If and only if present the device node
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should be placed into the i2c controller node where the
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tfp410 i2c is connected to.
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Required nodes:
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- Video port 0 for DPI input
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- Video port 1 for DVI output
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- Video port 0 for DPI input [1].
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- Video port 1 for DVI output [1].
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[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
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Example
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-------

‎Documentation/devicetree/bindings/display/mxsfb.txt‎

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* Freescale MXS LCD Interface (LCDIF)
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New bindings:
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=============
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Required properties:
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- compatible: Should be "fsl,<chip>-lcdif". Supported chips include
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imx23 and imx28.
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- reg: Address and length of the register set for lcdif
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- interrupts: Should contain lcdif interrupts
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- display : phandle to display node (see below for details)
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- compatible: Should be "fsl,imx23-lcdif" for i.MX23.
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Should be "fsl,imx28-lcdif" for i.MX28.
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Should be "fsl,imx6sx-lcdif" for i.MX6SX.
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- reg: Address and length of the register set for LCDIF
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- interrupts: Should contain LCDIF interrupt
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- clocks: A list of phandle + clock-specifier pairs, one for each
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entry in 'clock-names'.
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- clock-names: A list of clock names. For MXSFB it should contain:
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- "pix" for the LCDIF block clock
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- (MX6SX-only) "axi", "disp_axi" for the bus interface clock
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Required sub-nodes:
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- port: The connection to an encoder chip.
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Example:
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lcdif1: display-controller@2220000 {
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compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
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reg = <0x02220000 0x4000>;
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interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>,
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<&clks IMX6SX_CLK_LCDIF_APB>,
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<&clks IMX6SX_CLK_DISPLAY_AXI>;
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clock-names = "pix", "axi", "disp_axi";
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port {
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parallel_out: endpoint {
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remote-endpoint = <&panel_in_parallel>;
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};
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};
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};
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Deprecated bindings:
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====================
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Required properties:
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- compatible: Should be "fsl,imx23-lcdif" for i.MX23.
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Should be "fsl,imx28-lcdif" for i.MX28.
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- reg: Address and length of the register set for LCDIF
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- interrupts: Should contain LCDIF interrupts
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- display: phandle to display node (see below for details)
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* display node
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Required properties:
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- bits-per-pixel : <16> for RGB565, <32> for RGB888/666.
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- bus-width : number of data lines. Could be <8>, <16>, <18> or <24>.
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- bits-per-pixel: <16> for RGB565, <32> for RGB888/666.
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- bus-width: number of data lines. Could be <8>, <16>, <18> or <24>.
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Required sub-node:
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- display-timings : Refer to binding doc display-timing.txt for details.
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- display-timings: Refer to binding doc display-timing.txt for details.
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Examples:
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‎Documentation/devicetree/bindings/display/panel/auo,g133han01.txt‎

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AU Optronics Corporation 13.3" FHD (1920x1080) TFT LCD panel
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Required properties:
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- compatible: should be "auo,g133han01"
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This binding is compatible with the simple-panel binding, which is specified
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in simple-panel.txt in this directory.

‎Documentation/devicetree/bindings/display/panel/auo,g185han01.txt‎

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AU Optronics Corporation 18.5" FHD (1920x1080) TFT LCD panel
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Required properties:
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- compatible: should be "auo,g185han01"
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This binding is compatible with the simple-panel binding, which is specified
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in simple-panel.txt in this directory.

‎Documentation/devicetree/bindings/display/panel/auo,t215hvn01.txt‎

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AU Optronics Corporation 21.5" FHD (1920x1080) color TFT LCD panel
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Required properties:
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- compatible: should be "auo,t215hvn01"
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This binding is compatible with the simple-panel binding, which is specified
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in simple-panel.txt in this directory.

‎Documentation/devicetree/bindings/display/panel/chunghwa,claa070wp03xg.txt‎

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Chunghwa Picture Tubes Ltd. 7" WXGA TFT LCD panel
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Required properties:
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- compatible: should be "chunghwa,claa070wp03xg"
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This binding is compatible with the simple-panel binding, which is specified
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in simple-panel.txt in this directory.

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