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docs/index.html

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<body>
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<h1 id="pid">cmon-pid</h1>
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<p id="pragma-line-2">A implementation of several common PID controller transfer functions in C++, header only, without dependencies.</p>
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<p id="pragma-line-2">A PID controller implementation with several common transfer functions in C++, header only, without dependencies.</p>
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<ul id="pragma-line-4">
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<li id="pragma-line-4">
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<p id="pragma-line-4">Realized PID transfer functions</p>
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<ul id="pragma-line-19">
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<li id="pragma-line-19">Steady State</li>
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<li id="pragma-line-20">Bump-less parameter change</li>
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<li id="pragma-line-21">Sampling pointss</li>
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<li id="pragma-line-21">Sampling points</li>
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</ul>
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</li>
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<li id="pragma-line-23">
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<p id="pragma-line-23"><a href="index.html#Simulation">Simulation</a> of a pid in closed loop with a second order test system</p>
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</li>
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<li>
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<a href="https://github.com/corraid/cmon-pid">Source code is on GitHub.</a>
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</li>
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</ul>
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<h2>PID law</h2>
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<h3>Fast Sampling</h3>
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The sampling time and filter time constant are a 10th of the closed loop response time. `Tf=0.1, h=0.1`. With
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ample sampling rate and bandwidth the performance of the discrete and continuous controllers are similar.
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<p><img src="images/sim_fast_sample.png" width=100%></p>
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<p><img src="images/sim_fast_sample.png" alt="Step response with fast sampling rate"></p>
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<h3>Slow Sampling</h3>
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With a sampling rate of half the closed loop response time we see some difference between the backward Euler
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and bilinear/tustin integration. `h=0.5`
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<p><img src="images/sim_slow_sample.png" width=100%></p>
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<p><img src="images/sim_slow_sample.png" alt="Step response with slow sampling rate"></p>
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<h3>High bandwidth</h3>
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This happens when the sampling rate is too low for the bandwidth. `h=0.1, Tf=0.0001`
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<p><img src="images/sim_high_bandwidth.png" width=100%></p>
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<p><img src="images/sim_high_bandwidth.png" alt="Sampling rate too low for the bandwidth"></p>
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<h3>Low Bandwidth</h3>
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A low pass filter of half the response time has not much effect on the performance but can reduce the kick. `Tf=0.5`
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<p><img src="images/sim_low_bandwidth.png" width=100%></p>
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<p><img src="images/sim_low_bandwidth.png" alt="Step response with low bandwidth"></p>
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<h3>Disturbance Rejection</h3>
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Disturbance rejection is slow but they are damped by the system and may not be problem under normal conditions. `Tf=0.1`
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<p><img src="images/sim_disturbance_rejection.png" width=100%></p>
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<p><img src="images/sim_disturbance_rejection.png", alt="Constant setpoint with unity disturbance"></p>
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<h3 id="SimClamping">Clamping</h3>
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<p>
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While this works reasonably well manipulating the output is akin to disturbance and if we have a system with
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slow disturbance rejection like this recovery times will be quite long.
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</p>
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<p><img src="images/sim_clamping.png" width=100%></p>
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<p><img src="images/sim_clamping.png" alt="Clamped step response"></p>
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<h3 id="SimBackcalc">Back-calculation</h3>
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<p>
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Back-calculation limits the output value like clamping but can be tuned with a parameter, here `Tw=Ti`. But it has
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the same problem with slow disturbance rejection.
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</p>
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<p><img src="images/sim_backcalc_ti.png" width=100%></p>
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<p><img src="images/sim_backcalc_ti.png" alt="Clipped step response with back-calculation"></p>
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<h3>Disturbance with `Ti=2`</h3>
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To improve the disturbance rejection the integration time can be reduced to 2.
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<p><img src="images/sim_Ti2_disturbance.png" width=100%></p>
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<p><img src="images/sim_Ti2_disturbance.png" alt="Constant setpoint with unity disturbance and reduced integration time"></p>
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<h3>Clamping with `Ti=2`</h3>
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This also improves the recovery after the output has been clamped.
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<p><img src="images/sim_Ti2_clamping.png" width=100%></p>
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<p><img src="images/sim_Ti2_clamping.png" alt="Clampling with reduced integration time"></p>
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<h3>Step response with `Ti=2`</h3>
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Tracking performance is reduced though.
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<p><img src="images/sim_Ti2.png" width=100%></p>
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<p><img src="images/sim_Ti2.png" alt="Step response with reduce integration time"></p>
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</body>
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</html>

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