diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp
index bcdf6ba8bb1b96..57df941c5fe685 100644
--- a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp
+++ b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp
@@ -379,21 +379,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
             switch (intrin.numOperands)
             {
                 case 1:
-                    if (intrin.op1->isContained())
-                    {
-                        assert(ins == INS_ld1);
-
-                        // Emit 'ldr target, [base, index]'
-                        GenTreeAddrMode* lea = intrin.op1->AsAddrMode();
-                        assert(lea->GetScale() == 1);
-                        assert(lea->Offset() == 0);
-                        GetEmitter()->emitIns_R_R_R(INS_ldr, emitSize, targetReg, lea->Base()->GetRegNum(),
-                                                    lea->Index()->GetRegNum());
-                    }
-                    else
-                    {
-                        GetEmitter()->emitIns_R_R(ins, emitSize, targetReg, op1Reg, opt);
-                    }
+                    GetEmitter()->emitIns_R_R(ins, emitSize, targetReg, op1Reg, opt);
                     break;
 
                 case 2:
diff --git a/src/coreclr/jit/lower.cpp b/src/coreclr/jit/lower.cpp
index 75d999271d758e..8a810c65d5cdcf 100644
--- a/src/coreclr/jit/lower.cpp
+++ b/src/coreclr/jit/lower.cpp
@@ -6175,12 +6175,6 @@ bool Lowering::TryCreateAddrMode(GenTree* addr, bool isContainable, GenTree* par
     {
         return false;
     }
-
-    if (((scale | offset) != 0) && parent->OperIsHWIntrinsic())
-    {
-        // For now we only support unscaled indices for SIMD loads
-        return false;
-    }
 #endif
 
     if (scale == 0)