From db7d80a2156eec3fa5023068b506ebd347172638 Mon Sep 17 00:00:00 2001 From: Jakob Botsch Nielsen Date: Fri, 16 Feb 2024 22:14:16 +0100 Subject: [PATCH 1/2] JIT: Stop reporting FP locals as being on the x87 stack for 32-bit platforms We never store any locals on the x87 stack and haven't for a while. Also, the handling kicks in for arm32 as well which does not make sense. --- src/coreclr/jit/scopeinfo.cpp | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/src/coreclr/jit/scopeinfo.cpp b/src/coreclr/jit/scopeinfo.cpp index 01238efcfcbd0c..6d33caaf78027a 100644 --- a/src/coreclr/jit/scopeinfo.cpp +++ b/src/coreclr/jit/scopeinfo.cpp @@ -403,26 +403,12 @@ void CodeGenInterface::siVarLoc::siFillRegisterVarLoc( break; #endif // !TARGET_64BIT -#ifdef TARGET_64BIT case TYP_FLOAT: case TYP_DOUBLE: - // TODO-AMD64-Bug: ndp\clr\src\inc\corinfo.h has a definition of RegNum that only goes up to R15, - // so no XMM registers can get debug information. this->vlType = VLT_REG_FP; this->vlReg.vlrReg = varDsc->GetRegNum(); break; -#else // !TARGET_64BIT - - case TYP_FLOAT: - case TYP_DOUBLE: - if (isFloatRegType(type)) - { - this->vlType = VLT_FPSTK; - this->vlFPstk.vlfReg = varDsc->GetRegNum(); - } - break; - #endif // !TARGET_64BIT #ifdef FEATURE_SIMD @@ -436,9 +422,6 @@ void CodeGenInterface::siVarLoc::siFillRegisterVarLoc( { this->vlType = VLT_REG_FP; - // TODO-AMD64-Bug: ndp\clr\src\inc\corinfo.h has a definition of RegNum that only goes up to R15, - // so no XMM registers can get debug information. - // // Note: Need to initialize vlrReg field, otherwise during jit dump hitting an assert // in eeDispVar() --> getRegName() that regNumber is valid. this->vlReg.vlrReg = varDsc->GetRegNum(); From c80fc7d81c2fc413ae94b98124de6e8216cdb76b Mon Sep 17 00:00:00 2001 From: Jakob Botsch Nielsen Date: Fri, 16 Feb 2024 22:36:32 +0100 Subject: [PATCH 2/2] Stop testing in CI --- src/coreclr/jit/scopeinfo.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/coreclr/jit/scopeinfo.cpp b/src/coreclr/jit/scopeinfo.cpp index 6d33caaf78027a..7653318bb2ac2d 100644 --- a/src/coreclr/jit/scopeinfo.cpp +++ b/src/coreclr/jit/scopeinfo.cpp @@ -409,8 +409,6 @@ void CodeGenInterface::siVarLoc::siFillRegisterVarLoc( this->vlReg.vlrReg = varDsc->GetRegNum(); break; -#endif // !TARGET_64BIT - #ifdef FEATURE_SIMD case TYP_SIMD8: case TYP_SIMD12: