-
Notifications
You must be signed in to change notification settings - Fork 1
Expand file tree
/
Copy pathCPU6809.cpp
More file actions
2113 lines (1921 loc) · 65.7 KB
/
CPU6809.cpp
File metadata and controls
2113 lines (1921 loc) · 65.7 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
#include "GimeBus.h"
#include "CPU6809.h"
// cpu6809 Constructor
Cpu6809::Cpu6809()
{
waitingForNextOp = false;
cpuSoftHalt = CPU_SOFTWARE_HALT_NONE;
cpuHardwareHalt = false;
cpuHaltAsserted = false;
nextOpWaitCounter = 0;
cpuCyclesTotal = 0;
curOpCode = 0;
cpuReg.CC.E = true;
//fopen_s(&traceListFile, "D:\\Temp\\coco3emu_trace.lst", "wb");
}
uint8_t Cpu6809::readByteAtCurPC()
{
// Automatically increments the PC register
uint8_t readByte = gimeBus->readMemoryByte(cpuReg.PC);
cpuReg.PC++;
return readByte;
}
uint16_t Cpu6809::readWordAtCurPC()
{
// Automatically advances the PC register by 2 bytes
uint16_t readWord = gimeBus->readMemoryWord(cpuReg.PC);
cpuReg.PC += 2;
return readWord;
}
void Cpu6809::cpuClockTick()
{
#define DEBUGGER_ENABLED 1
if (nextOpWaitCounter != 0)
nextOpWaitCounter--;
else
{
if (cpuHardwareHalt)
return;
else if (cpuHaltAsserted)
{
cpuHardwareHalt = true;
cpuHaltAsserted = false;
}
// Check for asserted interrupt signals
if (assertedInterrupts[INT_NMI])
{
if (cpuSoftHalt != CPU_SOFTWARE_HALT_CWAI)
{
cpuReg.CC.E = true;
operandByte = 0xFF; // 0xFF = every bit set such that all registers are pushed to hardware stack
pushToStack(&cpuReg.S);
cpuReg.CC.F = true;
cpuReg.CC.I = true;
}
cpuSoftHalt = CPU_SOFTWARE_HALT_NONE;
cpuReg.PC = gimeBus->readMemoryWord(VECTOR_NMI);
// Since NMI interrupts are edge triggered, the Disk Controller (presumably) only sends a brief pulse to trigger the interrupt, and then it immediately returns to normal
assertedInterrupts[INT_NMI] &= ~INT_ASSERT_MASK_NMI;
}
else if (assertedInterrupts[INT_FIRQ])
{
if (!cpuReg.CC.F)
{
if (cpuSoftHalt != CPU_SOFTWARE_HALT_CWAI)
{
cpuReg.CC.E = false;
operandByte = MASK_PC | MASK_CC;
pushToStack(&cpuReg.S);
cpuReg.CC.F = true;
cpuReg.CC.I = true;
}
cpuSoftHalt = CPU_SOFTWARE_HALT_NONE;
cpuReg.PC = gimeBus->readMemoryWord(VECTOR_FIRQ);
}
else if (cpuSoftHalt == CPU_SOFTWARE_HALT_SYNC)
cpuSoftHalt = CPU_SOFTWARE_HALT_NONE;
}
else if (assertedInterrupts[INT_IRQ])
{
if (!cpuReg.CC.I)
{
if (cpuSoftHalt != CPU_SOFTWARE_HALT_CWAI)
{
cpuReg.CC.E = true;
operandByte = 0xFF; // 0xFF = every bit set such that all registers are pushed to hardware stack
pushToStack(&cpuReg.S);
cpuReg.CC.I = true;
}
cpuSoftHalt = CPU_SOFTWARE_HALT_NONE;
cpuReg.PC = gimeBus->readMemoryWord(VECTOR_IRQ);
}
else if (cpuSoftHalt == CPU_SOFTWARE_HALT_SYNC)
cpuSoftHalt = CPU_SOFTWARE_HALT_NONE;
}
else if (assertedInterrupts[INT_RESET])
{
cpuReg.PC = gimeBus->readMemoryWord(VECTOR_RESET);
assertedInterrupts[INT_RESET] &= ~INT_ASSERT_MASK_RESET;
cpuCyclesTotal += 2; // RESET interrupt uses 2 CPU cycles to complete
cpuSoftHalt = CPU_SOFTWARE_HALT_NONE;
}
if (cpuSoftHalt != CPU_SOFTWARE_HALT_NONE)
return;
// CPU is not halted so here we go! First grab opcode
debuggerRegPC = cpuReg.PC; // For our Debugger, Preserve the start address of instruction before the PC gets incremented by the handlers
curOpCode = readByteAtCurPC(); // Note: These functions auto-advance the PC by amount of bytes read
if ((curOpCode == 0x10) || (curOpCode == 0x11))
{
// Since this is a double-byte operation, read the next byte and feed the combination to our pointer-grabbing function
curOpCodeExtra = readByteAtCurPC();
extendedOpCodePtrs((curOpCode * 256) + curOpCodeExtra);
curOpCodeCycleCount = extendedOpCodeObjects.opBaseCycles;
curOpMnemonic = extendedOpCodeObjects.mnemonicName;
curAddrMode = (this->*extendedOpCodeObjects.addrModePtr)();
if (curAddrMode == -1) // Check if invalid instruction. If so, ignore first extended opcode prefix and treat 2nd byte as the actual opcode
{
curOpCode = curOpCodeExtra;
curOpCodeCycleCount = mainOpCodeLookup[curOpCode].opBaseCycles;
curOpMnemonic = mainOpCodeLookup[curOpCode].mnemonicName;
curAddrMode = (this->*mainOpCodeLookup[curOpCode].addrModePtr)();
if (curAddrMode == -1) // Check one last time if we still have invalid opcode, if so abort/return
{
cpuSoftHalt = CPU_SOFTWARE_HALT_OTHER;
printf("Halted CPU.\n");
return;
}
(this->*mainOpCodeLookup[curOpCode].execOpPtr)(curAddrMode);
}
else
(this->*extendedOpCodeObjects.execOpPtr)(curAddrMode);
}
else
{
curOpCodeCycleCount = mainOpCodeLookup[curOpCode].opBaseCycles;
curOpMnemonic = mainOpCodeLookup[curOpCode].mnemonicName;
// Next, we call the corresponding address mode function for the current instruction.
// This will either populate our Effective address, or the operand byte(s) needed for the operation.
curAddrMode = (this->*mainOpCodeLookup[curOpCode].addrModePtr)();
if (curAddrMode == -1) // Double-check for invalid instructions and abort/return if so
{
cpuSoftHalt = CPU_SOFTWARE_HALT_OTHER;
printf("Halted CPU.\n");
return;
}
// Now we execute our actual logic for the specified instruction
(this->*mainOpCodeLookup[curOpCode].execOpPtr)(curAddrMode);
}
// Finally, set our counter to the total CPU cycles our current instruction just used so we can wait that many "ticks" before executing the
// next instruction in order to syncronize with the other emulated hardware
nextOpWaitCounter = curOpCodeCycleCount - 1; // -1 since the actual all-at-once operation counts as the first "tick" in total CPU cycles needed for this operation
cpuCyclesTotal += curOpCodeCycleCount;
instructionTotalCounter++;
#ifdef DEBUGGER_ENABLED
printDebugMsgs();
#endif
}
}
void Cpu6809::pushToStack(uint16_t* stackPtr)
{
uint16_t stackAddr = *stackPtr;
if (operandByte & MASK_PC)
{
stackAddr -= 2;
curOpCodeCycleCount += 2;
gimeBus->writeMemoryWord(stackAddr, cpuReg.PC);
}
if (operandByte & MASK_SU)
{
stackAddr -= 2;
curOpCodeCycleCount += 2;
if (stackPtr == &cpuReg.S)
gimeBus->writeMemoryWord(stackAddr, cpuReg.U);
else if (stackPtr == &cpuReg.U)
gimeBus->writeMemoryWord(stackAddr, cpuReg.S);
}
if (operandByte & MASK_Y)
{
stackAddr -= 2;
curOpCodeCycleCount += 2;
gimeBus->writeMemoryWord(stackAddr, cpuReg.Y);
}
if (operandByte & MASK_X)
{
stackAddr -= 2;
curOpCodeCycleCount += 2;
gimeBus->writeMemoryWord(stackAddr, cpuReg.X);
}
if (operandByte & MASK_DP)
{
stackAddr--;
curOpCodeCycleCount++;
gimeBus->writeMemoryByte(stackAddr, cpuReg.DP);
}
if (operandByte & MASK_B)
{
stackAddr--;
curOpCodeCycleCount++;
gimeBus->writeMemoryByte(stackAddr, cpuReg.Acc.B);
}
if (operandByte & MASK_A)
{
stackAddr--;
curOpCodeCycleCount++;
gimeBus->writeMemoryByte(stackAddr, cpuReg.Acc.A);
}
if (operandByte & MASK_CC)
{
stackAddr--;
curOpCodeCycleCount++;
gimeBus->writeMemoryByte(stackAddr, cpuReg.CC.Byte);
}
*stackPtr = stackAddr;
}
void Cpu6809::pullFromStack(uint16_t* stackPtr)
{
uint16_t stackAddr = *stackPtr;
if (operandByte & MASK_CC)
{
curOpCodeCycleCount++;
//byteToFlags(gimeBus->readMemoryByte(stackAddr));
cpuReg.CC.Byte = gimeBus->readMemoryByte(stackAddr);
stackAddr++;
}
if (operandByte & MASK_A)
{
curOpCodeCycleCount++;
cpuReg.Acc.A = gimeBus->readMemoryByte(stackAddr);
stackAddr++;
}
if (operandByte & MASK_B)
{
curOpCodeCycleCount++;
cpuReg.Acc.B = gimeBus->readMemoryByte(stackAddr);
stackAddr++;
}
if (operandByte & MASK_DP)
{
curOpCodeCycleCount++;
cpuReg.DP = gimeBus->readMemoryByte(stackAddr);
stackAddr++;
}
if (operandByte & MASK_X)
{
curOpCodeCycleCount += 2;
cpuReg.X = gimeBus->readMemoryWord(stackAddr);
stackAddr += 2;
}
if (operandByte & MASK_Y)
{
curOpCodeCycleCount += 2;
cpuReg.Y = gimeBus->readMemoryWord(stackAddr);
stackAddr += 2;
}
if (operandByte & MASK_SU)
{
curOpCodeCycleCount += 2;
if (stackPtr == &cpuReg.S)
cpuReg.U = gimeBus->readMemoryWord(stackAddr);
else if (stackPtr == &cpuReg.U)
cpuReg.S = gimeBus->readMemoryWord(stackAddr);
stackAddr += 2;
}
if (operandByte & MASK_PC)
{
curOpCodeCycleCount += 2;
cpuReg.PC = gimeBus->readMemoryWord(stackAddr);
stackAddr += 2;
}
*stackPtr = stackAddr;
}
int Cpu6809::addrModeInherent()
{
*curOpAddressString = NULL;
return ADDR_INHERENT;
}
int Cpu6809::addrModeImmediateByte()
{
operandByte = readByteAtCurPC();
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "#$%02x", operandByte);
sprintf(curOpAddressString, "#$%02x", operandByte);
return ADDR_IMMEDIATE_BYTE;
}
int Cpu6809::addrModeImmediateWord()
{
operandWord = readWordAtCurPC();
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "#$%04x", operandWord);
sprintf(curOpAddressString, "#$%04x", operandWord);
return ADDR_IMMEDIATE_WORD;
}
int Cpu6809::addrModeImmediateRegs()
{
operandByte = readByteAtCurPC();
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "%s,%s", interRegNames[operandByte >> 4].c_str(), interRegNames[operandByte & 0x0F].c_str());
sprintf(curOpAddressString, "%s,%s", interRegNames[operandByte >> 4].c_str(), interRegNames[operandByte & 0x0F].c_str());
return ADDR_IMMEDIATE_BYTE;
}
int Cpu6809::addrModeImmediateStack()
{
operandByte = readByteAtCurPC();
#ifdef DEBUGGER_ENABLED
std::string disasmStackList;
uint8_t maskByte = 0x01;
if (operandByte & 0x01)
disasmStackList += "CC";
if (operandByte & 0x02)
if (!disasmStackList.empty())
disasmStackList += ",A";
else
disasmStackList += "A";
if (operandByte & 0x04)
if (!disasmStackList.empty())
disasmStackList += ",B";
else
disasmStackList += "B";
if (operandByte & 0x08)
if (!disasmStackList.empty())
disasmStackList += ",DP";
else
disasmStackList += "DP";
if (operandByte & 0x10)
if (!disasmStackList.empty())
disasmStackList += ",X";
else
disasmStackList += "X";
if (operandByte & 0x20)
if (!disasmStackList.empty())
disasmStackList += ",Y";
else
disasmStackList += "Y";
if (operandByte & 0x40)
{
if (!disasmStackList.empty())
disasmStackList += ",";
if (curOpMnemonic.at(3) == 'S')
disasmStackList += "U";
else if (curOpMnemonic.at(3) == 'U')
disasmStackList += "S";
}
if (operandByte & 0x80)
if (!disasmStackList.empty())
disasmStackList += ",PC";
else
disasmStackList += "PC";
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "%s", disasmStackList.c_str());
sprintf(curOpAddressString, "%s", disasmStackList.c_str());
#endif
return ADDR_IMMEDIATE_BYTE;
}
int Cpu6809::addrModeDirect()
{
operandByte = readByteAtCurPC();
effectiveAddr = ((cpuReg.DP * 256) + operandByte);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "<$%02x", operandByte);
sprintf(curOpAddressString, "<$%02x", operandByte);
return ADDR_DIRECT;
}
int Cpu6809::addrModeExtended()
{
operandWord = readWordAtCurPC();
effectiveAddr = operandWord;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "$%04x", operandWord);
sprintf(curOpAddressString, "$%04x", operandWord);
return ADDR_EXTENDED;
}
int Cpu6809::addrModeIndexed()
{
// This function will return the final 16-bit address in memory that the instruction ultimately accesses
// depended on the specific Indexing mode. This is referred to as the "Effective Address".
int8_t signedByte;
int16_t signedWord;
uint8_t paramByte = readByteAtCurPC();
uint8_t registerID = (paramByte & 0b01100000) >> 5;
char offsetSignChar = NULL;
if (paramByte & 0x80)
{
switch (paramByte & 0b10011111) // Strip off the Register ID (Bits 6-5) before comparing postbyte opcode
{
// "Constant offset from R" modes
case 0b10000100: // Non-Indirect addressing (No offset)
effectiveAddr = *indexedRegOrder[registerID]; // Use the Register ID as an index to lookup pointer to actual register value in our code
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), ",%c", indexRegName[registerID]);
sprintf(curOpAddressString, ",%c", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10010100: // Indirect addressing (No offset)
curOpCodeCycleCount += 3; // Uses an additional 3 cycles to perform the instruction
effectiveAddr = gimeBus->readMemoryWord(*indexedRegOrder[registerID]);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[,%c]", indexRegName[registerID]);
sprintf(curOpAddressString, "[,%c]", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10001000: // Non-Indirect addressing (8-bit offset)
curOpCodeCycleCount++; // Uses 1 additional cpu cycle
signedByte = readByteAtCurPC();
effectiveAddr = *indexedRegOrder[registerID] + signedByte; // Cast the unsigned byte into a signed one
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "%d,%c", signedByte, indexRegName[registerID]);
sprintf(curOpAddressString, "%d,%c", signedByte, indexRegName[registerID]);
return ADDR_INDEXED_WORD;
case 0b10011000: // Indirect addressing (8-bit offset)
curOpCodeCycleCount += 4; // Uses 4 additional cycles
signedByte = readByteAtCurPC();
effectiveAddr = gimeBus->readMemoryWord(*indexedRegOrder[registerID] + signedByte);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[%d,%c]", signedByte, indexRegName[registerID]);
sprintf(curOpAddressString, "[%d,%c]", signedByte, indexRegName[registerID]);
return ADDR_INDEXED_WORD;
case 0b10001001: // Non-Indirect addressing (16-bit offset)
curOpCodeCycleCount += 4;
signedWord = readWordAtCurPC();
effectiveAddr = *indexedRegOrder[registerID] + signedWord; // Cast the unsigned word into a signed one
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "%d,%c", signedWord, indexRegName[registerID]);
sprintf(curOpAddressString, "%d,%c", signedWord, indexRegName[registerID]);
return ADDR_INDEXED_DWORD;
case 0b10011001: // Indirect addressing (16-bit offset)
curOpCodeCycleCount += 7;
signedWord = readWordAtCurPC();
effectiveAddr = gimeBus->readMemoryWord(*indexedRegOrder[registerID] + signedWord);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[%d,%c]", signedWord, indexRegName[registerID]);
sprintf(curOpAddressString, "[%d,%c]", signedWord, indexRegName[registerID]);
return ADDR_INDEXED_DWORD;
// "Accumulator offset from R" modes (signed)
case 0b10000110: // Non-Indirect addressing (A register offset)
curOpCodeCycleCount++; // Uses 1 additional cpu cycle
effectiveAddr = *indexedRegOrder[registerID] + (int8_t)cpuReg.Acc.A;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "A,%c", indexRegName[registerID]);
sprintf(curOpAddressString, "A,%c", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10010110: // Indirect addressing (A register offset)
curOpCodeCycleCount += 4; // Uses 4 additional cpu cycles
effectiveAddr = gimeBus->readMemoryWord(*indexedRegOrder[registerID] + (int8_t)cpuReg.Acc.A);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[A,%c]", indexRegName[registerID]);
sprintf(curOpAddressString, "[A,%c]", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10000101: // Non-Indirect addressing (B register offset)
curOpCodeCycleCount++; // Uses 1 additional cpu cycle
effectiveAddr = *indexedRegOrder[registerID] + (int8_t)cpuReg.Acc.B;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "B,%c", indexRegName[registerID]);
sprintf(curOpAddressString, "B,%c", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10010101: // Indirect addressing (B register offset)
curOpCodeCycleCount += 4; // Uses 4 additional cpu cycles
effectiveAddr = gimeBus->readMemoryWord(*indexedRegOrder[registerID] + (int8_t)cpuReg.Acc.B);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[B,%c]", indexRegName[registerID]);
sprintf(curOpAddressString, "[B,%c]", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10001011: // Non-Indirect addressing (D register offset)
curOpCodeCycleCount += 4;
effectiveAddr = *indexedRegOrder[registerID] + (int16_t)cpuReg.Acc.D;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "D,%c", indexRegName[registerID]);
sprintf(curOpAddressString, "D,%c", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10011011: // Indirect addressing (D register offset)
curOpCodeCycleCount += 7;
effectiveAddr = gimeBus->readMemoryWord(*indexedRegOrder[registerID] + (int16_t)cpuReg.Acc.D);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[D,%c]", indexRegName[registerID]);
sprintf(curOpAddressString, "[D,%c]", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
// "Auto Increment/Decrement of R" modes
case 0b10000000: // Non-Indirect addressing (Post-increment by 1)
curOpCodeCycleCount += 2;
effectiveAddr = *indexedRegOrder[registerID];
if ((curOpCode < 0x30) || (curOpCode > 0x33) || (opcodeToIndexRegLookup[curOpCode & 0x03]) != registerID) // Skip auto-increment if LEAx instruction refers to itself in operand
*indexedRegOrder[registerID] += 1;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), ",%c+", indexRegName[registerID]);
sprintf(curOpAddressString, ",%c+", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10000001: // Non-Indirect addressing (Post-increment by 2)
curOpCodeCycleCount += 3;
effectiveAddr = *indexedRegOrder[registerID];
if ((curOpCode < 0x30) || (curOpCode > 0x33) || (opcodeToIndexRegLookup[curOpCode & 0x03]) != registerID) // Skip auto-increment if LEAx instruction refers to itself in operand
*indexedRegOrder[registerID] += 2;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), ",%c++", indexRegName[registerID]);
sprintf(curOpAddressString, ",%c++", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10010001: // Indirect addressing (Post-increment by 2)
curOpCodeCycleCount += 6;
effectiveAddr = gimeBus->readMemoryWord(*indexedRegOrder[registerID]);
*indexedRegOrder[registerID] += 2;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[,%c++]", indexRegName[registerID]);
sprintf(curOpAddressString, "[,%c++]", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10000010: // Non-Indirect addressing (Pre-decrement by 1)
curOpCodeCycleCount += 2;
*indexedRegOrder[registerID] -= 1;
effectiveAddr = *indexedRegOrder[registerID];
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), ",-%c", indexRegName[registerID]);
sprintf(curOpAddressString, ",-%c", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10000011: // Non-Indirect addressing (Pre-decrement by 2)
curOpCodeCycleCount += 3;
*indexedRegOrder[registerID] -= 2;
effectiveAddr = *indexedRegOrder[registerID];
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), ",--%c", indexRegName[registerID]);
sprintf(curOpAddressString, ",--%c", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
case 0b10010011: // Indirect addressing (Pre-decrement by 2)
curOpCodeCycleCount += 6;
*indexedRegOrder[registerID] -= 2;
effectiveAddr = gimeBus->readMemoryWord(*indexedRegOrder[registerID]);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[,--%c]", indexRegName[registerID]);
sprintf(curOpAddressString, "[,--%c]", indexRegName[registerID]);
return ADDR_INDEXED_BYTE;
// "Constant Offset from PC" modes (signed)
case 0b10001100: // Non-Indirect addressing (8-bit offset)
curOpCodeCycleCount++;
signedByte = readByteAtCurPC();
effectiveAddr = (cpuReg.PC + signedByte);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "%d,PCR", signedByte);
sprintf(curOpAddressString, "%d,PCR", signedByte);
return ADDR_INDEXED_WORD;
case 0b10011100: // Indirect addressing (8-bit offset)
curOpCodeCycleCount += 4;
signedByte = readByteAtCurPC();
effectiveAddr = gimeBus->readMemoryWord(cpuReg.PC + signedByte);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[%d,PCR]", signedByte);
sprintf(curOpAddressString, "[%d,PCR]", signedByte);
return ADDR_INDEXED_WORD;
case 0b10001101: // Non-Indirect addressing (16-bit offset)
curOpCodeCycleCount += 5;
signedWord = readWordAtCurPC();
effectiveAddr = (cpuReg.PC + signedWord);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "$%04x,PCR", signedWord);
sprintf(curOpAddressString, "$%04x,PCR", signedWord);
return ADDR_INDEXED_DWORD;
case 0b10011101: // Indirect addressing (16-bit offset)
curOpCodeCycleCount += 8;
signedWord = readWordAtCurPC();
effectiveAddr = gimeBus->readMemoryWord(cpuReg.PC + signedWord);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[$%04x,PCR]", signedWord);
sprintf(curOpAddressString, "[$%04x,PCR]", signedWord);
return ADDR_INDEXED_DWORD;
// "Extended Indirect" mode
case 0b10011111: // Indirect addressing (16-bit address)
curOpCodeCycleCount += 5;
operandWord = readWordAtCurPC();
effectiveAddr = gimeBus->readMemoryWord(operandWord);
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "[$%04x]", operandWord);
sprintf(curOpAddressString, "[$%04x]", operandWord);
return ADDR_INDEXED_DWORD;
}
}
else
{
// If here, the postbyte was less than 0x80 meaning this indexed mode is "Non-indirect Constant Offset from R (5-bit)".
// This special-case mode has the 5-bit offset embedded in the postbyte opcode itself.
signedByte = paramByte & 0b00011111; // Bits 4-0 of the postbyte opcode contain our 5-bit offset. Strip off the rest
if (signedByte > 15)
signedByte -= 32; // Converts unsigned to signed
curOpCodeCycleCount++; // Uses 1 additional cpu cycle
effectiveAddr = *indexedRegOrder[registerID] + signedByte;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "%d,%c", signedByte, indexRegName[registerID]);
sprintf(curOpAddressString, "%d,%c", signedByte, indexRegName[registerID]);
}
return ADDR_INDEXED_BYTE;
}
int Cpu6809::addrModeRelativeByte()
{
operandByte = readByteAtCurPC();
effectiveAddr = cpuReg.PC + (int8_t)operandByte;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "$%04x", effectiveAddr);
sprintf(curOpAddressString, "$%04x", effectiveAddr);
return ADDR_RELATIVE_BYTE;
}
int Cpu6809::addrModeRelativeWord()
{
operandWord = readWordAtCurPC();
effectiveAddr = cpuReg.PC + (int16_t)operandWord;
//sprintf_s(curOpAddressString, sizeof(curOpAddressString), "$%04x", effectiveAddr);
sprintf(curOpAddressString, "$%04x", effectiveAddr);
return ADDR_RELATIVE_WORD;
}
int Cpu6809::invalidOpCode()
{
// This functions handles invalid OpCodes
printf("Error: Invalid Op code = $%02X encountered @ $%04X.\n", curOpCode, debuggerRegPC);
return (-1);
}
uint8_t Cpu6809::getParamByte(int addrMode)
{
if (addrMode == ADDR_IMMEDIATE_BYTE)
return operandByte;
else
return gimeBus->readMemoryByte(effectiveAddr);
}
uint16_t Cpu6809::getParamWord(int addrMode)
{
if (addrMode == ADDR_IMMEDIATE_WORD)
return operandWord;
else
return gimeBus->readMemoryWord(effectiveAddr);
}
void Cpu6809::ABX(int addrMode)
{
cpuReg.X = cpuReg.X + cpuReg.Acc.B;
}
void Cpu6809::ADCA(int addrMode)
{
paramByte = getParamByte(addrMode); // This function will either return either "operandByte" for Immediate Address modes or the byte in Logical RAM pointed to by "effectiveAddr"
// Perform a 4-bit version of operation to properly set the half-carry flag
resultByte = (cpuReg.Acc.A & 0x0F) + (paramByte & 0x0F) + cpuReg.CC.C;
cpuReg.CC.H = (resultByte > 0x0F);
resultByte = cpuReg.Acc.A + paramByte + cpuReg.CC.C;
resultWord = cpuReg.Acc.A + paramByte + cpuReg.CC.C;
cpuReg.CC.V = (~(cpuReg.Acc.A ^ paramByte) & (cpuReg.Acc.A ^ resultByte)) & 0x80;
cpuReg.CC.C = (resultWord > 0xFF);
cpuReg.Acc.A = resultByte;
cpuReg.CC.Z = !cpuReg.Acc.A;
cpuReg.CC.N = (cpuReg.Acc.A & 0x80);
}
void Cpu6809::ADCB(int addrMode)
{
paramByte = getParamByte(addrMode); // This function will either return either "operandByte" for Immediate Address modes or the byte in Logical RAM pointed to by "effectiveAddr"
// Perform a 4-bit version of operation to properly set the half-carry flag
resultByte = (cpuReg.Acc.B & 0x0F) + (paramByte & 0x0F) + cpuReg.CC.C;
cpuReg.CC.H = (resultByte > 0x0F);
resultByte = cpuReg.Acc.B + paramByte + cpuReg.CC.C;
resultWord = cpuReg.Acc.B + paramByte + cpuReg.CC.C;
cpuReg.CC.V = (~(cpuReg.Acc.B ^ paramByte) & (cpuReg.Acc.B ^ resultByte)) & 0x80;
cpuReg.CC.C = (resultWord > 0xFF);
cpuReg.Acc.B = resultByte;
cpuReg.CC.Z = !cpuReg.Acc.B;
cpuReg.CC.N = (cpuReg.Acc.B & 0x80);
}
void Cpu6809::ADDA(int addrMode)
{
paramByte = getParamByte(addrMode); // This function will either return either "operandByte" for Immediate Address modes or the byte in Logical RAM pointed to by "effectiveAddr"
// Perform a 4-bit version of operation to properly set the half-carry flag
resultByte = (cpuReg.Acc.A & 0x0F) + (paramByte & 0x0F);
cpuReg.CC.H = (resultByte > 0x0F);
resultByte = cpuReg.Acc.A + paramByte;
resultWord = cpuReg.Acc.A + paramByte;
cpuReg.CC.V = (~(cpuReg.Acc.A ^ paramByte) & (cpuReg.Acc.A ^ resultByte)) & 0x80;
cpuReg.CC.C = (resultWord > 0xFF);
cpuReg.Acc.A = resultByte;
cpuReg.CC.Z = !cpuReg.Acc.A;
cpuReg.CC.N = (cpuReg.Acc.A & 0x80);
}
void Cpu6809::ADDB(int addrMode)
{
paramByte = getParamByte(addrMode); // This function will either return either "operandByte" for Immediate Address modes or the byte in Logical RAM pointed to by "effectiveAddr"
// Perform a 4-bit version of operation to properly set the half-carry flag
resultByte = (cpuReg.Acc.B & 0x0F) + (paramByte & 0x0F);
cpuReg.CC.H = (resultByte > 0x0F);
resultByte = cpuReg.Acc.B + paramByte;
resultWord = cpuReg.Acc.B + paramByte;
cpuReg.CC.V = (~(cpuReg.Acc.B ^ paramByte) & (cpuReg.Acc.B ^ resultByte)) & 0x80;
cpuReg.CC.C = (resultWord > 0xFF);
cpuReg.Acc.B = resultByte;
cpuReg.CC.Z = !cpuReg.Acc.B;
cpuReg.CC.N = (cpuReg.Acc.B & 0x80);
}
void Cpu6809::ADDD(int addrMode)
{
paramWord = getParamWord(addrMode);
resultWord = cpuReg.Acc.D + paramWord;
resultDWord = cpuReg.Acc.D + paramWord;
cpuReg.CC.V = (~(cpuReg.Acc.D ^ paramWord) & (cpuReg.Acc.D ^ resultWord)) & 0x8000;
cpuReg.CC.C = (resultDWord > 0xFFFF);
cpuReg.Acc.D = resultWord;
cpuReg.CC.Z = !cpuReg.Acc.D;
cpuReg.CC.N = (cpuReg.Acc.D & 0x8000);
}
void Cpu6809::ANDA(int addrMode)
{
cpuReg.Acc.A = cpuReg.Acc.A & getParamByte(addrMode);
cpuReg.CC.N = (cpuReg.Acc.A & 0x80);
cpuReg.CC.Z = !cpuReg.Acc.A;
cpuReg.CC.V = false;
}
void Cpu6809::ANDB(int addrMode)
{
cpuReg.Acc.B = cpuReg.Acc.B & getParamByte(addrMode);
cpuReg.CC.N = (cpuReg.Acc.B & 0x80);
cpuReg.CC.Z = !cpuReg.Acc.B;
cpuReg.CC.V = false;
}
void Cpu6809::ANDCC(int addrMode)
{
cpuReg.CC.Byte &= operandByte;
}
void Cpu6809::ASL(int addrMode)
{
resultByte = gimeBus->readMemoryByte(effectiveAddr);
cpuReg.CC.C = (resultByte & 0x80); // Carry flag will become the value of the current Negative sign bit 7 AFTER we do shift operation
cpuReg.CC.V = (bool)(resultByte & 0x40) ^ cpuReg.CC.C;
resultByte <<= 1; // Shift "resultByte" to the left once
cpuReg.CC.Z = !resultByte;
cpuReg.CC.N = (resultByte & 0x80);
gimeBus->writeMemoryByte(effectiveAddr, resultByte);
}
void Cpu6809::ASRA(int addrMode)
{
resultByte = cpuReg.Acc.A;
cpuReg.CC.C = (resultByte & 0x01);
resultByte = (int8_t)resultByte >> 1; // "resultByte" is casted as signed becase on right arithmetic shifts, the sign bit 7 is preserved
cpuReg.CC.Z = !resultByte;
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.Acc.A = resultByte;
}
void Cpu6809::ASRB(int addrMode)
{
resultByte = cpuReg.Acc.B;
cpuReg.CC.C = (resultByte & 0x01);
resultByte = (int8_t)resultByte >> 1; // "resultByte" is casted as signed becase on right arithmetic shifts, the sign bit 7 is preserved
cpuReg.CC.Z = !resultByte;
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.Acc.B = resultByte;
}
void Cpu6809::ASR(int addrMode)
{
resultByte = gimeBus->readMemoryByte(effectiveAddr);
cpuReg.CC.C = (resultByte & 0x01);
resultByte = (int8_t)resultByte >> 1; // "resultByte" is casted as signed becase on right arithmetic shifts, the sign bit 7 is preserved
cpuReg.CC.Z = !resultByte;
cpuReg.CC.N = (resultByte & 0x80);
gimeBus->writeMemoryByte(effectiveAddr, resultByte);
}
void Cpu6809::BITA(int addrMode)
{
resultByte = cpuReg.Acc.A & getParamByte(addrMode);
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
cpuReg.CC.V = false;
}
void Cpu6809::BITB(int addrMode)
{
resultByte = cpuReg.Acc.B & getParamByte(addrMode);
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
cpuReg.CC.V = false;
}
void Cpu6809::CLRA(int addrMode)
{
cpuReg.Acc.A = 0;
cpuReg.CC.N = false;
cpuReg.CC.Z = true;
cpuReg.CC.V = false;
cpuReg.CC.C = false;
}
void Cpu6809::CLRB(int addrMode)
{
cpuReg.Acc.B = 0;
cpuReg.CC.N = false;
cpuReg.CC.Z = true;
cpuReg.CC.V = false;
cpuReg.CC.C = false;
}
void Cpu6809::CLR(int addrMode)
{
// CLR instruction internally performs a READ operation on the bus, the result of which is discarded. But it's important to replicate that behavoir
// here since it can do things like acknowledge interrupts, etc.
gimeBus->readMemoryByte(effectiveAddr); // Dummy read memory bus operation
gimeBus->writeMemoryByte(effectiveAddr, 0);
cpuReg.CC.N = false;
cpuReg.CC.Z = true;
cpuReg.CC.V = false;
cpuReg.CC.C = false;
}
void Cpu6809::CMPA(int addrMode)
{
paramByte = getParamByte(addrMode); // This function will either return either "operandByte" for Immediate Address modes or the byte in Logical RAM pointed to by "effectiveAddr"
// Now we simulate the subtraction, but we do it using a 16-bit variable which can represent the result if it exceeds the 8-bit range
resultByte = cpuReg.Acc.A - paramByte;
cpuReg.CC.V = ((cpuReg.Acc.A ^ paramByte) & (cpuReg.Acc.A ^ resultByte)) & 0x80;
cpuReg.CC.C = (paramByte > cpuReg.Acc.A);
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
}
void Cpu6809::CMPB(int addrMode)
{
paramByte = getParamByte(addrMode); // This function will either return either "operandByte" for Immediate Address modes or the byte in Logical RAM pointed to by "effectiveAddr"
// Now we simulate the subtraction, but we do it using a 16-bit variable which can represent the result if it exceeds the 8-bit range
resultByte = cpuReg.Acc.B - paramByte;
cpuReg.CC.V = ((cpuReg.Acc.B ^ paramByte) & (cpuReg.Acc.B ^ resultByte)) & 0x80;
cpuReg.CC.C = (paramByte > cpuReg.Acc.B);
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
}
void Cpu6809::CMPD(int addrMode)
{
paramWord = getParamWord(addrMode);
resultWord = cpuReg.Acc.D - paramWord;
cpuReg.CC.V = ((cpuReg.Acc.D ^ paramWord) & (cpuReg.Acc.D ^ resultWord)) & 0x8000;
cpuReg.CC.C = (paramWord > cpuReg.Acc.D);
cpuReg.CC.N = (resultWord & 0x8000);
cpuReg.CC.Z = !resultWord;
}
void Cpu6809::CMPS(int addrMode)
{
paramWord = getParamWord(addrMode);
resultWord = cpuReg.S - paramWord;
cpuReg.CC.V = ((cpuReg.S ^ paramWord) & (cpuReg.S ^ resultWord)) & 0x8000;
cpuReg.CC.C = (paramWord > cpuReg.S);
cpuReg.CC.N = (resultWord & 0x8000);
cpuReg.CC.Z = !resultWord;
}
void Cpu6809::CMPU(int addrMode)
{
paramWord = getParamWord(addrMode);
resultWord = cpuReg.U - paramWord;
cpuReg.CC.V = ((cpuReg.U ^ paramWord) & (cpuReg.U ^ resultWord)) & 0x8000;
cpuReg.CC.C = (paramWord > cpuReg.U);
cpuReg.CC.N = (resultWord & 0x8000);
cpuReg.CC.Z = !resultWord;
}
void Cpu6809::CMPX(int addrMode)
{
paramWord = getParamWord(addrMode);
resultWord = cpuReg.X - paramWord;
cpuReg.CC.V = ((cpuReg.X ^ paramWord) & (cpuReg.X ^ resultWord)) & 0x8000;
cpuReg.CC.C = (paramWord > cpuReg.X);
cpuReg.CC.N = (resultWord & 0x8000);
cpuReg.CC.Z = !resultWord;
}
void Cpu6809::CMPY(int addrMode)
{
paramWord = getParamWord(addrMode);
resultWord = cpuReg.Y - paramWord;
cpuReg.CC.V = ((cpuReg.Y ^ paramWord) & (cpuReg.Y ^ resultWord)) & 0x8000;
cpuReg.CC.C = (paramWord > cpuReg.Y);
cpuReg.CC.N = (resultWord & 0x8000);
cpuReg.CC.Z = !resultWord;
}
void Cpu6809::COMA(int addrMode)
{
resultByte = ~cpuReg.Acc.A;
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
cpuReg.CC.V = false;
cpuReg.CC.C = true;
cpuReg.Acc.A = resultByte;
}
void Cpu6809::COMB(int addrMode)
{
resultByte = ~cpuReg.Acc.B;
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
cpuReg.CC.V = false;
cpuReg.CC.C = true;
cpuReg.Acc.B = resultByte;
}
void Cpu6809::COM(int addrMode)
{
resultByte = ~gimeBus->readMemoryByte(effectiveAddr);
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
cpuReg.CC.V = false;
cpuReg.CC.C = true;
gimeBus->writeMemoryByte(effectiveAddr, resultByte);
}
void Cpu6809::CWAI(int addrMode)
{
cpuReg.CC.Byte = cpuReg.CC.Byte & operandByte;
cpuReg.CC.E = true;
operandByte = MASK_CC | MASK_A | MASK_B | MASK_DP | MASK_X | MASK_Y | MASK_SU | MASK_PC;
pushToStack(&cpuReg.S); // Push ENTIRE machine state onto hardware stack
cpuSoftHalt = CPU_SOFTWARE_HALT_CWAI;
}
void Cpu6809::DAA(int addrMode)
{
// I'm grateful for this instruction because it lets me use the term "Nibble" in my code :D
uint8_t highNibble = cpuReg.Acc.A >> 4;
uint8_t lowNibble = cpuReg.Acc.A & 0x0F;
if (cpuReg.CC.C || (highNibble > 9) || ((highNibble > 8) && (lowNibble > 9)))
highNibble += 6;
if (cpuReg.CC.H || (lowNibble > 9))
lowNibble += 6;
resultWord = (highNibble * 16) + lowNibble;
cpuReg.CC.C = (resultWord > 0xFF);
cpuReg.Acc.A = (uint8_t)resultWord;
cpuReg.CC.N = (cpuReg.Acc.A & 0x80);
cpuReg.CC.Z = !cpuReg.Acc.A;
}
void Cpu6809::DECA(int addrMode)
{
resultByte = cpuReg.Acc.A;
cpuReg.CC.V = (resultByte == 0x80);
resultByte--;
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
cpuReg.Acc.A = resultByte;
}
void Cpu6809::DECB(int addrMode)
{
resultByte = cpuReg.Acc.B;
cpuReg.CC.V = (resultByte == 0x80);
resultByte--;
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
cpuReg.Acc.B = resultByte;
}
void Cpu6809::DEC(int addrMode)
{
resultByte = gimeBus->readMemoryByte(effectiveAddr);
cpuReg.CC.V = (resultByte == 0x80);
resultByte--;
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
gimeBus->writeMemoryByte(effectiveAddr, resultByte);
}
void Cpu6809::EORA(int addrMode)
{
resultByte = cpuReg.Acc.A ^ getParamByte(addrMode);
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
cpuReg.CC.V = false;
cpuReg.Acc.A = resultByte;
}
void Cpu6809::EORB(int addrMode)
{
resultByte = cpuReg.Acc.B ^ getParamByte(addrMode);
cpuReg.CC.N = (resultByte & 0x80);
cpuReg.CC.Z = !resultByte;
cpuReg.CC.V = false;
cpuReg.Acc.B = resultByte;
}
void Cpu6809::EXG(int addrMode)
{
uint8_t sourceReg = operandByte >> 4;
uint8_t destReg = operandByte & 0x0F;