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time: Update examples, tests, and other code to use new Timer::after_x convenience methods
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-501
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174 files changed

+496
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lines changed

cyw43/src/bus.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
use embassy_futures::yield_now;
2-
use embassy_time::{Duration, Timer};
2+
use embassy_time::Timer;
33
use embedded_hal_1::digital::OutputPin;
44
use futures::FutureExt;
55

@@ -51,9 +51,9 @@ where
5151
pub async fn init(&mut self) {
5252
// Reset
5353
self.pwr.set_low().unwrap();
54-
Timer::after(Duration::from_millis(20)).await;
54+
Timer::after_millis(20).await;
5555
self.pwr.set_high().unwrap();
56-
Timer::after(Duration::from_millis(250)).await;
56+
Timer::after_millis(250).await;
5757

5858
while self
5959
.read32_swapped(REG_BUS_TEST_RO)

cyw43/src/control.rs

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@ use core::cmp::{max, min};
22

33
use ch::driver::LinkState;
44
use embassy_net_driver_channel as ch;
5-
use embassy_time::{Duration, Timer};
5+
use embassy_time::Timer;
66

77
pub use crate::bus::SpiBusCyw43;
88
use crate::consts::*;
@@ -87,22 +87,22 @@ impl<'a> Control<'a> {
8787
self.set_iovar("country", &country_info.to_bytes()).await;
8888

8989
// set country takes some time, next ioctls fail if we don't wait.
90-
Timer::after(Duration::from_millis(100)).await;
90+
Timer::after_millis(100).await;
9191

9292
// Set antenna to chip antenna
9393
self.ioctl_set_u32(IOCTL_CMD_ANTDIV, 0, 0).await;
9494

9595
self.set_iovar_u32("bus:txglom", 0).await;
96-
Timer::after(Duration::from_millis(100)).await;
96+
Timer::after_millis(100).await;
9797
//self.set_iovar_u32("apsta", 1).await; // this crashes, also we already did it before...??
98-
//Timer::after(Duration::from_millis(100)).await;
98+
//Timer::after_millis(100).await;
9999
self.set_iovar_u32("ampdu_ba_wsize", 8).await;
100-
Timer::after(Duration::from_millis(100)).await;
100+
Timer::after_millis(100).await;
101101
self.set_iovar_u32("ampdu_mpdu", 4).await;
102-
Timer::after(Duration::from_millis(100)).await;
102+
Timer::after_millis(100).await;
103103
//self.set_iovar_u32("ampdu_rx_factor", 0).await; // this crashes
104104

105-
//Timer::after(Duration::from_millis(100)).await;
105+
//Timer::after_millis(100).await;
106106

107107
// evts
108108
let mut evts = EventMask {
@@ -121,17 +121,17 @@ impl<'a> Control<'a> {
121121

122122
self.set_iovar("bsscfg:event_msgs", &evts.to_bytes()).await;
123123

124-
Timer::after(Duration::from_millis(100)).await;
124+
Timer::after_millis(100).await;
125125

126126
// set wifi up
127127
self.up().await;
128128

129-
Timer::after(Duration::from_millis(100)).await;
129+
Timer::after_millis(100).await;
130130

131131
self.ioctl_set_u32(110, 0, 1).await; // SET_GMODE = auto
132132
self.ioctl_set_u32(142, 0, 0).await; // SET_BAND = any
133133

134-
Timer::after(Duration::from_millis(100)).await;
134+
Timer::after_millis(100).await;
135135

136136
self.state_ch.set_ethernet_address(mac_addr);
137137

@@ -185,7 +185,7 @@ impl<'a> Control<'a> {
185185
self.set_iovar_u32x2("bsscfg:sup_wpa2_eapver", 0, 0xFFFF_FFFF).await;
186186
self.set_iovar_u32x2("bsscfg:sup_wpa_tmo", 0, 2500).await;
187187

188-
Timer::after(Duration::from_millis(100)).await;
188+
Timer::after_millis(100).await;
189189

190190
let mut pfi = PassphraseInfo {
191191
len: passphrase.len() as _,
@@ -297,7 +297,7 @@ impl<'a> Control<'a> {
297297
if security != Security::OPEN {
298298
self.set_iovar_u32x2("bsscfg:wpa_auth", 0, 0x0084).await; // wpa_auth = WPA2_AUTH_PSK | WPA_AUTH_PSK
299299

300-
Timer::after(Duration::from_millis(100)).await;
300+
Timer::after_millis(100).await;
301301

302302
// Set passphrase
303303
let mut pfi = PassphraseInfo {

cyw43/src/runner.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -555,14 +555,14 @@ where
555555

556556
self.bus.bp_write8(base + AI_RESETCTRL_OFFSET, 0).await;
557557

558-
Timer::after(Duration::from_millis(1)).await;
558+
Timer::after_millis(1).await;
559559

560560
self.bus
561561
.bp_write8(base + AI_IOCTRL_OFFSET, AI_IOCTRL_BIT_CLOCK_EN)
562562
.await;
563563
let _ = self.bus.bp_read8(base + AI_IOCTRL_OFFSET).await;
564564

565-
Timer::after(Duration::from_millis(1)).await;
565+
Timer::after_millis(1).await;
566566
}
567567

568568
async fn core_is_up(&mut self, core: Core) -> bool {

embassy-embedded-hal/src/shared_bus/asynch/spi.rs

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -76,9 +76,7 @@ where
7676
#[cfg(not(feature = "time"))]
7777
Operation::DelayUs(_) => return Err(SpiDeviceError::DelayUsNotSupported),
7878
#[cfg(feature = "time")]
79-
Operation::DelayUs(us) => {
80-
embassy_time::Timer::after(embassy_time::Duration::from_micros(*us as _)).await
81-
}
79+
Operation::DelayUs(us) => embassy_time::Timer::after_micros(*us as _).await,
8280
}
8381
}
8482
};
@@ -143,9 +141,7 @@ where
143141
#[cfg(not(feature = "time"))]
144142
Operation::DelayUs(_) => return Err(SpiDeviceError::DelayUsNotSupported),
145143
#[cfg(feature = "time")]
146-
Operation::DelayUs(us) => {
147-
embassy_time::Timer::after(embassy_time::Duration::from_micros(*us as _)).await
148-
}
144+
Operation::DelayUs(us) => embassy_time::Timer::after_micros(*us as _).await,
149145
}
150146
}
151147
};

embassy-lora/src/lib.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,6 @@ impl lorawan_device::async_device::radio::Timer for LoraTimer {
3434
}
3535

3636
async fn delay_ms(&mut self, millis: u64) {
37-
Timer::after(Duration::from_millis(millis)).await
37+
Timer::after_millis(millis).await
3838
}
3939
}

embassy-net-adin1110/src/lib.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ pub use crc32::ETH_FCS;
2020
use crc8::crc8;
2121
use embassy_futures::select::{select, Either};
2222
use embassy_net_driver_channel as ch;
23-
use embassy_time::{Duration, Timer};
23+
use embassy_time::Timer;
2424
use embedded_hal_1::digital::OutputPin;
2525
use embedded_hal_async::digital::Wait;
2626
use embedded_hal_async::spi::{Error, Operation, SpiDevice};
@@ -609,12 +609,12 @@ pub async fn new<const N_RX: usize, const N_TX: usize, SPI: SpiDevice, INT: Wait
609609
reset.set_low().unwrap();
610610

611611
// Wait t1: 20-43mS
612-
Timer::after(Duration::from_millis(30)).await;
612+
Timer::after_millis(30).await;
613613

614614
reset.set_high().unwrap();
615615

616616
// Wait t3: 50mS
617-
Timer::after(Duration::from_millis(50)).await;
617+
Timer::after_millis(50).await;
618618

619619
// Create device
620620
let mut mac = ADIN1110::new(spi_dev, spi_crc, append_fcs_on_tx);

embassy-net-esp-hosted/src/lib.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -169,9 +169,9 @@ where
169169
pub async fn run(mut self) -> ! {
170170
debug!("resetting...");
171171
self.reset.set_low().unwrap();
172-
Timer::after(Duration::from_millis(100)).await;
172+
Timer::after_millis(100).await;
173173
self.reset.set_high().unwrap();
174-
Timer::after(Duration::from_millis(1000)).await;
174+
Timer::after_millis(1000).await;
175175

176176
let mut tx_buf = [0u8; MAX_SPI_BUFFER_SIZE];
177177
let mut rx_buf = [0u8; MAX_SPI_BUFFER_SIZE];

embassy-net-wiznet/src/lib.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@ mod device;
88
use embassy_futures::select::{select, Either};
99
use embassy_net_driver_channel as ch;
1010
use embassy_net_driver_channel::driver::LinkState;
11-
use embassy_time::{Duration, Timer};
11+
use embassy_time::Timer;
1212
use embedded_hal::digital::OutputPin;
1313
use embedded_hal_async::digital::Wait;
1414
use embedded_hal_async::spi::SpiDevice;
@@ -95,12 +95,12 @@ pub async fn new<'a, const N_RX: usize, const N_TX: usize, C: Chip, SPI: SpiDevi
9595
// Reset the chip.
9696
reset.set_low().ok();
9797
// Ensure the reset is registered.
98-
Timer::after(Duration::from_millis(1)).await;
98+
Timer::after_millis(1).await;
9999
reset.set_high().ok();
100100

101101
// Wait for PLL lock. Some chips are slower than others.
102102
// Slowest is w5100s which is 100ms, so let's just wait that.
103-
Timer::after(Duration::from_millis(100)).await;
103+
Timer::after_millis(100).await;
104104

105105
let mac = WiznetDevice::new(spi_dev, mac_addr).await.unwrap();
106106

embassy-rp/src/uart/buffered.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ use core::task::Poll;
55
use atomic_polyfill::{AtomicU8, Ordering};
66
use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
77
use embassy_sync::waitqueue::AtomicWaker;
8-
use embassy_time::{Duration, Timer};
8+
use embassy_time::Timer;
99

1010
use super::*;
1111
use crate::clocks::clk_peri_freq;
@@ -435,7 +435,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
435435
Self::flush().await.unwrap();
436436
while self.busy() {}
437437
regs.uartlcr_h().write_set(|w| w.set_brk(true));
438-
Timer::after(Duration::from_micros(wait_usecs)).await;
438+
Timer::after_micros(wait_usecs).await;
439439
regs.uartlcr_h().write_clear(|w| w.set_brk(true));
440440
}
441441
}

embassy-rp/src/uart/mod.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ use atomic_polyfill::{AtomicU16, Ordering};
66
use embassy_futures::select::{select, Either};
77
use embassy_hal_internal::{into_ref, PeripheralRef};
88
use embassy_sync::waitqueue::AtomicWaker;
9-
use embassy_time::{Duration, Timer};
9+
use embassy_time::Timer;
1010
use pac::uart::regs::Uartris;
1111

1212
use crate::clocks::clk_peri_freq;
@@ -187,7 +187,7 @@ impl<'d, T: Instance, M: Mode> UartTx<'d, T, M> {
187187
self.blocking_flush().unwrap();
188188
while self.busy() {}
189189
regs.uartlcr_h().write_set(|w| w.set_brk(true));
190-
Timer::after(Duration::from_micros(wait_usecs)).await;
190+
Timer::after_micros(wait_usecs).await;
191191
regs.uartlcr_h().write_clear(|w| w.set_brk(true));
192192
}
193193
}

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