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‎Documentation/ABI/stable/sysfs-driver-dma-idxd‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -136,6 +136,21 @@ Description: The last executed device administrative command's status/error.
136136
Also last configuration error overloaded.
137137
Writing to it will clear the status.
138138

139+
What: /sys/bus/dsa/devices/dsa<m>/dsacaps
140+
Date: April 5, 2026
141+
KernelVersion: 6.20.0
142+
Contact: dmaengine@vger.kernel.org
143+
Description: The DSA3 specification introduces three new capability
144+
registers: dsacap[0-2]. User components (e.g., configuration
145+
libraries and workload applications) require this information
146+
to properly utilize the DSA3 features.
147+
This includes SGL capability support, Enabling hardware-specific
148+
optimizations, Configuring memory, etc.
149+
The output format is '<dsacap2>,<dsacap1>,<dsacap0>' where each
150+
DSA cap value is a 64 bit hex value.
151+
This attribute should only be visible on DSA devices of version
152+
3 or later.
153+
139154
What: /sys/bus/dsa/devices/dsa<m>/iaa_cap
140155
Date: Sept 14, 2022
141156
KernelVersion: 6.0.0

‎Documentation/ABI/stable/sysfs-driver-speakup‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -23,8 +23,7 @@ What: /sys/accessibility/speakup/bleep_time
2323
KernelVersion: 2.6
2424
Contact: speakup@linux-speakup.org
2525
Description: This controls the duration of the PC speaker beeps speakup
26-
produces.
27-
TODO: What are the units? Jiffies?
26+
produces, in milliseconds.
2827

2928
What: /sys/accessibility/speakup/cursor_time
3029
KernelVersion: 2.6

‎Documentation/ABI/testing/configfs-usb-gadget-midi‎

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -4,11 +4,12 @@ KernelVersion: 3.19
44
Description:
55
The attributes:
66

7-
========== ====================================
8-
index index value for the USB MIDI adapter
9-
id ID string for the USB MIDI adapter
10-
buflen MIDI buffer length
11-
qlen USB read request queue length
12-
in_ports number of MIDI input ports
13-
out_ports number of MIDI output ports
14-
========== ====================================
7+
================ ====================================
8+
index index value for the USB MIDI adapter
9+
id ID string for the USB MIDI adapter
10+
buflen MIDI buffer length
11+
qlen USB read request queue length
12+
in_ports number of MIDI input ports
13+
out_ports number of MIDI output ports
14+
interface_string USB AudioControl interface string
15+
================ ====================================

‎Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
What: /sys/bus/coresight/devices/dummy_source<N>/enable_source
22
Date: Dec 2024
33
KernelVersion: 6.14
4-
Contact: Mao Jinlong <quic_jinlmao@quicinc.com>
4+
Contact: Mao Jinlong <jinlong.mao@oss.qualcomm.com>
55
Description: (RW) Enable/disable tracing of dummy source. A sink should be activated
66
before enabling the source. The path of coresight components linking
77
the source to the sink is configured and managed automatically by the
@@ -10,7 +10,7 @@ Description: (RW) Enable/disable tracing of dummy source. A sink should be activ
1010
What: /sys/bus/coresight/devices/dummy_source<N>/traceid
1111
Date: Dec 2024
1212
KernelVersion: 6.14
13-
Contact: Mao Jinlong <quic_jinlmao@quicinc.com>
13+
Contact: Mao Jinlong <jinlong.mao@oss.qualcomm.com>
1414
Description: (R) Show the trace ID that will appear in the trace stream
1515
coming from this trace entity.
1616

‎Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda‎

Lines changed: 69 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,69 @@
1+
What: /sys/bus/coresight/devices/<tpda-name>/trig_async_enable
2+
Date: December 2025
3+
KernelVersion: 6.20
4+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
5+
Description:
6+
(RW) Enable/disable cross trigger synchronization sequence interface.
7+
8+
What: /sys/bus/coresight/devices/<tpda-name>/trig_flag_ts_enable
9+
Date: December 2025
10+
KernelVersion: 6.20
11+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
12+
Description:
13+
(RW) Enable/disable cross trigger FLAG packet request interface.
14+
15+
What: /sys/bus/coresight/devices/<tpda-name>/trig_freq_enable
16+
Date: December 2025
17+
KernelVersion: 6.20
18+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
19+
Description:
20+
(RW) Enable/disable cross trigger FREQ packet request interface.
21+
22+
What: /sys/bus/coresight/devices/<tpda-name>/freq_ts_enable
23+
Date: December 2025
24+
KernelVersion: 6.20
25+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
26+
Description:
27+
(RW) Enable/disable the timestamp for all FREQ packets.
28+
29+
What: /sys/bus/coresight/devices/<tpda-name>/cmbchan_mode
30+
Date: December 2025
31+
KernelVersion: 6.20
32+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
33+
Description:
34+
(RW) Configure the CMB/MCMB channel mode for all enabled ports.
35+
Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode.
36+
37+
What: /sys/bus/coresight/devices/<tpda-name>/global_flush_req
38+
Date: December 2025
39+
KernelVersion: 6.20
40+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
41+
Description:
42+
(RW) Set global (all ports) flush request bit. The bit remains set until a
43+
global flush request sequence completes.
44+
45+
What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode
46+
Date: December 2025
47+
KernelVersion: 6.20
48+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
49+
Description:
50+
(RW) Set mode the of the syncr counter.
51+
mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests
52+
mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K
53+
data by writing a value 13 to the COUNT[11:7] field.
54+
55+
What: /sys/bus/coresight/devices/<tpda-name>/syncr_count
56+
Date: December 2025
57+
KernelVersion: 6.20
58+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
59+
Description:
60+
(RW) Set value the of the syncr counter.
61+
Range: 0-4095
62+
63+
What: /sys/bus/coresight/devices/<tpda-name>/port_flush_req
64+
Date: December 2025
65+
KernelVersion: 6.20
66+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
67+
Description:
68+
(RW) Configure the bit i to requests a flush operation of port i on the TPDA.
69+
The requested bit(s) remain set until the flush request completes.

‎Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm‎

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
22
Date: January 2023
33
KernelVersion: 6.2
4-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
4+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
55
Description:
66
(Write) Run integration test for tpdm. Integration test
77
will generate test data for tpdm. It can help to make
@@ -15,7 +15,7 @@ Description:
1515
What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset
1616
Date: March 2023
1717
KernelVersion: 6.7
18-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
18+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
1919
Description:
2020
(Write) Reset the dataset of the tpdm.
2121

@@ -25,7 +25,7 @@ Description:
2525
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type
2626
Date: March 2023
2727
KernelVersion: 6.7
28-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
28+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
2929
Description:
3030
(RW) Set/Get the trigger type of the DSB for tpdm.
3131

@@ -36,7 +36,7 @@ Description:
3636
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts
3737
Date: March 2023
3838
KernelVersion: 6.7
39-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
39+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
4040
Description:
4141
(RW) Set/Get the trigger timestamp of the DSB for tpdm.
4242

@@ -47,7 +47,7 @@ Description:
4747
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode
4848
Date: March 2023
4949
KernelVersion: 6.7
50-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
50+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
5151
Description:
5252
(RW) Set/Get the programming mode of the DSB for tpdm.
5353

@@ -61,7 +61,7 @@ Description:
6161
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx
6262
Date: March 2023
6363
KernelVersion: 6.7
64-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
64+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
6565
Description:
6666
(RW) Set/Get the index number of the edge detection for the DSB
6767
subunit TPDM. Since there are at most 256 edge detections, this
@@ -70,7 +70,7 @@ Description:
7070
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val
7171
Date: March 2023
7272
KernelVersion: 6.7
73-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
73+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
7474
Description:
7575
Write a data to control the edge detection corresponding to
7676
the index number. Before writing data to this sysfs file,
@@ -86,7 +86,7 @@ Description:
8686
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask
8787
Date: March 2023
8888
KernelVersion: 6.7
89-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
89+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
9090
Description:
9191
Write a data to mask the edge detection corresponding to the index
9292
number. Before writing data to this sysfs file, "ctrl_idx" should
@@ -98,51 +98,51 @@ Description:
9898
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15]
9999
Date: March 2023
100100
KernelVersion: 6.7
101-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
101+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
102102
Description:
103103
Read a set of the edge control value of the DSB in TPDM.
104104

105105
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7]
106106
Date: March 2023
107107
KernelVersion: 6.7
108-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
108+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
109109
Description:
110110
Read a set of the edge control mask of the DSB in TPDM.
111111

112112
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7]
113113
Date: March 2023
114114
KernelVersion: 6.7
115-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
115+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
116116
Description:
117117
(RW) Set/Get the value of the trigger pattern for the DSB
118118
subunit TPDM.
119119

120120
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7]
121121
Date: March 2023
122122
KernelVersion: 6.7
123-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
123+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
124124
Description:
125125
(RW) Set/Get the mask of the trigger pattern for the DSB
126126
subunit TPDM.
127127

128128
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7]
129129
Date: March 2023
130130
KernelVersion: 6.7
131-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
131+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
132132
Description:
133133
(RW) Set/Get the value of the pattern for the DSB subunit TPDM.
134134

135135
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7]
136136
Date: March 2023
137137
KernelVersion: 6.7
138-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
138+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
139139
Description:
140140
(RW) Set/Get the mask of the pattern for the DSB subunit TPDM.
141141

142142
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts
143143
Date: March 2023
144144
KernelVersion: 6.7
145-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
145+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
146146
Description:
147147
(Write) Set the pattern timestamp of DSB tpdm. Read
148148
the pattern timestamp of DSB tpdm.
@@ -154,7 +154,7 @@ Description:
154154
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type
155155
Date: March 2023
156156
KernelVersion: 6.7
157-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
157+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
158158
Description:
159159
(Write) Set the pattern type of DSB tpdm. Read
160160
the pattern type of DSB tpdm.
@@ -166,15 +166,15 @@ Description:
166166
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31]
167167
Date: March 2023
168168
KernelVersion: 6.7
169-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
169+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
170170
Description:
171171
(RW) Set/Get the MSR(mux select register) for the DSB subunit
172172
TPDM.
173173

174174
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_mode
175175
Date: January 2024
176176
KernelVersion: 6.9
177-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
177+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
178178
Description: (Write) Set the data collection mode of CMB tpdm. Continuous
179179
change creates CMB data set elements on every CMBCLK edge.
180180
Trace-on-change creates CMB data set elements only when a new
@@ -188,37 +188,37 @@ Description: (Write) Set the data collection mode of CMB tpdm. Continuous
188188
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpr[0:1]
189189
Date: January 2024
190190
KernelVersion: 6.9
191-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
191+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
192192
Description:
193193
(RW) Set/Get the value of the trigger pattern for the CMB
194194
subunit TPDM.
195195

196196
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpmr[0:1]
197197
Date: January 2024
198198
KernelVersion: 6.9
199-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
199+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
200200
Description:
201201
(RW) Set/Get the mask of the trigger pattern for the CMB
202202
subunit TPDM.
203203

204204
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:1]
205205
Date: January 2024
206206
KernelVersion: 6.9
207-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
207+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
208208
Description:
209209
(RW) Set/Get the value of the pattern for the CMB subunit TPDM.
210210

211211
What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:1]
212212
Date: January 2024
213213
KernelVersion: 6.9
214-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
214+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
215215
Description:
216216
(RW) Set/Get the mask of the pattern for the CMB subunit TPDM.
217217

218218
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_patt/enable_ts
219219
Date: January 2024
220220
KernelVersion: 6.9
221-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
221+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
222222
Description:
223223
(Write) Set the pattern timestamp of CMB tpdm. Read
224224
the pattern timestamp of CMB tpdm.
@@ -230,7 +230,7 @@ Description:
230230
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_ts
231231
Date: January 2024
232232
KernelVersion: 6.9
233-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
233+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
234234
Description:
235235
(RW) Set/Get the trigger timestamp of the CMB for tpdm.
236236

@@ -241,7 +241,7 @@ Description:
241241
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_ts_all
242242
Date: January 2024
243243
KernelVersion: 6.9
244-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
244+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
245245
Description:
246246
(RW) Read or write the status of timestamp upon all interface.
247247
Only value 0 and 1 can be written to this node. Set this node to 1 to request
@@ -253,23 +253,23 @@ Description:
253253
What: /sys/bus/coresight/devices/<tpdm-name>/cmb_msr/msr[0:31]
254254
Date: January 2024
255255
KernelVersion: 6.9
256-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
256+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
257257
Description:
258258
(RW) Set/Get the MSR(mux select register) for the CMB subunit
259259
TPDM.
260260

261261
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_trig_lane
262262
Date: Feb 2025
263263
KernelVersion 6.15
264-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
264+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
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Description:
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(RW) Set/Get which lane participates in the output pattern
267267
match cross trigger mechanism for the MCMB subunit TPDM.
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269269
What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_lanes_select
270270
Date: Feb 2025
271271
KernelVersion 6.15
272-
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
272+
Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
273273
Description:
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(RW) Set/Get the enablement of the individual lane.
275275

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