From fb976faf6b2b069d4071e181abdd82d135e0f528 Mon Sep 17 00:00:00 2001 From: WillyLiu-EC Date: Wed, 8 Dec 2021 18:13:29 +0800 Subject: [PATCH 1/4] Add temporary version of platform wedge100bf-32qs. --- .../installer/installed/builds/boot-config | 1 + .../jessie/common/all-base-packages.yml | 30 ++ .../stretch/common/all-base-packages.yml | 47 +++ make/kbuild.mk | 8 +- .../accton/x86-64/wedge100bf-32qs/.gitignore | 3 + .../accton/x86-64/wedge100bf-32qs/Makefile | 1 + .../x86-64/wedge100bf-32qs/modules/Makefile | 1 + .../x86-64/wedge100bf-32qs/modules/PKG.yml | 1 + .../x86-64/wedge100bf-32qs/onlp/Makefile | 1 + .../x86-64/wedge100bf-32qs/onlp/PKG.yml | 1 + .../wedge100bf-32qs/onlp/builds/Makefile | 2 + .../wedge100bf-32qs/onlp/builds/lib/Makefile | 2 + .../onlp/builds/onlpdump/Makefile | 2 + .../x86_64_accton_wedge100bf_32qs/.module | 1 + .../x86_64_accton_wedge100bf_32qs/Makefile | 9 + .../x86_64_accton_wedge100bf_32qs/README | 6 + .../module/auto/make.mk | 9 + .../auto/x86_64_accton_wedge100bf_32qs.yml | 50 +++ .../x86_64_accton_wedge100bf_32qs.x | 14 + .../x86_64_accton_wedge100bf_32qs_config.h | 137 +++++++ .../x86_64_accton_wedge100bf_32qs_dox.h | 26 ++ .../x86_64_accton_wedge100bf_32qs_porting.h | 97 +++++ .../module/make.mk | 10 + .../module/src/Makefile | 9 + .../module/src/fani.c | 222 ++++++++++ .../module/src/ledi.c | 220 ++++++++++ .../module/src/make.mk | 9 + .../module/src/platform_lib.c | 385 ++++++++++++++++++ .../module/src/platform_lib.h | 74 ++++ .../module/src/psui.c | 230 +++++++++++ .../module/src/sfpi.c | 229 +++++++++++ .../module/src/sysi.c | 115 ++++++ .../module/src/thermali.c | 129 ++++++ .../x86_64_accton_wedge100bf_32qs_config.c | 80 ++++ .../src/x86_64_accton_wedge100bf_32qs_enums.c | 10 + .../src/x86_64_accton_wedge100bf_32qs_int.h | 12 + .../src/x86_64_accton_wedge100bf_32qs_log.c | 18 + .../src/x86_64_accton_wedge100bf_32qs_log.h | 12 + .../x86_64_accton_wedge100bf_32qs_module.c | 24 ++ .../src/x86_64_accton_wedge100bf_32qs_ucli.c | 50 +++ .../wedge100bf-32qs/platform-config/Makefile | 1 + .../platform-config/r0/Makefile | 1 + .../platform-config/r0/PKG.yml | 1 + .../lib/x86-64-accton-wedge100bf-32qs-r0.yml | 35 ++ .../__init__.py | 92 +++++ 45 files changed, 2416 insertions(+), 1 deletion(-) create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/.gitignore create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/modules/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/modules/PKG.yml create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/PKG.yml create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/lib/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/onlpdump/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/.module create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/README create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/auto/make.mk create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/auto/x86_64_accton_wedge100bf_32qs.yml create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs.x create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_config.h create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_dox.h create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_porting.h create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/make.mk create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/fani.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/ledi.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/make.mk create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.h create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/psui.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sfpi.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sysi.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_config.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_enums.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_int.h create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_log.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_log.h create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_module.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_ucli.c create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/Makefile create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/PKG.yml create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/src/lib/x86-64-accton-wedge100bf-32qs-r0.yml create mode 100644 packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/src/python/x86_64_accton_wedge100bf_32qs_r0/__init__.py diff --git a/builds/amd64/installer/installed/builds/boot-config b/builds/amd64/installer/installed/builds/boot-config index 76125102cd..4abb646d33 100644 --- a/builds/amd64/installer/installed/builds/boot-config +++ b/builds/amd64/installer/installed/builds/boot-config @@ -1,3 +1,4 @@ NETDEV=ma1 BOOTMODE=INSTALLED SWI=images::latest +NETAUTO=dhcp diff --git a/builds/any/rootfs/jessie/common/all-base-packages.yml b/builds/any/rootfs/jessie/common/all-base-packages.yml index bbeab6b4d1..99af17ebc4 100644 --- a/builds/any/rootfs/jessie/common/all-base-packages.yml +++ b/builds/any/rootfs/jessie/common/all-base-packages.yml @@ -81,3 +81,33 @@ - sysstat - ipmitool - lm-sensors +- autoconf +- libtool +- libc6-dev +- g++ +- git +- libboost-dev +- python-dev +- flex +- bison +- libevent-dev +- libboost-test-dev +- bridge-utils +- python-pip +- python-ply +- ethtool +- libssl-dev +- libpcap-dev +- libusb-1.0-0-dev +- libcurl4-gnutls-dev +- automake +- python-crcmod +- python-jsonschema +- xz-utils +- libbz2-dev +- python3 +- python3-pip +- python3-dev +- python3-crcmod +- python3-jsonschema +- python3-yaml diff --git a/builds/any/rootfs/stretch/common/all-base-packages.yml b/builds/any/rootfs/stretch/common/all-base-packages.yml index ba2cb9a360..8a4e8a5603 100644 --- a/builds/any/rootfs/stretch/common/all-base-packages.yml +++ b/builds/any/rootfs/stretch/common/all-base-packages.yml @@ -87,3 +87,50 @@ - htop - tree - memtester +- autoconf +- libtool +- libc6-dev +- g++ +- git +- libboost-dev +- python-dev +- flex +- bison +- libevent-dev +- libboost-test-dev +- libboost-thread-dev +- bridge-utils +- python-pip +- python-ply +- ethtool +- libssl-dev +- libpcap-dev +- libusb-1.0-0-dev +- libcurl4-gnutls-dev +- automake +- python-crcmod +- python-jsonschema +- xz-utils +- libbz2-dev +- python3 +- python3-pip +- python3-dev +- python3-crcmod +- python3-jsonschema +- python3-yaml +- pkg-config +- curl +- unzip +- python-ipaddr +- python-pyparsing +- doxygen +- python-ply +- python-simplejson +- python-packaging +- python-vcversioner +- python-functools32 +- python-six +- python-wheel +- python-futures +- python-enum34 +- python-coverage diff --git a/make/kbuild.mk b/make/kbuild.mk index 8be2961b13..2e316b384e 100644 --- a/make/kbuild.mk +++ b/make/kbuild.mk @@ -113,8 +113,14 @@ K_DTBS_DIR := $(K_SOURCE_DIR)-dtbs # # The kernel source archive. Download if not present. # +ifeq ($(ONL_DEBIAN_SUITE),jessie) +# The certificates for kernel.org are expired in the jessie container. +# Until that can be fixed we skip cert checks here: +EXTRA_WGET_OPTIONS := --no-check-certificate +endif + $(K_ARCHIVE_PATH): - cd $(ONL_KERNELS)/archives && wget $(K_ARCHIVE_URL) + cd $(ONL_KERNELS)/archives && wget $(EXTRA_WGET_OPTIONS) $(K_ARCHIVE_URL) .PHONY : ksource kpatched diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/.gitignore b/packages/platforms/accton/x86-64/wedge100bf-32qs/.gitignore new file mode 100644 index 0000000000..f213c80165 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/.gitignore @@ -0,0 +1,3 @@ +*x86*64*accton*wedge100bf*32qs*.mk +onlpdump.mk + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/Makefile new file mode 100644 index 0000000000..dc1e7b86f0 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/modules/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/modules/Makefile new file mode 100644 index 0000000000..003238cf6d --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/modules/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/modules/PKG.yml b/packages/platforms/accton/x86-64/wedge100bf-32qs/modules/PKG.yml new file mode 100644 index 0000000000..cd08c79d44 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/modules/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/no-platform-modules.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-wedge100bf-32qs diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/Makefile new file mode 100644 index 0000000000..dc1e7b86f0 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/PKG.yml b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/PKG.yml new file mode 100644 index 0000000000..fcdba60009 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/onlp-platform-any.yml PLATFORM=x86-64-accton-wedge100bf-32qs ARCH=amd64 TOOLCHAIN=x86_64-linux-gnu \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/Makefile new file mode 100644 index 0000000000..e7437cb23a --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/Makefile @@ -0,0 +1,2 @@ +FILTER=src +include $(ONL)/make/subdirs.mk diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/lib/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/lib/Makefile new file mode 100644 index 0000000000..5fdd3e36c5 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/lib/Makefile @@ -0,0 +1,2 @@ +PLATFORM := x86-64-accton-wedge100bf-32qs +include $(ONL)/packages/base/any/onlp/builds/platform/libonlp-platform.mk diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/onlpdump/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/onlpdump/Makefile new file mode 100644 index 0000000000..58958c675d --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/onlpdump/Makefile @@ -0,0 +1,2 @@ +PLATFORM := x86-64-accton-wedge100bf-32qs +include $(ONL)/packages/base/any/onlp/builds/platform/onlps.mk diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/.module b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/.module new file mode 100644 index 0000000000..af310a5ac1 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/.module @@ -0,0 +1 @@ +name: x86_64_accton_wedge100bf_32qs diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/Makefile new file mode 100644 index 0000000000..740f3ebab5 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### +include $(ONL)/make/config.mk +MODULE := x86_64_accton_wedge100bf_32qs +AUTOMODULE := x86_64_accton_wedge100bf_32qs +include $(BUILDER)/definemodule.mk diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/README b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/README new file mode 100644 index 0000000000..9fd5f71cec --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/README @@ -0,0 +1,6 @@ +############################################################################### +# +# x86_64_accton_wedge100bf_32qs README +# +############################################################################### + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/auto/make.mk b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/auto/make.mk new file mode 100644 index 0000000000..f7d1605ff6 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/auto/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# x86_64_accton_wedge100bf_32qs Autogeneration +# +############################################################################### +x86_64_accton_wedge100bf_32qs_AUTO_DEFS := module/auto/x86_64_accton_wedge100bf_32qs.yml +x86_64_accton_wedge100bf_32qs_AUTO_DIRS := module/inc/x86_64_accton_wedge100bf_32qs module/src +include $(BUILDER)/auto.mk + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/auto/x86_64_accton_wedge100bf_32qs.yml b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/auto/x86_64_accton_wedge100bf_32qs.yml new file mode 100644 index 0000000000..4b7f4a3c07 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/auto/x86_64_accton_wedge100bf_32qs.yml @@ -0,0 +1,50 @@ +############################################################################### +# +# X86_64_ACCTON_WEDGE100BF_32QS Autogeneration Definitions. +# +############################################################################### + +cdefs: &cdefs +- X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_LOGGING: + doc: "Include or exclude logging." + default: 1 +- X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_OPTIONS_DEFAULT: + doc: "Default enabled log options." + default: AIM_LOG_OPTIONS_DEFAULT +- X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_BITS_DEFAULT: + doc: "Default enabled log bits." + default: AIM_LOG_BITS_DEFAULT +- X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_CUSTOM_BITS_DEFAULT: + doc: "Default enabled custom log bits." + default: 0 +- X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB: + doc: "Default all porting macros to use the C standard libraries." + default: 1 +- X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS: + doc: "Include standard library headers for stdlib porting macros." + default: X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB +- X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_UCLI: + doc: "Include generic uCli support." + default: 0 +- X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION: + doc: "Assume chassis fan direction is the same as the PSU fan direction." + default: 0 + + +definitions: + cdefs: + X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_HEADER: + defs: *cdefs + basename: x86_64_accton_wedge100bf_32qs_config + + portingmacro: + X86_64_ACCTON_WEDGE100BF_32QS: + macros: + - malloc + - free + - memset + - memcpy + + - vsnprintf + - snprintf + - strlen diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs.x b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs.x new file mode 100644 index 0000000000..f088faed6b --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs.x @@ -0,0 +1,14 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.xmacro(ALL).define> */ +/* */ + +/* <--auto.start.xenum(ALL).define> */ +/* */ + + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_config.h b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_config.h new file mode 100644 index 0000000000..29358ad4d7 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_config.h @@ -0,0 +1,137 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_accton_wedge100bf_32qs Configuration Header + * + * @addtogroup x86_64_accton_wedge100bf_32qs-config + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_H__ +#define __X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_H__ + +#ifdef GLOBAL_INCLUDE_CUSTOM_CONFIG +#include +#endif +#ifdef X86_64_ACCTON_WEDGE100BF_32QS_INCLUDE_CUSTOM_CONFIG +#include +#endif + +/* */ +#include +/** + * X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_LOGGING + * + * Include or exclude logging. */ + + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_LOGGING +#define X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_LOGGING 1 +#endif + +/** + * X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_OPTIONS_DEFAULT + * + * Default enabled log options. */ + + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_OPTIONS_DEFAULT +#define X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_OPTIONS_DEFAULT AIM_LOG_OPTIONS_DEFAULT +#endif + +/** + * X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_BITS_DEFAULT + * + * Default enabled log bits. */ + + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_BITS_DEFAULT +#define X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_BITS_DEFAULT AIM_LOG_BITS_DEFAULT +#endif + +/** + * X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_CUSTOM_BITS_DEFAULT + * + * Default enabled custom log bits. */ + + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_CUSTOM_BITS_DEFAULT +#define X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_CUSTOM_BITS_DEFAULT 0 +#endif + +/** + * X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB + * + * Default all porting macros to use the C standard libraries. */ + + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB +#define X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB 1 +#endif + +/** + * X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + * + * Include standard library headers for stdlib porting macros. */ + + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS +#define X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB +#endif + +/** + * X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_UCLI + * + * Include generic uCli support. */ + + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_UCLI +#define X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_UCLI 0 +#endif + +/** + * X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION + * + * Assume chassis fan direction is the same as the PSU fan direction. */ + + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION +#define X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION 0 +#endif + + + +/** + * All compile time options can be queried or displayed + */ + +/** Configuration settings structure. */ +typedef struct x86_64_accton_wedge100bf_32qs_config_settings_s { + /** name */ + const char* name; + /** value */ + const char* value; +} x86_64_accton_wedge100bf_32qs_config_settings_t; + +/** Configuration settings table. */ +/** x86_64_accton_wedge100bf_32qs_config_settings table. */ +extern x86_64_accton_wedge100bf_32qs_config_settings_t x86_64_accton_wedge100bf_32qs_config_settings[]; + +/** + * @brief Lookup a configuration setting. + * @param setting The name of the configuration option to lookup. + */ +const char* x86_64_accton_wedge100bf_32qs_config_lookup(const char* setting); + +/** + * @brief Show the compile-time configuration. + * @param pvs The output stream. + */ +int x86_64_accton_wedge100bf_32qs_config_show(struct aim_pvs_s* pvs); + +/* */ + +#include "x86_64_accton_wedge100bf_32qs_porting.h" + +#endif /* __X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_H__ */ +/* @} */ diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_dox.h b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_dox.h new file mode 100644 index 0000000000..7e37e4bbd4 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_dox.h @@ -0,0 +1,26 @@ +/**************************************************************************//** + * + * x86_64_accton_wedge100bf_32qs Doxygen Header + * + *****************************************************************************/ +#ifndef __X86_64_ACCTON_WEDGE100BF_32QS_DOX_H__ +#define __X86_64_ACCTON_WEDGE100BF_32QS_DOX_H__ + +/** + * @defgroup x86_64_accton_wedge100bf_32qs x86_64_accton_wedge100bf_32qs - x86_64_accton_wedge100bf_32qs Description + * + +The documentation overview for this module should go here. + + * + * @{ + * + * @defgroup x86_64_accton_wedge100bf_32qs-x86_64_accton_wedge100bf_32qs Public Interface + * @defgroup x86_64_accton_wedge100bf_32qs-config Compile Time Configuration + * @defgroup x86_64_accton_wedge100bf_32qs-porting Porting Macros + * + * @} + * + */ + +#endif /* __X86_64_ACCTON_WEDGE100BF_32QS_DOX_H__ */ diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_porting.h b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_porting.h new file mode 100644 index 0000000000..996114156e --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/inc/x86_64_accton_wedge100bf_32qs/x86_64_accton_wedge100bf_32qs_porting.h @@ -0,0 +1,97 @@ +/**************************************************************************//** + * + * @file + * @brief x86_64_accton_wedge100bf_32qs Porting Macros. + * + * @addtogroup x86_64_accton_wedge100bf_32qs-porting + * @{ + * + *****************************************************************************/ +#ifndef __X86_64_ACCTON_WEDGE100BF_32QS_PORTING_H__ +#define __X86_64_ACCTON_WEDGE100BF_32QS_PORTING_H__ + + +/* */ +#if X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS == 1 +#include +#include +#include +#include +#include +#endif + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_MALLOC + #if defined(GLOBAL_MALLOC) + #define X86_64_ACCTON_WEDGE100BF_32QS_MALLOC GLOBAL_MALLOC + #elif X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB == 1 + #define X86_64_ACCTON_WEDGE100BF_32QS_MALLOC malloc + #else + #error The macro X86_64_ACCTON_WEDGE100BF_32QS_MALLOC is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_FREE + #if defined(GLOBAL_FREE) + #define X86_64_ACCTON_WEDGE100BF_32QS_FREE GLOBAL_FREE + #elif X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB == 1 + #define X86_64_ACCTON_WEDGE100BF_32QS_FREE free + #else + #error The macro X86_64_ACCTON_WEDGE100BF_32QS_FREE is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_MEMSET + #if defined(GLOBAL_MEMSET) + #define X86_64_ACCTON_WEDGE100BF_32QS_MEMSET GLOBAL_MEMSET + #elif X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB == 1 + #define X86_64_ACCTON_WEDGE100BF_32QS_MEMSET memset + #else + #error The macro X86_64_ACCTON_WEDGE100BF_32QS_MEMSET is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_MEMCPY + #if defined(GLOBAL_MEMCPY) + #define X86_64_ACCTON_WEDGE100BF_32QS_MEMCPY GLOBAL_MEMCPY + #elif X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB == 1 + #define X86_64_ACCTON_WEDGE100BF_32QS_MEMCPY memcpy + #else + #error The macro X86_64_ACCTON_WEDGE100BF_32QS_MEMCPY is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_VSNPRINTF + #if defined(GLOBAL_VSNPRINTF) + #define X86_64_ACCTON_WEDGE100BF_32QS_VSNPRINTF GLOBAL_VSNPRINTF + #elif X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB == 1 + #define X86_64_ACCTON_WEDGE100BF_32QS_VSNPRINTF vsnprintf + #else + #error The macro X86_64_ACCTON_WEDGE100BF_32QS_VSNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_SNPRINTF + #if defined(GLOBAL_SNPRINTF) + #define X86_64_ACCTON_WEDGE100BF_32QS_SNPRINTF GLOBAL_SNPRINTF + #elif X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB == 1 + #define X86_64_ACCTON_WEDGE100BF_32QS_SNPRINTF snprintf + #else + #error The macro X86_64_ACCTON_WEDGE100BF_32QS_SNPRINTF is required but cannot be defined. + #endif +#endif + +#ifndef X86_64_ACCTON_WEDGE100BF_32QS_STRLEN + #if defined(GLOBAL_STRLEN) + #define X86_64_ACCTON_WEDGE100BF_32QS_STRLEN GLOBAL_STRLEN + #elif X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB == 1 + #define X86_64_ACCTON_WEDGE100BF_32QS_STRLEN strlen + #else + #error The macro X86_64_ACCTON_WEDGE100BF_32QS_STRLEN is required but cannot be defined. + #endif +#endif + +/* */ + + +#endif /* __X86_64_ACCTON_WEDGE100BF_32QS_PORTING_H__ */ +/* @} */ diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/make.mk b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/make.mk new file mode 100644 index 0000000000..07d0c93c8e --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/make.mk @@ -0,0 +1,10 @@ +############################################################################### +# +# +# +############################################################################### +THIS_DIR := $(dir $(lastword $(MAKEFILE_LIST))) +x86_64_accton_wedge100bf_32qs_INCLUDES := -I $(THIS_DIR)inc +x86_64_accton_wedge100bf_32qs_INTERNAL_INCLUDES := -I $(THIS_DIR)src +x86_64_accton_wedge100bf_32qs_DEPENDMODULE_ENTRIES := init:x86_64_accton_wedge100bf_32qs ucli:x86_64_accton_wedge100bf_32qs + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/Makefile new file mode 100644 index 0000000000..2696f0fd78 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/Makefile @@ -0,0 +1,9 @@ +############################################################################### +# +# Local source generation targets. +# +############################################################################### + +ucli: + @../../../../tools/uclihandlers.py x86_64_accton_wedge100bf_32qs_ucli.c + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/fani.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/fani.c new file mode 100644 index 0000000000..3775723ff1 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/fani.c @@ -0,0 +1,222 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2014 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * Fan Platform Implementation Defaults. + * + ***********************************************************/ +#include +#include +#include "platform_lib.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_FAN(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +#define MAX_FAN_SPEED 15400 +#define BIT(i) (1 << (i)) + +enum fan_id { + FAN_1_ON_FAN_BOARD = 1, + FAN_2_ON_FAN_BOARD, + FAN_3_ON_FAN_BOARD, + FAN_4_ON_FAN_BOARD, + FAN_5_ON_FAN_BOARD, +}; + +#define FAN_BOARD_PATH "/sys/bus/i2c/devices/8-0033/" + +#define CHASSIS_FAN_INFO(fid) \ + { \ + { ONLP_FAN_ID_CREATE(FAN_##fid##_ON_FAN_BOARD), "Chassis Fan - "#fid, 0 },\ + 0x0,\ + ONLP_FAN_CAPS_SET_PERCENTAGE | ONLP_FAN_CAPS_GET_RPM | ONLP_FAN_CAPS_GET_PERCENTAGE,\ + 0,\ + 0,\ + ONLP_FAN_MODE_INVALID,\ + } + +/* Static fan information */ +onlp_fan_info_t finfo[] = { + { }, /* Not used */ + CHASSIS_FAN_INFO(1), + CHASSIS_FAN_INFO(2), + CHASSIS_FAN_INFO(3), + CHASSIS_FAN_INFO(4), + CHASSIS_FAN_INFO(5) +}; + +/* + * This function will be called prior to all of onlp_fani_* functions. + */ +int +onlp_fani_init(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_fani_info_get(onlp_oid_t id, onlp_fan_info_t* info) +{ + int value = 0, fid; + char path[64] = {0}; + VALIDATE(id); + + fid = ONLP_OID_ID_GET(id); + *info = finfo[fid]; + + /* get fan present status + */ + sprintf(path, "%s""fantray_present", FAN_BOARD_PATH); + + if (bmc_file_read_int(&value, path, 16) < 0) { + AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path); + return ONLP_STATUS_E_INTERNAL; + } + + if (value & BIT(fid-1)) { + return ONLP_STATUS_OK; + } + info->status |= ONLP_FAN_STATUS_PRESENT; + + + /* get front fan rpm + */ + sprintf(path, "%s""fan%d_input", FAN_BOARD_PATH, fid*2 - 1); + + if (bmc_file_read_int(&value, path, 10) < 0) { + AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path); + return ONLP_STATUS_E_INTERNAL; + } + info->rpm = value; + + /* get rear fan rpm + */ + sprintf(path, "%s""fan%d_input", FAN_BOARD_PATH, fid*2); + + if (bmc_file_read_int(&value, path, 10) < 0) { + AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path); + return ONLP_STATUS_E_INTERNAL; + } + + /* take the min value from front/rear fan speed + */ + if (info->rpm > value) { + info->rpm = value; + } + + + /* set fan status based on rpm + */ + if (!info->rpm) { + info->status |= ONLP_FAN_STATUS_FAILED; + return ONLP_STATUS_OK; + } + + + /* get speed percentage from rpm + */ + info->percentage = (info->rpm * 100)/MAX_FAN_SPEED; + + /* set fan direction + */ + info->status |= ONLP_FAN_STATUS_F2B; + + return ONLP_STATUS_OK; +} + +/* + * This function sets the speed of the given fan in RPM. + * + * This function will only be called if the fan supprots the RPM_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_rpm_set(onlp_oid_t id, int rpm) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan speed of the given OID as a percentage. + * + * This will only be called if the OID has the PERCENTAGE_SET + * capability. + * + * It is optional if you have no fans at all with this feature. + */ +int +onlp_fani_percentage_set(onlp_oid_t id, int p) +{ + char cmd[32] = {0}; + + sprintf(cmd, "set_fan_speed.sh %d", p); + + if (bmc_send_command(cmd) < 0) { + AIM_LOG_ERROR("Unable to send command to bmc(%s)\r\n", cmd); + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +/* + * This function sets the fan speed of the given OID as per + * the predefined ONLP fan speed modes: off, slow, normal, fast, max. + * + * Interpretation of these modes is up to the platform. + * + */ +int +onlp_fani_mode_set(onlp_oid_t id, onlp_fan_mode_t mode) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function sets the fan direction of the given OID. + * + * This function is only relevant if the fan OID supports both direction + * capabilities. + * + * This function is optional unless the functionality is available. + */ +int +onlp_fani_dir_set(onlp_oid_t id, onlp_fan_dir_t dir) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * Generic fan ioctl. Optional. + */ +int +onlp_fani_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/ledi.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/ledi.c new file mode 100644 index 0000000000..1442f9a888 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/ledi.c @@ -0,0 +1,220 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2013 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include "platform_lib.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_LED(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +/* LED related data + */ +enum onlp_led_id +{ + LED_RESERVED = 0, + LED_SYS1, + LED_SYS2 +}; + +typedef struct led_address_s { + enum onlp_led_id id; + uint8_t bus; + uint8_t devaddr; + uint8_t offset; +} led_address_t; + +typedef struct led_mode_info_s { + onlp_led_mode_t mode; + uint8_t regval; +} led_mode_info_t; + +static led_address_t led_addr[] = +{ + { }, /* Not used */ + {LED_SYS1, 1, 0x32, 0x3e}, + {LED_SYS2, 1, 0x32, 0x3f}, +}; + +static led_mode_info_t led_mode_info[] = +{ + {ONLP_LED_MODE_OFF, 0x0}, + {ONLP_LED_MODE_OFF, 0x8}, + {ONLP_LED_MODE_BLUE, 0x1}, + {ONLP_LED_MODE_BLUE_BLINKING, 0x9}, + {ONLP_LED_MODE_GREEN, 0x2}, + {ONLP_LED_MODE_GREEN_BLINKING, 0xa}, + {ONLP_LED_MODE_RED, 0x4}, + {ONLP_LED_MODE_RED_BLINKING, 0xc}, +}; + +/* + * Get the information for the given LED OID. + */ +static onlp_led_info_t linfo[] = +{ + { }, /* Not used */ + { + { ONLP_LED_ID_CREATE(LED_SYS1), "Chassis LED 1 (SYS LED 1)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING | + ONLP_LED_CAPS_RED | ONLP_LED_CAPS_RED_BLINKING | + ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING, + }, + { + { ONLP_LED_ID_CREATE(LED_SYS2), "Chassis LED 1 (SYS LED 2)", 0 }, + ONLP_LED_STATUS_PRESENT, + ONLP_LED_CAPS_ON_OFF | + ONLP_LED_CAPS_GREEN | ONLP_LED_CAPS_GREEN_BLINKING | + ONLP_LED_CAPS_RED | ONLP_LED_CAPS_RED_BLINKING | + ONLP_LED_CAPS_BLUE | ONLP_LED_CAPS_BLUE_BLINKING, + }, +}; + +/* + * This function will be called prior to any other onlp_ledi_* functions. + */ +int +onlp_ledi_init(void) +{ + return ONLP_STATUS_OK; +} + +static int +reg_value_to_onlp_led_mode(enum onlp_led_id id, int value) +{ + int i; + + for (i = 0; i < AIM_ARRAYSIZE(led_mode_info); i++) { + if (value != led_mode_info[i].regval) { + continue; + } + + return led_mode_info[i].mode; + } + + return ONLP_LED_MODE_AUTO; +} + +static int +onlp_led_mode_to_reg_value(enum onlp_led_id id, onlp_led_mode_t onlp_led_mode) +{ + int i; + + for (i = 0; i < AIM_ARRAYSIZE(led_mode_info); i++) { + if (onlp_led_mode != led_mode_info[i].mode) { + continue; + } + + return led_mode_info[i].regval; + } + + return 0; +} + +int +onlp_ledi_info_get(onlp_oid_t id, onlp_led_info_t* info) +{ + int lid, value; + + VALIDATE(id); + lid = ONLP_OID_ID_GET(id); + + /* Set the onlp_oid_hdr_t and capabilities */ + *info = linfo[ONLP_OID_ID_GET(id)]; + + value = onlp_i2c_readb(led_addr[lid].bus, led_addr[lid].devaddr, led_addr[lid].offset, ONLP_I2C_F_FORCE); + if (value < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + info->mode = reg_value_to_onlp_led_mode(lid, value); + + /* Set the on/off status */ + if (info->mode != ONLP_LED_MODE_OFF) { + info->status |= ONLP_LED_STATUS_ON; + } + + return ONLP_STATUS_OK; +} + +/* + * Turn an LED on or off. + * + * This function will only be called if the LED OID supports the ONOFF + * capability. + * + * What 'on' means in terms of colors or modes for multimode LEDs is + * up to the platform to decide. This is intended as baseline toggle mechanism. + */ +int +onlp_ledi_set(onlp_oid_t id, int on_or_off) +{ + VALIDATE(id); + + if (!on_or_off) { + return onlp_ledi_mode_set(id, ONLP_LED_MODE_OFF); + } + + return ONLP_STATUS_E_UNSUPPORTED; +} + +/* + * This function puts the LED into the given mode. It is a more functional + * interface for multimode LEDs. + * + * Only modes reported in the LED's capabilities will be attempted. + */ +int +onlp_ledi_mode_set(onlp_oid_t id, onlp_led_mode_t mode) +{ + int lid, value; + + VALIDATE(id); + lid = ONLP_OID_ID_GET(id); + + value = onlp_led_mode_to_reg_value(lid, mode); + if (onlp_i2c_writeb(led_addr[lid].bus, led_addr[lid].devaddr, led_addr[lid].offset, value, ONLP_I2C_F_FORCE) < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +/* + * Generic LED ioctl interface. + */ +int +onlp_ledi_ioctl(onlp_oid_t id, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/make.mk b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/make.mk new file mode 100644 index 0000000000..574d3a123d --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/make.mk @@ -0,0 +1,9 @@ +############################################################################### +# +# +# +############################################################################### + +LIBRARY := x86_64_accton_wedge100bf_32qs +$(LIBRARY)_SUBDIR := $(dir $(lastword $(MAKEFILE_LIST))) +include $(BUILDER)/lib.mk diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.c new file mode 100644 index 0000000000..e873329e43 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.c @@ -0,0 +1,385 @@ +/************************************************************ + * + * + * Copyright 2017 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include +#include "platform_lib.h" + +#define TTY_DEVICE "/dev/ttyACM0" +#define TTY_PROMPT "@bmc:" +#define TTY_I2C_TIMEOUT 55000 +#define TTY_BMC_LOGIN_TIMEOUT 1000000 +#define TTY_RETRY 10 +#define MAXIMUM_TTY_BUFFER_LENGTH 1024 +#define MAXIMUM_TTY_STRING_LENGTH (MAXIMUM_TTY_BUFFER_LENGTH - 1) + +static int tty_fd = -1; +static char tty_buf[MAXIMUM_TTY_BUFFER_LENGTH] = {0}; + +static int tty_open(void) +{ + int i = 20; + struct termios attr; + + if (tty_fd > -1) { + return 0; + } + + do { + if ((tty_fd = open(TTY_DEVICE, O_RDWR | O_NOCTTY | O_NDELAY)) > -1) { + tcgetattr(tty_fd, &attr); + attr.c_cflag = B57600 | CS8 | CLOCAL | CREAD; + attr.c_iflag = IGNPAR; + attr.c_oflag = 0; + attr.c_lflag = 0; + attr.c_cc[VMIN] = (unsigned char) + ((MAXIMUM_TTY_STRING_LENGTH > 0xFF) ? 0xFF : MAXIMUM_TTY_STRING_LENGTH); + attr.c_cc[VTIME] = 0; + cfsetospeed(&attr, B57600); + cfsetispeed(&attr, B57600); + tcsetattr(tty_fd, TCSANOW, &attr); + return 0; + } + + i--; + usleep(100000); + } while (i > 0); + + return -1; +} + +static int tty_close(void) +{ + close(tty_fd); + tty_fd = -1; + return 0; +} + +static int tty_exec_buf(unsigned long udelay, const char *str) +{ + if (tty_fd < 0) + return -1; + + write(tty_fd, tty_buf, strlen(tty_buf)+1); + usleep(udelay); + memset(tty_buf, 0, MAXIMUM_TTY_BUFFER_LENGTH); + read(tty_fd, tty_buf, MAXIMUM_TTY_BUFFER_LENGTH); + return (strstr(tty_buf, str) != NULL) ? 0 : -1; +} + +static int tty_login(void) +{ + int i = 10; + + for (i = 1; i <= TTY_RETRY; i++) { + snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "\r\r"); + if (!tty_exec_buf(TTY_BMC_LOGIN_TIMEOUT, TTY_PROMPT)) { + return 0; + } + + if (strstr(tty_buf, "bmc login:") != NULL) + { + snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "root\r"); + + if (!tty_exec_buf(TTY_BMC_LOGIN_TIMEOUT, "Password:")) { + snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "0penBmc\r"); + if (!tty_exec_buf(TTY_BMC_LOGIN_TIMEOUT, TTY_PROMPT)) { + return 0; + } + + } + } + usleep(50000); + } + + return -1; +} + +int bmc_tty_init(void) +{ + int i; + if (tty_fd >= 0){ + return 0; + } + + for (i = 1; i <= TTY_RETRY; i++) { + if (tty_open() != 0) { + AIM_LOG_ERROR("ERROR: Cannot open TTY device\n"); + continue; + } + if (tty_login() != 0) { + AIM_LOG_ERROR("ERROR: Cannot login TTY device\n"); + tty_close(); + continue; + } + + return 0; + } + + AIM_LOG_ERROR("Unable to init bmc tty\r\n"); + return -1; +} + +int bmc_tty_deinit(void) +{ + if( tty_fd != -1 ){ + tty_close(); + } + else{ + AIM_LOG_ERROR("ERROR: TTY not open\n"); + } + return 0; +} + +int bmc_send_command(char *cmd) +{ + int i, ret = 0; + + for (i = 1; i <= TTY_RETRY; i++) { + snprintf(tty_buf, MAXIMUM_TTY_BUFFER_LENGTH, "%s", cmd); + ret = tty_exec_buf(TTY_I2C_TIMEOUT, TTY_PROMPT); + if (ret != 0) { +// AIM_LOG_ERROR("ERROR: bmc_send_command(%s) timed out\n", cmd); + continue; + } + + return 0; + } + + AIM_LOG_ERROR("Unable to send command to bmc(%s)\r\n", cmd); + return -1; +} + +int bmc_file_read_str(char *file, char *result, int slen) +{ + char *curr = NULL; + char cmd[88] = {0}; + char *delimit="^@\r\n"; + int flag = 0, ret = 0; + + ret = snprintf(cmd, sizeof(cmd), "cat %s\r\n", file); + if( ret >= sizeof(cmd) ){ + AIM_LOG_ERROR("cmd size overwrite (%d,%d)\r\n", ret, sizeof(cmd)); + return ONLP_STATUS_E_INTERNAL; + } + bmc_send_command(cmd); + + strtok(tty_buf, delimit); + flag = 0; + while( (curr = strtok(NULL, delimit)) != NULL ){ + switch (*curr) { + case '\n': + case '\r': + case '@': + case '^': + break; + default: + flag = 1; + break; + } + if( flag ){ + break; + } + } + + ret = snprintf(result, slen-1, "%s", curr); + if( ret >= (slen-1) ){ + AIM_LOG_ERROR("result size overwrite (%d,%d)\r\n", ret, slen-1); + return ONLP_STATUS_E_INTERNAL; + } + return 0; +} + +int chk_numeric_char(char *data, int base) +{ + int len, i, orig = 0; + if( *data == '\0' ){ + return 0; + } + len = (int) strlen(data); + if( base == 10 ){ + for( i=0; i '9' ){ + return 0; + } + } + return 1; + } + else if( base == 16 ){ + if( !memcmp(data, "0x", 2) ){ + if( len <= 2 ){ + return 0; + } + orig = 2; + } + else if( !memcmp(data, "0X", 2) ){ + if( len <= 2 ){ + return 0; + } + orig = 2; + } + for( i=orig; i orig) && ( *(data+i) == 0xd ) ){ + break; + } + if( (i > orig) && ( *(data+i) == 0xa ) ){ + break; + } + if( !( ( (*(data+i) >= '0') && (*(data+i) <= '9') ) || + ( (*(data+i) >= 'A') && (*(data+i) <= 'F') ) || + ( (*(data+i) >= 'a') && (*(data+i) <= 'f') ) + ) + ){ + return 0; + } + } + return 1; + } + return 0; +} + +int +bmc_command_read_int(int* value, char *cmd, int base) +{ + int len; + int i; + char *prev_str = NULL; + char *current_str= NULL; + if (bmc_send_command(cmd) < 0) { + return ONLP_STATUS_E_INTERNAL; + } + len = (int)strlen(cmd); + prev_str = strstr(tty_buf, cmd); + if (prev_str == NULL) { + return -1; + } + for (i = 1; i <= TTY_RETRY; i++) { + current_str = strstr(prev_str + len, cmd); + if(current_str == NULL) { + if( !chk_numeric_char(prev_str + len, base) ){ + return -1; + } + *value = strtoul(prev_str + len, NULL, base); + break; + }else { + prev_str = current_str; + continue; + } + } + return 0; +} + + +int +bmc_file_read_int(int* value, char *file, int base) +{ + char cmd[64] = {0}; + snprintf(cmd, sizeof(cmd), "cat %s\r\n", file); + return bmc_command_read_int(value, cmd, base); +} + +int +bmc_i2c_readb(uint8_t bus, uint8_t devaddr, uint8_t addr) +{ + int ret = 0, value; + char cmd[64] = {0}; + + snprintf(cmd, sizeof(cmd), "i2cget -f -y %d 0x%x 0x%02x\r\n", bus, devaddr, addr); + ret = bmc_command_read_int(&value, cmd, 16); + return (ret < 0) ? ret : value; +} + +int +bmc_i2c_writeb(uint8_t bus, uint8_t devaddr, uint8_t addr, uint8_t value) +{ + char cmd[64] = {0}; + snprintf(cmd, sizeof(cmd), "i2cset -f -y %d 0x%x 0x%02x 0x%x\r\n", bus, devaddr, addr, value); + return bmc_send_command(cmd); +} + +int +bmc_i2c_write_quick_mode(uint8_t bus, uint8_t devaddr, uint8_t value) +{ + char cmd[64] = {0}; + snprintf(cmd, sizeof(cmd), "i2cset -f -y %d 0x%x 0x%x\r\n", bus, devaddr, value); + return bmc_send_command(cmd); +} + +int +bmc_i2c_readw(uint8_t bus, uint8_t devaddr, uint8_t addr) +{ + int ret = 0, value; + char cmd[64] = {0}; + + snprintf(cmd, sizeof(cmd), "i2cget -f -y %d 0x%x 0x%02x w\r\n", bus, devaddr, addr); + ret = bmc_command_read_int(&value, cmd, 16); + return (ret < 0) ? ret : value; +} + +int +bmc_i2c_readraw(uint8_t bus, uint8_t devaddr, uint8_t addr, char* data, int data_size) +{ + int data_len, i = 0; + char cmd[64] = {0}; + char *str = NULL; + snprintf(cmd, sizeof(cmd), "i2craw -w 0x%x -r 0 %d 0x%02x\r\n", addr, bus, devaddr); + + if (bmc_send_command(cmd) < 0) { + AIM_LOG_ERROR("Unable to send command to bmc(%s)\r\n", cmd); + return ONLP_STATUS_E_INTERNAL; + } + + str = strstr(tty_buf, "Received:\r\n "); + if (str == NULL) { + return -1; + } + + /* first byte is data length */ + str += strlen("Received:\r\n ");; + data_len = strtoul(str, NULL, 16); + if (data_size < data_len) { + data_len = data_size; + } + + for (i = 0; (i < data_len) && (str != NULL); i++) { + str = strstr(str, " ") + 1; /* Jump to next token */ + data[i] = strtoul(str, NULL, 16); + } + + data[i] = 0; + return 0; +} + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.h b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.h new file mode 100644 index 0000000000..4f59bad199 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.h @@ -0,0 +1,74 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2014 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#ifndef __PLATFORM_LIB_H__ +#define __PLATFORM_LIB_H__ + +#include "x86_64_accton_wedge100bf_32qs_log.h" + +#define DEBUG_MODE 0 + +#if (DEBUG_MODE == 1) + #define DEBUG_PRINT(fmt, args...) \ + printf("%s:%s[%d]: " fmt "\r\n", __FILE__, __FUNCTION__, __LINE__, ##args) +#else + #define DEBUG_PRINT(fmt, args...) +#endif + +#define CHASSIS_FAN_COUNT 5 +#define CHASSIS_THERMAL_COUNT 7 +#define CHASSIS_LED_COUNT 2 +#define CHASSIS_PSU_COUNT 2 + +#define IDPROM_PATH "/sys/class/i2c-adapter/i2c-40/40-0050/eeprom" + +enum onlp_thermal_id +{ + THERMAL_RESERVED = 0, + THERMAL_CPU_CORE, + THERMAL_1_ON_MAIN_BROAD, + THERMAL_2_ON_MAIN_BROAD, + THERMAL_3_ON_MAIN_BROAD, + THERMAL_4_ON_MAIN_BROAD, + THERMAL_5_ON_MAIN_BROAD, + THERMAL_6_ON_MAIN_BROAD, + THERMAL_7_ON_MAIN_BROAD, +}; + +int bmc_send_command(char *cmd); +int bmc_file_read_str(char *file, char *result, int slen); +int bmc_file_read_int(int* value, char *file, int base); +int bmc_i2c_readb(uint8_t bus, uint8_t devaddr, uint8_t addr); +int bmc_i2c_writeb(uint8_t bus, uint8_t devaddr, uint8_t addr, uint8_t value); +int bmc_i2c_write_quick_mode(uint8_t bus, uint8_t devaddr, uint8_t value); +int bmc_i2c_readw(uint8_t bus, uint8_t devaddr, uint8_t addr); +int bmc_i2c_readraw(uint8_t bus, uint8_t devaddr, uint8_t addr, char* data, int data_size); + +int bmc_tty_init(void); +int bmc_tty_deinit(void); + +#endif /* __PLATFORM_LIB_H__ */ + + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/psui.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/psui.c new file mode 100644 index 0000000000..641f4cb90e --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/psui.c @@ -0,0 +1,230 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2014 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include +#include "platform_lib.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_PSU(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +#define PSU1_ID 1 +#define PSU2_ID 2 + +#define SYS_CPLD_PATH_FMT "/sys/bus/i2c/drivers/syscpld/12-0031/%s" +#define PSU_PRESENT_FMT "psu%d_present" +#define PSU_PWROK_FMT "psu%d_output_pwr_sts" + +#define PSU_PFE1100_PATH_FMT "/sys/bus/i2c/devices/7-%s/%s\r\n" +#define PSU_PFE1100_MODEL "mfr_model_label" +#define PSU_PFE1100_SERIAL "mfr_serial_label" + +#if 0 +static const char *psu_pfedrv_i2c_devaddr[] = {"0059", "005a"}; + +/* + * Get all information about the given PSU oid. + */ +static onlp_psu_info_t pinfo[] = +{ + { }, /* Not used */ + { + { ONLP_PSU_ID_CREATE(PSU1_ID), "PSU-1", 0 }, + }, + { + { ONLP_PSU_ID_CREATE(PSU2_ID), "PSU-2", 0 }, + } +}; + +#endif +int +onlp_psui_init(void) +{ + return ONLP_STATUS_OK; +} +#if 0 +static int +twos_complement_to_int(uint16_t data, uint8_t valid_bit, int mask) +{ + uint16_t valid_data = data & mask; + bool is_negative = valid_data >> (valid_bit - 1); + + return is_negative ? (-(((~valid_data) & mask) + 1)) : valid_data; +} + +static int +pmbus_parse_literal_format(uint16_t value) +{ + int exponent, mantissa, multiplier = 1000; + + exponent = twos_complement_to_int(value >> 11, 5, 0x1f); + mantissa = twos_complement_to_int(value & 0x7ff, 11, 0x7ff); + + return (exponent >= 0) ? (mantissa << exponent) * multiplier : + (mantissa * multiplier) / (1 << -exponent); +} +#endif +int +onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) +{ + #if 0 + int pid, value, addr, ret = 0; + char file[32] = {0}; + char path[80] = {0}; + + VALIDATE(id); + + pid = ONLP_OID_ID_GET(id); + *info = pinfo[pid]; /* Set the onlp_oid_hdr_t */ + + /* Get the present status + */ + ret = snprintf(file, sizeof(file), PSU_PRESENT_FMT, pid); + if( ret >= sizeof(file) ){ + AIM_LOG_ERROR("file size overwrite (%d,%d)\r\n", ret, sizeof(file)); + return ONLP_STATUS_E_INTERNAL; + } + ret = snprintf(path, sizeof(path), SYS_CPLD_PATH_FMT, file); + if( ret >= sizeof(path) ){ + AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path)); + return ONLP_STATUS_E_INTERNAL; + } + if (bmc_file_read_int(&value, path, 16) < 0) { + AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path); + return ONLP_STATUS_E_INTERNAL; + } + + if (value) { + info->status &= ~ONLP_PSU_STATUS_PRESENT; + return ONLP_STATUS_OK; + } + info->status |= ONLP_PSU_STATUS_PRESENT; + info->caps = ONLP_PSU_CAPS_AC; + + /* Get power good status + */ + ret = snprintf(file, sizeof(file), PSU_PWROK_FMT, pid); + if( ret >= sizeof(file) ){ + AIM_LOG_ERROR("file size overwrite (%d,%d)\r\n", ret, sizeof(file)); + return ONLP_STATUS_E_INTERNAL; + } + ret = snprintf(path, sizeof(path), SYS_CPLD_PATH_FMT, file); + if( ret >= sizeof(path) ){ + AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path)); + return ONLP_STATUS_E_INTERNAL; + } + if (bmc_file_read_int(&value, path, 16) < 0) { + AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path); + return ONLP_STATUS_E_INTERNAL; + } + + if (!value) { + info->status |= ONLP_PSU_STATUS_FAILED; + return ONLP_STATUS_OK; + } + + + /* Get input output power status + */ + value = (pid == PSU1_ID) ? 0x2 : 0x1; /* mux channel for psu */ + if (bmc_i2c_write_quick_mode(7, 0x70, value) < 0) { + AIM_LOG_ERROR("Unable to set i2c device (7/0x70)\r\n"); + return ONLP_STATUS_E_INTERNAL; + } + usleep(1200); + + /* Read vin */ + addr = (pid == PSU1_ID) ? 0x59 : 0x5a; + value = bmc_i2c_readw(7, addr, 0x88); + if (value >= 0) { + info->mvin = pmbus_parse_literal_format(value); + info->caps |= ONLP_PSU_CAPS_VIN; + } + + /* Read iin */ + value = bmc_i2c_readw(7, addr, 0x89); + if (value >= 0) { + info->miin = pmbus_parse_literal_format(value); + info->caps |= ONLP_PSU_CAPS_IIN; + } + + /* Get pin */ + if ((info->caps & ONLP_PSU_CAPS_VIN) && (info->caps & ONLP_PSU_CAPS_IIN)) { + info->mpin = info->mvin * info->miin / 1000; + info->caps |= ONLP_PSU_CAPS_PIN; + } + + /* Read iout */ + value = bmc_i2c_readw(7, addr, 0x8c); + if (value >= 0) { + info->miout = pmbus_parse_literal_format(value); + info->caps |= ONLP_PSU_CAPS_IOUT; + } + + /* Read pout */ + value = bmc_i2c_readw(7, addr, 0x96); + if (value >= 0) { + info->mpout = pmbus_parse_literal_format(value); + info->caps |= ONLP_PSU_CAPS_POUT; + } + + /* Get vout */ + if ((info->caps & ONLP_PSU_CAPS_IOUT) && (info->caps & ONLP_PSU_CAPS_POUT) && info->miout != 0) { + info->mvout = info->mpout / info->miout * 1000; + info->caps |= ONLP_PSU_CAPS_VOUT; + } + + /* Get model name */ + ret = snprintf(path, sizeof(path), PSU_PFE1100_PATH_FMT, psu_pfedrv_i2c_devaddr[pid-1], PSU_PFE1100_MODEL); + if( ret >= sizeof(path) ){ + AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path)); + return ONLP_STATUS_E_INTERNAL; + } + bmc_file_read_str(path, info->model, sizeof(info->model)); + + /* Get serial number */ + ret = snprintf(path, sizeof(path), PSU_PFE1100_PATH_FMT, psu_pfedrv_i2c_devaddr[pid-1], PSU_PFE1100_SERIAL); + if( ret >= sizeof(path) ){ + AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path)); + return ONLP_STATUS_E_INTERNAL; + } + bmc_file_read_str(path, info->serial, sizeof(info->serial)); + #endif + return ONLP_STATUS_OK; +} + +int +onlp_psui_ioctl(onlp_oid_t pid, va_list vargs) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sfpi.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sfpi.c new file mode 100644 index 0000000000..563406650f --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sfpi.c @@ -0,0 +1,229 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2016 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include +#include +#include "platform_lib.h" + +#include "x86_64_accton_wedge100bf_32qs_log.h" + +#define BIT(i) (1 << (i)) +#define NUM_OF_SFP_PORT 32 +#define PORT_EEPROM_FORMAT "/sys/bus/i2c/devices/%d-0050/eeprom" + +static const int sfp_bus_index[] = { + 3, 2, 5, 4, 7, 6, 9, 8, + 11, 10, 13, 12, 15, 14, 17, 16, + 19, 18, 21, 20, 23, 22, 25, 24, + 27, 26, 29, 28, 31, 30, 33, 32 +}; + +/************************************************************ + * + * SFPI Entry Points + * + ***********************************************************/ +int +onlp_sfpi_init(void) +{ + /* Called at initialization time */ + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_bitmap_get(onlp_sfp_bitmap_t* bmap) +{ + /* + * Ports {0, 32} + */ + int p; + AIM_BITMAP_CLR_ALL(bmap); + + for(p = 0; p < NUM_OF_SFP_PORT; p++) { + AIM_BITMAP_SET(bmap, p); + } + + return ONLP_STATUS_OK; +} + +static uint8_t +onlp_sfpi_reg_val_to_port_sequence(uint8_t value, int revert) +{ + int i; + uint8_t ret = 0; + + for (i = 0; i < 8; i++) { + if (i % 2) { + ret |= (value & BIT(i)) >> 1; + } + else { + ret |= (value & BIT(i)) << 1; + } + } + + return revert ? ~ret : ret; +} + +int +onlp_sfpi_is_present(int port) +{ + /* + * Return 1 if present. + * Return 0 if not present. + * Return < 0 if error. + */ + int present; + int bus = (port < 16) ? 36 : 37; + int addr = (port < 16) ? 0x22 : 0x23; /* pca9535 slave address */ + int offset; + + if (port < 8 || (port >= 16 && port <= 23)) { + offset = 0; + } + else { + offset = 1; + } + + present = onlp_i2c_readb(bus, addr, offset, ONLP_I2C_F_FORCE); + if (present < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + present = onlp_sfpi_reg_val_to_port_sequence(present, 0); + return !(present & BIT(port % 8)); +} + +int +onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + int i; + uint8_t bytes[4] = {0}; + + for (i = 0; i < AIM_ARRAYSIZE(bytes); i++) { + int bus = (i < 2) ? 36 : 37; + int addr = (i < 2) ? 0x22 : 0x23; /* pca9535 slave address */ + int offset = (i % 2); + + bytes[i] = onlp_i2c_readb(bus, addr, offset, ONLP_I2C_F_FORCE); + if (bytes[i] < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + bytes[i] = onlp_sfpi_reg_val_to_port_sequence(bytes[i], 1); + } + + /* Convert to 32 bit integer in port order */ + i = 0; + uint32_t presence_all = 0 ; + for(i = AIM_ARRAYSIZE(bytes)-1; i >= 0; i--) { + presence_all <<= 8; + presence_all |= bytes[i]; + } + + /* Populate bitmap */ + for(i = 0; presence_all; i++) { + AIM_BITMAP_MOD(dst, i, (presence_all & 1)); + presence_all >>= 1; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_eeprom_read(int port, uint8_t data[256]) +{ + int size = 0; + if(port <0 || port >= NUM_OF_SFP_PORT) + return ONLP_STATUS_E_INTERNAL; + memset(data, 0, 256); + + if(onlp_file_read(data, 256, &size, PORT_EEPROM_FORMAT, sfp_bus_index[port]) != ONLP_STATUS_OK) { + AIM_LOG_ERROR("Unable to read eeprom from port(%d)\r\n", port); + return ONLP_STATUS_E_INTERNAL; + } + + if (size != 256) { + AIM_LOG_ERROR("Unable to read eeprom from port(%d), size(%d) is different!\r\n", port, size); + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; + +} + +int +onlp_sfpi_dom_read(int port, uint8_t data[256]) +{ + FILE* fp; + char file[64] = {0}; + + sprintf(file, PORT_EEPROM_FORMAT, sfp_bus_index[port]); + fp = fopen(file, "r"); + if(fp == NULL) { + AIM_LOG_ERROR("Unable to open the eeprom device file of port(%d)", port); + return ONLP_STATUS_E_INTERNAL; + } + + if (fseek(fp, 256, SEEK_CUR) != 0) { + fclose(fp); + AIM_LOG_ERROR("Unable to set the file position indicator of port(%d)", port); + return ONLP_STATUS_E_INTERNAL; + } + + int ret = fread(data, 1, 256, fp); + fclose(fp); + if (ret != 256) { + AIM_LOG_ERROR("Unable to read the module_eeprom device file of port(%d, %d)", port, ret); + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} + +int +onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int +onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + +int +onlp_sfpi_denit(void) +{ + return ONLP_STATUS_OK; +} + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sysi.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sysi.c new file mode 100644 index 0000000000..2b4bb9f834 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sysi.c @@ -0,0 +1,115 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2014 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * + * + ***********************************************************/ +#include +#include + +#include +#include +#include +#include +#include +#include +#include "platform_lib.h" + +#include "x86_64_accton_wedge100bf_32qs_int.h" +#include "x86_64_accton_wedge100bf_32qs_log.h" + +const char* +onlp_sysi_platform_get(void) +{ + return "x86-64-accton-wedge100bf-32qs-r0"; +} + +int +onlp_sysi_onie_data_get(uint8_t** data, int* size) +{ + uint8_t* rdata = aim_zmalloc(256); + if(onlp_file_read(rdata, 256, size, IDPROM_PATH) == ONLP_STATUS_OK) { + if(*size == 256) { + *data = rdata; + return ONLP_STATUS_OK; + } + } + + aim_free(rdata); + *size = 0; + return ONLP_STATUS_E_INTERNAL; +} + +int +onlp_sysi_oids_get(onlp_oid_t* table, int max) +{ + int i; + onlp_oid_t* e = table; + memset(table, 0, max*sizeof(onlp_oid_t)); + + /* 8 Thermal sensors on the chassis */ + for (i = 1; i <= CHASSIS_THERMAL_COUNT; i++) { + *e++ = ONLP_THERMAL_ID_CREATE(i); + } + + /* 2 LEDs on the chassis */ + for (i = 1; i <= CHASSIS_LED_COUNT; i++) { + *e++ = ONLP_LED_ID_CREATE(i); + } + + /* 2 PSUs on the chassis */ + for (i = 1; i <= CHASSIS_PSU_COUNT; i++) { + *e++ = ONLP_PSU_ID_CREATE(i); + } + + /* 5 Fans on the chassis */ + for (i = 1; i <= CHASSIS_FAN_COUNT; i++) { + *e++ = ONLP_FAN_ID_CREATE(i); + } + + bmc_tty_init(); + return 0; +} + +int +onlp_sysi_platform_info_get(onlp_platform_info_t* pi) +{ + return ONLP_STATUS_OK; +} + +void +onlp_sysi_platform_info_free(onlp_platform_info_t* pi) +{ +} + +int +onlp_sysi_platform_manage_fans(void) +{ + return ONLP_STATUS_OK; +} + +int +onlp_sysi_platform_manage_leds(void) +{ + return ONLP_STATUS_E_UNSUPPORTED; +} + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c new file mode 100644 index 0000000000..43f8599191 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c @@ -0,0 +1,129 @@ +/************************************************************ + * + * + * Copyright 2014 Big Switch Networks, Inc. + * Copyright 2014 Accton Technology Corporation. + * + * Licensed under the Eclipse Public License, Version 1.0 (the + * "License"); you may not use this file except in compliance + * with the License. You may obtain a copy of the License at + * + * http://www.eclipse.org/legal/epl-v10.html + * + * Unless required by applicable law or agreed to in writing, + * software distributed under the License is distributed on an + * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, + * either express or implied. See the License for the specific + * language governing permissions and limitations under the + * License. + * + * + ************************************************************ + * + * Thermal Sensor Platform Implementation. + * + ***********************************************************/ +#include +#include +#include "platform_lib.h" + +#define VALIDATE(_id) \ + do { \ + if(!ONLP_OID_IS_THERMAL(_id)) { \ + return ONLP_STATUS_E_INVALID; \ + } \ + } while(0) + +#define THERMAL_PATH_FORMAT "/sys/bus/i2c/drivers/lm75/%s/temp1_input" +#define THERMAL_CPU_CORE_PATH_FORMAT "/sys/bus/i2c/drivers/com_e_driver/%s/temp2_input" + +static char* directory[] = /* must map with onlp_thermal_id */ +{ + NULL, + "4-0033", /* CPU_CORE files */ + "3-0048", + "3-0049", + "3-004a", + "3-004b", + "3-004c", + "3-004d", +}; + +/* Static values */ +static onlp_thermal_info_t linfo[] = { + { }, /* Not used */ + { { ONLP_THERMAL_ID_CREATE(THERMAL_CPU_CORE), "CPU Core", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_MAIN_BROAD), "TMP75-1", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_MAIN_BROAD), "TMP75-2", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_MAIN_BROAD), "TMP75-3", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_MAIN_BROAD), "TMP75-4", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_5_ON_MAIN_BROAD), "TMP75-5", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, + { { ONLP_THERMAL_ID_CREATE(THERMAL_6_ON_MAIN_BROAD), "TMP75-6", 0}, + ONLP_THERMAL_STATUS_PRESENT, + ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + }, +}; + +/* + * This will be called to intiialize the thermali subsystem. + */ +int +onlp_thermali_init(void) +{ + return ONLP_STATUS_OK; +} + +/* + * Retrieve the information structure for the given thermal OID. + * + * If the OID is invalid, return ONLP_E_STATUS_INVALID. + * If an unexpected error occurs, return ONLP_E_STATUS_INTERNAL. + * Otherwise, return ONLP_STATUS_OK with the OID's information. + * + * Note -- it is expected that you fill out the information + * structure even if the sensor described by the OID is not present. + */ +int +onlp_thermali_info_get(onlp_oid_t id, onlp_thermal_info_t* info) +{ + int tid; + char path[64] = {0}; + VALIDATE(id); + + tid = ONLP_OID_ID_GET(id); + + /* Set the onlp_oid_hdr_t and capabilities */ + *info = linfo[tid]; + + /* get path */ + if (THERMAL_CPU_CORE == tid) { + sprintf(path, THERMAL_CPU_CORE_PATH_FORMAT, directory[tid]); + }else { + sprintf(path, THERMAL_PATH_FORMAT, directory[tid]); + } + + if (bmc_file_read_int(&info->mcelsius, path, 10) < 0) { + AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", path); + return ONLP_STATUS_E_INTERNAL; + } + + return ONLP_STATUS_OK; +} diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_config.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_config.c new file mode 100644 index 0000000000..e1cf4a8585 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_config.c @@ -0,0 +1,80 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* */ +#define __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(_x) #_x +#define __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE(_x) __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(_x) +x86_64_accton_wedge100bf_32qs_config_settings_t x86_64_accton_wedge100bf_32qs_config_settings[] = +{ +#ifdef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_LOGGING + { __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_LOGGING), __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_LOGGING) }, +#else +{ X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_LOGGING(__x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_OPTIONS_DEFAULT + { __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_OPTIONS_DEFAULT), __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_OPTIONS_DEFAULT) }, +#else +{ X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_OPTIONS_DEFAULT(__x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_BITS_DEFAULT + { __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_BITS_DEFAULT), __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_BITS_DEFAULT) }, +#else +{ X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_BITS_DEFAULT(__x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_CUSTOM_BITS_DEFAULT + { __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_CUSTOM_BITS_DEFAULT), __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_CUSTOM_BITS_DEFAULT) }, +#else +{ X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_CUSTOM_BITS_DEFAULT(__x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB + { __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB), __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB) }, +#else +{ X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_STDLIB(__x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS + { __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS), __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS) }, +#else +{ X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_PORTING_INCLUDE_STDLIB_HEADERS(__x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_UCLI + { __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_UCLI), __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_UCLI) }, +#else +{ X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_UCLI(__x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME), "__undefined__" }, +#endif +#ifdef X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION + { __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION), __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE(X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION) }, +#else +{ X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_INCLUDE_DEFAULT_FAN_DIRECTION(__x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME), "__undefined__" }, +#endif + { NULL, NULL } +}; +#undef __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_VALUE +#undef __x86_64_accton_wedge100bf_32qs_config_STRINGIFY_NAME + +const char* +x86_64_accton_wedge100bf_32qs_config_lookup(const char* setting) +{ + int i; + for(i = 0; x86_64_accton_wedge100bf_32qs_config_settings[i].name; i++) { + if(!strcmp(x86_64_accton_wedge100bf_32qs_config_settings[i].name, setting)) { + return x86_64_accton_wedge100bf_32qs_config_settings[i].value; + } + } + return NULL; +} + +int +x86_64_accton_wedge100bf_32qs_config_show(struct aim_pvs_s* pvs) +{ + int i; + for(i = 0; x86_64_accton_wedge100bf_32qs_config_settings[i].name; i++) { + aim_printf(pvs, "%s = %s\n", x86_64_accton_wedge100bf_32qs_config_settings[i].name, x86_64_accton_wedge100bf_32qs_config_settings[i].value); + } + return i; +} + +/* */ diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_enums.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_enums.c new file mode 100644 index 0000000000..3d3fd1d961 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_enums.c @@ -0,0 +1,10 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +/* <--auto.start.enum(ALL).source> */ +/* */ + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_int.h b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_int.h new file mode 100644 index 0000000000..29a5023b0b --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_int.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * x86_64_accton_wedge100bf_32qs Internal Header + * + *****************************************************************************/ +#ifndef __x86_64_accton_wedge100bf_32qs_INT_H__ +#define __x86_64_accton_wedge100bf_32qs_INT_H__ + +#include + + +#endif /* __x86_64_accton_wedge100bf_32qs_INT_H__ */ \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_log.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_log.c new file mode 100644 index 0000000000..ec277c6c06 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_log.c @@ -0,0 +1,18 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_accton_wedge100bf_32qs_log.h" +/* + * x86_64_accton_wedge100bf_32qs log struct. + */ +AIM_LOG_STRUCT_DEFINE( + X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_OPTIONS_DEFAULT, + X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_BITS_DEFAULT, + NULL, /* Custom log map */ + X86_64_ACCTON_WEDGE100BF_32QS_CONFIG_LOG_CUSTOM_BITS_DEFAULT + ); + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_log.h b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_log.h new file mode 100644 index 0000000000..3956e26380 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_log.h @@ -0,0 +1,12 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#ifndef __x86_64_accton_wedge100bf_32qs_LOG_H__ +#define __x86_64_accton_wedge100bf_32qs_LOG_H__ + +#define AIM_LOG_MODULE_NAME x86_64_accton_wedge100bf_32qs +#include + +#endif /* __x86_64_accton_wedge100bf_32qs_LOG_H__ */ \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_module.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_module.c new file mode 100644 index 0000000000..159b0e8d43 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_module.c @@ -0,0 +1,24 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#include "x86_64_accton_wedge100bf_32qs_log.h" + +static int +datatypes_init__(void) +{ +#define x86_64_accton_wedge100bf_32qs_ENUMERATION_ENTRY(_enum_name, _desc) AIM_DATATYPE_MAP_REGISTER(_enum_name, _enum_name##_map, _desc, AIM_LOG_INTERNAL); +#include + return 0; +} + +void __x86_64_accton_wedge100bf_32qs_module_init__(void) +{ + AIM_LOG_STRUCT_REGISTER(); + datatypes_init__(); +} + +int __onlp_platform_version__ = 1; \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_ucli.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_ucli.c new file mode 100644 index 0000000000..6fe6c44084 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/x86_64_accton_wedge100bf_32qs_ucli.c @@ -0,0 +1,50 @@ +/**************************************************************************//** + * + * + * + *****************************************************************************/ +#include + +#if x86_64_accton_wedge100bf_32qs_CONFIG_INCLUDE_UCLI == 1 + +#include +#include +#include + +static ucli_status_t +x86_64_accton_wedge100bf_32qs_ucli_ucli__config__(ucli_context_t* uc) +{ + UCLI_HANDLER_MACRO_MODULE_CONFIG(x86_64_accton_wedge100bf_32qs) +} + +/* */ +/* */ + +static ucli_module_t +x86_64_accton_wedge100bf_32qs_ucli_module__ = + { + "x86_64_accton_wedge100bf_32qs_ucli", + NULL, + x86_64_accton_wedge100bf_32qs_ucli_ucli_handlers__, + NULL, + NULL, + }; + +ucli_node_t* +x86_64_accton_wedge100bf_32qs_ucli_node_create(void) +{ + ucli_node_t* n; + ucli_module_init(&x86_64_accton_wedge100bf_32qs_ucli_module__); + n = ucli_node_create("x86_64_accton_wedge100bf_32qs", NULL, &x86_64_accton_wedge100bf_32qs_ucli_module__); + ucli_node_subnode_add(n, ucli_module_log_node_create("x86_64_accton_wedge100bf_32qs")); + return n; +} + +#else +void* +x86_64_accton_wedge100bf_32qs_ucli_node_create(void) +{ + return NULL; +} +#endif + diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/Makefile new file mode 100644 index 0000000000..dc1e7b86f0 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/Makefile b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/Makefile new file mode 100644 index 0000000000..dc1e7b86f0 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/Makefile @@ -0,0 +1 @@ +include $(ONL)/make/pkg.mk diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/PKG.yml b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/PKG.yml new file mode 100644 index 0000000000..587c361085 --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/PKG.yml @@ -0,0 +1 @@ +!include $ONL_TEMPLATES/platform-config-platform.yml ARCH=amd64 VENDOR=accton BASENAME=x86-64-accton-wedge100bf-32qs REVISION=r0 diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/src/lib/x86-64-accton-wedge100bf-32qs-r0.yml b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/src/lib/x86-64-accton-wedge100bf-32qs-r0.yml new file mode 100644 index 0000000000..f728f2c38f --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/src/lib/x86-64-accton-wedge100bf-32qs-r0.yml @@ -0,0 +1,35 @@ +--- + +###################################################################### +# +# platform-config for WEDGE +# +###################################################################### + +x86-64-accton-wedge100bf-32qs-r0: + + grub: + + serial: >- + --unit=0 + --speed=57600 + --word=8 + --parity=0 + --stop=1 + + kernel: + <<: *kernel-4-14 + + args: >- + nopat + console=ttyS0,57600n8 + rd_NO_MD + rd_NO_LUKS + intel_iommu=off + noapic + + ##network + ## interfaces: + ## ma1: + ## name: ~ + ## syspath: pci0000:00/0000:00:14.0 diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/src/python/x86_64_accton_wedge100bf_32qs_r0/__init__.py b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/src/python/x86_64_accton_wedge100bf_32qs_r0/__init__.py new file mode 100644 index 0000000000..1c3745d86b --- /dev/null +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/platform-config/r0/src/python/x86_64_accton_wedge100bf_32qs_r0/__init__.py @@ -0,0 +1,92 @@ +from onl.platform.base import * +from onl.platform.accton import * + +class OnlPlatform_x86_64_accton_wedge100bf_32qs_r0(OnlPlatformAccton, + OnlPlatformPortConfig_32x100): + MODEL="Wedge-100bf-32qs" + PLATFORM="x86-64-accton-wedge100bf-32qs-r0" + SYS_OBJECT_ID=".100.32.2" + + def baseconfig(self): + self.insmod('optoe') + + ########### initialize I2C bus 1 ########### + self.new_i2c_devices([ + # initialize multiplexer (PCA9548) + ('pca9548', 0x70, 1), + ('pca9548', 0x71, 1), + ('pca9548', 0x72, 1), + ('pca9548', 0x73, 1), + ('pca9548', 0x74, 1), + + ('24c64', 0x50, 40), + ]) + + # Initialize QSFP devices + self.new_i2c_device('optoe1', 0x50, 2) + self.new_i2c_device('optoe1', 0x50, 3) + self.new_i2c_device('optoe1', 0x50, 4) + self.new_i2c_device('optoe1', 0x50, 5) + self.new_i2c_device('optoe1', 0x50, 6) + self.new_i2c_device('optoe1', 0x50, 7) + self.new_i2c_device('optoe1', 0x50, 8) + self.new_i2c_device('optoe1', 0x50, 9) + self.new_i2c_device('optoe1', 0x50, 10) + self.new_i2c_device('optoe1', 0x50, 11) + self.new_i2c_device('optoe1', 0x50, 12) + self.new_i2c_device('optoe1', 0x50, 13) + self.new_i2c_device('optoe1', 0x50, 14) + self.new_i2c_device('optoe1', 0x50, 15) + self.new_i2c_device('optoe1', 0x50, 16) + self.new_i2c_device('optoe1', 0x50, 17) + self.new_i2c_device('optoe1', 0x50, 18) + self.new_i2c_device('optoe1', 0x50, 19) + self.new_i2c_device('optoe1', 0x50, 20) + self.new_i2c_device('optoe1', 0x50, 21) + self.new_i2c_device('optoe1', 0x50, 22) + self.new_i2c_device('optoe1', 0x50, 23) + self.new_i2c_device('optoe1', 0x50, 24) + self.new_i2c_device('optoe1', 0x50, 25) + self.new_i2c_device('optoe1', 0x50, 26) + self.new_i2c_device('optoe1', 0x50, 27) + self.new_i2c_device('optoe1', 0x50, 28) + self.new_i2c_device('optoe1', 0x50, 29) + self.new_i2c_device('optoe1', 0x50, 30) + self.new_i2c_device('optoe1', 0x50, 31) + self.new_i2c_device('optoe1', 0x50, 32) + self.new_i2c_device('optoe1', 0x50, 33) + subprocess.call('echo port1 > /sys/bus/i2c/devices/3-0050/port_name', shell=True) + subprocess.call('echo port2 > /sys/bus/i2c/devices/2-0050/port_name', shell=True) + subprocess.call('echo port3 > /sys/bus/i2c/devices/5-0050/port_name', shell=True) + subprocess.call('echo port4 > /sys/bus/i2c/devices/4-0050/port_name', shell=True) + subprocess.call('echo port5 > /sys/bus/i2c/devices/7-0050/port_name', shell=True) + subprocess.call('echo port6 > /sys/bus/i2c/devices/6-0050/port_name', shell=True) + subprocess.call('echo port7 > /sys/bus/i2c/devices/9-0050/port_name', shell=True) + subprocess.call('echo port8 > /sys/bus/i2c/devices/8-0050/port_name', shell=True) + subprocess.call('echo port9 > /sys/bus/i2c/devices/11-0050/port_name', shell=True) + subprocess.call('echo port10 > /sys/bus/i2c/devices/10-0050/port_name', shell=True) + subprocess.call('echo port11 > /sys/bus/i2c/devices/13-0050/port_name', shell=True) + subprocess.call('echo port12 > /sys/bus/i2c/devices/12-0050/port_name', shell=True) + subprocess.call('echo port13 > /sys/bus/i2c/devices/15-0050/port_name', shell=True) + subprocess.call('echo port14 > /sys/bus/i2c/devices/14-0050/port_name', shell=True) + subprocess.call('echo port15 > /sys/bus/i2c/devices/17-0050/port_name', shell=True) + subprocess.call('echo port16 > /sys/bus/i2c/devices/16-0050/port_name', shell=True) + subprocess.call('echo port17 > /sys/bus/i2c/devices/19-0050/port_name', shell=True) + subprocess.call('echo port18 > /sys/bus/i2c/devices/18-0050/port_name', shell=True) + subprocess.call('echo port19 > /sys/bus/i2c/devices/21-0050/port_name', shell=True) + subprocess.call('echo port20 > /sys/bus/i2c/devices/20-0050/port_name', shell=True) + subprocess.call('echo port21 > /sys/bus/i2c/devices/23-0050/port_name', shell=True) + subprocess.call('echo port22 > /sys/bus/i2c/devices/22-0050/port_name', shell=True) + subprocess.call('echo port23 > /sys/bus/i2c/devices/25-0050/port_name', shell=True) + subprocess.call('echo port24 > /sys/bus/i2c/devices/24-0050/port_name', shell=True) + subprocess.call('echo port25 > /sys/bus/i2c/devices/27-0050/port_name', shell=True) + subprocess.call('echo port26 > /sys/bus/i2c/devices/26-0050/port_name', shell=True) + subprocess.call('echo port27 > /sys/bus/i2c/devices/29-0050/port_name', shell=True) + subprocess.call('echo port28 > /sys/bus/i2c/devices/28-0050/port_name', shell=True) + subprocess.call('echo port29 > /sys/bus/i2c/devices/31-0050/port_name', shell=True) + subprocess.call('echo port30 > /sys/bus/i2c/devices/30-0050/port_name', shell=True) + subprocess.call('echo port31 > /sys/bus/i2c/devices/33-0050/port_name', shell=True) + subprocess.call('echo port32 > /sys/bus/i2c/devices/32-0050/port_name', shell=True) + subprocess.call('ifconfig usb0 up', shell=True) + + return True From ae6d079d69e6a01128372620c48d1772aa281413 Mon Sep 17 00:00:00 2001 From: WillyLiu-EC Date: Thu, 30 Dec 2021 15:53:12 +0800 Subject: [PATCH 2/4] [wedge100bf-32qs] Add new platform --- .../module/src/fani.c | 2 +- .../module/src/platform_lib.c | 59 ++-- .../module/src/platform_lib.h | 2 +- .../module/src/psui.c | 86 +++--- .../module/src/sfpi.c | 262 +++++++++++++++++- .../module/src/thermali.c | 2 +- 6 files changed, 344 insertions(+), 69 deletions(-) diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/fani.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/fani.c index 3775723ff1..e4b8eac032 100644 --- a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/fani.c +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/fani.c @@ -73,7 +73,7 @@ onlp_fan_info_t finfo[] = { int onlp_fani_init(void) { - return ONLP_STATUS_OK; + return bmc_tty_init(); } int diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.c index e873329e43..77205205a4 100644 --- a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.c +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.c @@ -33,7 +33,7 @@ #define TTY_PROMPT "@bmc:" #define TTY_I2C_TIMEOUT 55000 #define TTY_BMC_LOGIN_TIMEOUT 1000000 -#define TTY_RETRY 10 +#define TTY_RETRY 20 #define MAXIMUM_TTY_BUFFER_LENGTH 1024 #define MAXIMUM_TTY_STRING_LENGTH (MAXIMUM_TTY_BUFFER_LENGTH - 1) @@ -91,6 +91,16 @@ static int tty_exec_buf(unsigned long udelay, const char *str) return (strstr(tty_buf, str) != NULL) ? 0 : -1; } +/* Clear Rx buffer by reading it out */ +static int tty_clear_rxbuf(void) { + if (tty_fd < 0) + return ONLP_STATUS_E_GENERIC; + + read(tty_fd, tty_buf, MAXIMUM_TTY_BUFFER_LENGTH); + memset(tty_buf, 0, MAXIMUM_TTY_BUFFER_LENGTH); + return ONLP_STATUS_OK; +} + static int tty_login(void) { int i = 10; @@ -275,31 +285,33 @@ int bmc_command_read_int(int* value, char *cmd, int base) { int len; - int i; + int i, ret; char *prev_str = NULL; - char *current_str= NULL; - if (bmc_send_command(cmd) < 0) { - return ONLP_STATUS_E_INTERNAL; - } + char *current_str = NULL; + ret = -1; len = (int)strlen(cmd); - prev_str = strstr(tty_buf, cmd); - if (prev_str == NULL) { - return -1; - } + for (i = 1; i <= TTY_RETRY; i++) { - current_str = strstr(prev_str + len, cmd); - if(current_str == NULL) { - if( !chk_numeric_char(prev_str + len, base) ){ - return -1; - } - *value = strtoul(prev_str + len, NULL, base); - break; - }else { + tty_clear_rxbuf(); + if (bmc_send_command(cmd) < 0) { + return ONLP_STATUS_E_INTERNAL; + } + prev_str = strstr(tty_buf ,cmd); + if (prev_str == NULL) { + continue; + } + while((current_str = strstr(prev_str + len, cmd)) != NULL){ prev_str = current_str; + } + if( !chk_numeric_char(prev_str + len, base) ) { continue; } + *value = strtoul(prev_str + len, NULL, base); + ret = 0; + goto exit; } - return 0; +exit: + return ret; } @@ -312,12 +324,17 @@ bmc_file_read_int(int* value, char *file, int base) } int -bmc_i2c_readb(uint8_t bus, uint8_t devaddr, uint8_t addr) +bmc_i2c_readb(uint8_t bus, uint8_t devaddr, int16_t addr) { int ret = 0, value; char cmd[64] = {0}; - snprintf(cmd, sizeof(cmd), "i2cget -f -y %d 0x%x 0x%02x\r\n", bus, devaddr, addr); + if (addr < 0) { + snprintf(cmd, sizeof(cmd), "i2cget -f -y %d 0x%x\r\n", bus, devaddr); + } else { + snprintf(cmd, sizeof(cmd), "i2cget -f -y %d 0x%x 0x%02x\r\n", bus, + devaddr, (uint8_t)addr); + } ret = bmc_command_read_int(&value, cmd, 16); return (ret < 0) ? ret : value; } diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.h b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.h index 4f59bad199..36e93b31c9 100644 --- a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.h +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/platform_lib.h @@ -60,7 +60,7 @@ enum onlp_thermal_id int bmc_send_command(char *cmd); int bmc_file_read_str(char *file, char *result, int slen); int bmc_file_read_int(int* value, char *file, int base); -int bmc_i2c_readb(uint8_t bus, uint8_t devaddr, uint8_t addr); +int bmc_i2c_readb(uint8_t bus, uint8_t devaddr, int16_t addr); int bmc_i2c_writeb(uint8_t bus, uint8_t devaddr, uint8_t addr, uint8_t value); int bmc_i2c_write_quick_mode(uint8_t bus, uint8_t devaddr, uint8_t value); int bmc_i2c_readw(uint8_t bus, uint8_t devaddr, uint8_t addr); diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/psui.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/psui.c index 641f4cb90e..c812685eac 100644 --- a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/psui.c +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/psui.c @@ -38,17 +38,18 @@ #define PSU1_ID 1 #define PSU2_ID 2 +#define PSU_I2CBUS 7 #define SYS_CPLD_PATH_FMT "/sys/bus/i2c/drivers/syscpld/12-0031/%s" #define PSU_PRESENT_FMT "psu%d_present" #define PSU_PWROK_FMT "psu%d_output_pwr_sts" -#define PSU_PFE1100_PATH_FMT "/sys/bus/i2c/devices/7-%s/%s\r\n" +#define PSU_PFE1100_PATH_FMT "/sys/bus/i2c/devices/%d-00%02x/%s\r\n" #define PSU_PFE1100_MODEL "mfr_model_label" #define PSU_PFE1100_SERIAL "mfr_serial_label" -#if 0 -static const char *psu_pfedrv_i2c_devaddr[] = {"0059", "005a"}; + +static const uint8_t pmbus_addr[] = {0x5a, 0x59}; /* * Get all information about the given PSU oid. @@ -64,13 +65,12 @@ static onlp_psu_info_t pinfo[] = } }; -#endif int onlp_psui_init(void) { - return ONLP_STATUS_OK; + return bmc_tty_init(); } -#if 0 + static int twos_complement_to_int(uint16_t data, uint8_t valid_bit, int mask) { @@ -91,14 +91,14 @@ pmbus_parse_literal_format(uint16_t value) return (exponent >= 0) ? (mantissa << exponent) * multiplier : (mantissa * multiplier) / (1 << -exponent); } -#endif + int onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) { - #if 0 int pid, value, addr, ret = 0; char file[32] = {0}; char path[80] = {0}; + int bus = PSU_I2CBUS; VALIDATE(id); @@ -127,7 +127,25 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) return ONLP_STATUS_OK; } info->status |= ONLP_PSU_STATUS_PRESENT; - info->caps = ONLP_PSU_CAPS_AC; + info->caps = ONLP_PSU_CAPS_AC; + + /* Get model name */ + ret = snprintf(path, sizeof(path), PSU_PFE1100_PATH_FMT, bus, + pmbus_addr[pid - PSU1_ID], PSU_PFE1100_MODEL); + if( ret >= sizeof(path) ) { + AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path)); + return ONLP_STATUS_E_INTERNAL; + } + bmc_file_read_str(path, info->model, sizeof(info->model)); + + /* Get serial number */ + ret = snprintf(path, sizeof(path), PSU_PFE1100_PATH_FMT, bus, + pmbus_addr[pid - PSU1_ID], PSU_PFE1100_SERIAL); + if( ret >= sizeof(path) ) { + AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path)); + return ONLP_STATUS_E_INTERNAL; + } + bmc_file_read_str(path, info->serial, sizeof(info->serial)); /* Get power good status */ @@ -152,25 +170,33 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } - /* Get input output power status + /* open i2c mux channels for PSUs */ - value = (pid == PSU1_ID) ? 0x2 : 0x1; /* mux channel for psu */ - if (bmc_i2c_write_quick_mode(7, 0x70, value) < 0) { - AIM_LOG_ERROR("Unable to set i2c device (7/0x70)\r\n"); + addr = 0x70; + value = bmc_i2c_readb(bus, addr, -1); + if (value >= 0) { + value |= 0x03; /*Open both PSU channels.*/ + if (bmc_i2c_write_quick_mode(bus, addr, value) < 0) { + AIM_LOG_ERROR("Unable to set i2c device (%d/0x%02x)\r\n", + bus, addr); + return ONLP_STATUS_E_INTERNAL; + } + } else { + AIM_LOG_ERROR("Unable to get i2c device (%d/0x%02x)\r\n", bus, addr); return ONLP_STATUS_E_INTERNAL; } usleep(1200); /* Read vin */ - addr = (pid == PSU1_ID) ? 0x59 : 0x5a; - value = bmc_i2c_readw(7, addr, 0x88); + addr = pmbus_addr[pid - PSU1_ID]; + value = bmc_i2c_readw(bus, addr, 0x88); if (value >= 0) { info->mvin = pmbus_parse_literal_format(value); info->caps |= ONLP_PSU_CAPS_VIN; } /* Read iin */ - value = bmc_i2c_readw(7, addr, 0x89); + value = bmc_i2c_readw(bus, addr, 0x89); if (value >= 0) { info->miin = pmbus_parse_literal_format(value); info->caps |= ONLP_PSU_CAPS_IIN; @@ -183,14 +209,14 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) } /* Read iout */ - value = bmc_i2c_readw(7, addr, 0x8c); + value = bmc_i2c_readw(bus, addr, 0x8c); if (value >= 0) { info->miout = pmbus_parse_literal_format(value); info->caps |= ONLP_PSU_CAPS_IOUT; } /* Read pout */ - value = bmc_i2c_readw(7, addr, 0x96); + value = bmc_i2c_readw(bus, addr, 0x96); if (value >= 0) { info->mpout = pmbus_parse_literal_format(value); info->caps |= ONLP_PSU_CAPS_POUT; @@ -198,26 +224,10 @@ onlp_psui_info_get(onlp_oid_t id, onlp_psu_info_t* info) /* Get vout */ if ((info->caps & ONLP_PSU_CAPS_IOUT) && (info->caps & ONLP_PSU_CAPS_POUT) && info->miout != 0) { - info->mvout = info->mpout / info->miout * 1000; - info->caps |= ONLP_PSU_CAPS_VOUT; + info->mvout = info->mpout / info->miout * 1000; + info->caps |= ONLP_PSU_CAPS_VOUT; } - /* Get model name */ - ret = snprintf(path, sizeof(path), PSU_PFE1100_PATH_FMT, psu_pfedrv_i2c_devaddr[pid-1], PSU_PFE1100_MODEL); - if( ret >= sizeof(path) ){ - AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path)); - return ONLP_STATUS_E_INTERNAL; - } - bmc_file_read_str(path, info->model, sizeof(info->model)); - - /* Get serial number */ - ret = snprintf(path, sizeof(path), PSU_PFE1100_PATH_FMT, psu_pfedrv_i2c_devaddr[pid-1], PSU_PFE1100_SERIAL); - if( ret >= sizeof(path) ){ - AIM_LOG_ERROR("path size overwrite (%d,%d)\r\n", ret, sizeof(path)); - return ONLP_STATUS_E_INTERNAL; - } - bmc_file_read_str(path, info->serial, sizeof(info->serial)); - #endif return ONLP_STATUS_OK; } @@ -225,6 +235,4 @@ int onlp_psui_ioctl(onlp_oid_t pid, va_list vargs) { return ONLP_STATUS_E_UNSUPPORTED; -} - - +} \ No newline at end of file diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sfpi.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sfpi.c index 563406650f..93e733698b 100644 --- a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sfpi.c +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sfpi.c @@ -27,7 +27,6 @@ #include #include #include "platform_lib.h" - #include "x86_64_accton_wedge100bf_32qs_log.h" #define BIT(i) (1 << (i)) @@ -41,6 +40,19 @@ static const int sfp_bus_index[] = { 27, 26, 29, 28, 31, 30, 33, 32 }; +typedef struct qsfp_config_s { + uint8_t bus; + uint8_t addr; + uint8_t offset; +} qsfp_config_t; + +static qsfp_config_t qsfp_addr[4] = +{ + {34, 0x20, 0x6}, + {34, 0x20, 0x7}, + {35, 0x21, 0x6}, + {35, 0x21, 0x7}, +}; /************************************************************ * * SFPI Entry Points @@ -49,7 +61,18 @@ static const int sfp_bus_index[] = { int onlp_sfpi_init(void) { - /* Called at initialization time */ + int i; + /* configure gpio pin to output according to pca9535 datasheet*/ + /* Config bus 34 address 0x20 to output pin : 0000 0000 0000 0000 */ + /* Config bus 35 address 0x21 to output pin : 0000 0000 0000 0000 */ + for(i=0 ; i<4 ; i++) + { + if (onlp_i2c_writeb(qsfp_addr[i].bus, qsfp_addr[i].addr, qsfp_addr[i].offset, 0x0, ONLP_I2C_F_FORCE) < 0) + { + return ONLP_STATUS_E_INTERNAL; + } + } + return ONLP_STATUS_OK; } @@ -113,6 +136,7 @@ onlp_sfpi_is_present(int port) } present = onlp_sfpi_reg_val_to_port_sequence(present, 0); + return !(present & BIT(port % 8)); } @@ -155,6 +179,8 @@ onlp_sfpi_presence_bitmap_get(onlp_sfp_bitmap_t* dst) int onlp_sfpi_rx_los_bitmap_get(onlp_sfp_bitmap_t* dst) { + AIM_BITMAP_CLR_ALL(dst); + return ONLP_STATUS_OK; } @@ -212,13 +238,238 @@ onlp_sfpi_dom_read(int port, uint8_t data[256]) int onlp_sfpi_control_set(int port, onlp_sfp_control_t control, int value) { - return ONLP_STATUS_E_UNSUPPORTED; + int rv; + if (port < 0 || port >= NUM_OF_SFP_PORT) { + return ONLP_STATUS_E_UNSUPPORTED; + } + + switch(control) + { + case ONLP_SFP_CONTROL_LP_MODE: + { + /* + * Return 1 : Low Power. + * Return 0 : High Power. + * Return < 0 if error. + */ + int power_mode_val = 0; + int bus = (port < 16) ? 34 : 35; + int addr = (port < 16) ? 0x20 : 0x21; /* pca9535 slave address */ + int read_offset; + int write_offset; + int wirte_val; + static int reg_port_lp_map[32] = {1, 0 , 3, 2, 5, 4, 7, 6, + 9, 8, 11, 10, 13, 12, 15, 14, + 1, 0 , 3, 2, 5, 4, 7, 6, 9, + 8, 11, 10, 13, 12, 15, 14}; + + if (port < 8 || (port >= 16 && port <= 23)) { + read_offset = 0; + write_offset = 2; + } + else { + read_offset = 1; + write_offset = 3; + } + + power_mode_val = onlp_i2c_readb(bus, addr, read_offset, ONLP_I2C_F_FORCE); + if (power_mode_val < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + if (port < 8 || (port >= 16 && port <= 23)) { + /* Low byte data : no need shift */ + if(value == 1) + wirte_val = power_mode_val | BIT(reg_port_lp_map[port]); + else + wirte_val = power_mode_val & ~(BIT(reg_port_lp_map[port])); + } + else { + power_mode_val = power_mode_val << 8; + + if(value == 1) + wirte_val = power_mode_val | BIT(reg_port_lp_map[port]); + else + wirte_val = power_mode_val & ~(BIT(reg_port_lp_map[port])); + + wirte_val = wirte_val >> 8; + } + + if (onlp_i2c_writeb(bus, addr, write_offset, wirte_val, ONLP_I2C_F_FORCE) < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + power_mode_val = onlp_i2c_readb(bus, addr, read_offset, ONLP_I2C_F_FORCE); + if (power_mode_val < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + rv = ONLP_STATUS_OK; + + break; + } + + case ONLP_SFP_CONTROL_RESET: + { + int rst_cpld_val; + int rst_cpld_val_write; + int bus = 1; + int reg = 0x32; + int offset; + int bit; + + if (port < 8) + { + offset = 0x34; + bit = port; + } + else if (port >= 8 && port < 16) + { + offset = 0x35; + bit = port-8; + } + else if (port >= 16 && port < 24) + { + offset = 0x36; + bit = port-16; + } + else if (port >= 24 && port < 32) + { + offset = 0x37; + bit = port-24; + } + else + { + return ONLP_STATUS_E_INTERNAL; + } + + rst_cpld_val = onlp_i2c_readb(bus, reg, offset, ONLP_I2C_F_FORCE); + if (rst_cpld_val < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + if(value == 1) + rst_cpld_val_write = rst_cpld_val & ~(BIT(bit)); + else + rst_cpld_val_write = rst_cpld_val | BIT(bit); + + if (onlp_i2c_writeb(bus, reg, offset, rst_cpld_val_write, ONLP_I2C_F_FORCE) < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + rv = ONLP_STATUS_OK; + break; + } + + default: + rv = ONLP_STATUS_E_UNSUPPORTED; + break; + } + + return rv; } int onlp_sfpi_control_get(int port, onlp_sfp_control_t control, int* value) -{ - return ONLP_STATUS_E_UNSUPPORTED; +{ + int rv; + + if (port < 0 || port >= NUM_OF_SFP_PORT) { + return ONLP_STATUS_E_UNSUPPORTED; + } + + switch(control){ + case ONLP_SFP_CONTROL_LP_MODE: + { + /* + * Return 1 : Low Power. + * Return 0 : High Power. + * Return < 0 if error. + */ + int power_mode_val = 0; + int bus = (port < 16) ? 34 : 35; + int addr = (port < 16) ? 0x20 : 0x21; /* pca9535 slave address */ + int offset; + static int reg_port_lp_map[32] = {1, 0 , 3, 2, 5, 4, 7, 6, + 9, 8, 11, 10, 13, 12, 15, 14, + 1, 0 , 3, 2, 5, 4, 7, 6, 9, + 8, 11, 10, 13, 12, 15, 14}; + + if (port < 8 || (port >= 16 && port <= 23)) { + offset = 0; + } + else { + offset = 1; + } + + power_mode_val = onlp_i2c_readb(bus, addr, offset, ONLP_I2C_F_FORCE); + if (power_mode_val < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + if (port < 8 || (port >= 16 && port <= 23)) { + /* Low byte data : no need shift */ + } + else { + power_mode_val = power_mode_val << 8; + } + + *value = (power_mode_val & BIT(reg_port_lp_map[port])); + + rv = ONLP_STATUS_OK; + + break; + } + case ONLP_SFP_CONTROL_RESET: + { + int offset; + int bit; + int rst_cpld_val; + + if (port < 8) + { + offset = 0x34; + bit = port; + } + else if (port >= 8 && port < 16) + { + offset = 0x35; + bit = port-8; + } + else if (port >= 16 && port < 24) + { + offset = 0x36; + bit = port-16; + } + else if (port >= 24 && port < 32) + { + offset = 0x37; + bit = port-24; + } + else + { + return ONLP_STATUS_E_INTERNAL; + } + + rst_cpld_val = onlp_i2c_readb(1, 0x32, offset, ONLP_I2C_F_FORCE); + if (rst_cpld_val < 0) { + return ONLP_STATUS_E_INTERNAL; + } + + *value = !((rst_cpld_val & BIT(bit)) >> bit); + + rv = ONLP_STATUS_OK; + + break; + } + + default: + rv = ONLP_STATUS_E_UNSUPPORTED; + + break; + } + + return rv; } int @@ -226,4 +477,3 @@ onlp_sfpi_denit(void) { return ONLP_STATUS_OK; } - diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c index 43f8599191..eb9500b200 100644 --- a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c @@ -88,7 +88,7 @@ static onlp_thermal_info_t linfo[] = { int onlp_thermali_init(void) { - return ONLP_STATUS_OK; + return bmc_tty_init(); } /* From 7a328017becb612a94f68a9a6f20b632245f211f Mon Sep 17 00:00:00 2001 From: WillyLiu-EC Date: Tue, 4 Jan 2022 14:59:26 +0800 Subject: [PATCH 3/4] [wedge100bf-32qs] Support command to get CPLD version --- .../module/src/sysi.c | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sysi.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sysi.c index 2b4bb9f834..e7fafd6e88 100644 --- a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sysi.c +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/sysi.c @@ -90,9 +90,29 @@ onlp_sysi_oids_get(onlp_oid_t* table, int max) return 0; } +#define SYS_CPLD_VERSION_PATH "/sys/bus/i2c/devices/12-0031/cpld_rev" +#define FAN_CPLD_VERSION_PATH "/sys/bus/i2c/devices/8-0033/cpld_rev" + int onlp_sysi_platform_info_get(onlp_platform_info_t* pi) { + int sys_cpld; + int fan_cpld; + + bmc_tty_init(); + + if (bmc_file_read_int(&sys_cpld, SYS_CPLD_VERSION_PATH, 16) < 0) { + AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", SYS_CPLD_VERSION_PATH); + return ONLP_STATUS_E_INTERNAL; + } + + if (bmc_file_read_int(&fan_cpld, FAN_CPLD_VERSION_PATH, 16) < 0) { + AIM_LOG_ERROR("Unable to read status from file (%s)\r\n", FAN_CPLD_VERSION_PATH); + return ONLP_STATUS_E_INTERNAL; + } + + pi->cpld_versions = aim_fstrdup("System CPLD : %d, FAN CPLD : %d", sys_cpld, fan_cpld); + return ONLP_STATUS_OK; } From 3d33566124317c9944ef23c08d9fe836c6f51e3f Mon Sep 17 00:00:00 2001 From: WillyLiu-EC Date: Fri, 14 Jan 2022 15:11:45 +0800 Subject: [PATCH 4/4] [wedge100bf-32qs] Modify thermal threshold Signed-off-by: WillyLiu-EC --- .../module/src/thermali.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c index eb9500b200..ff7e8b0b82 100644 --- a/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c +++ b/packages/platforms/accton/x86-64/wedge100bf-32qs/onlp/builds/x86_64_accton_wedge100bf_32qs/module/src/thermali.c @@ -54,31 +54,31 @@ static onlp_thermal_info_t linfo[] = { { }, /* Not used */ { { ONLP_THERMAL_ID_CREATE(THERMAL_CPU_CORE), "CPU Core", 0}, ONLP_THERMAL_STATUS_PRESENT, - ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + ONLP_THERMAL_CAPS_ALL, 0, {97200, 102600, 108000} }, { { ONLP_THERMAL_ID_CREATE(THERMAL_1_ON_MAIN_BROAD), "TMP75-1", 0}, ONLP_THERMAL_STATUS_PRESENT, - ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + ONLP_THERMAL_CAPS_ALL, 0, {72000, 76000, 80000} }, { { ONLP_THERMAL_ID_CREATE(THERMAL_2_ON_MAIN_BROAD), "TMP75-2", 0}, ONLP_THERMAL_STATUS_PRESENT, - ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + ONLP_THERMAL_CAPS_ALL, 0, {54000, 57000, 60000} }, { { ONLP_THERMAL_ID_CREATE(THERMAL_3_ON_MAIN_BROAD), "TMP75-3", 0}, ONLP_THERMAL_STATUS_PRESENT, - ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + ONLP_THERMAL_CAPS_ALL, 0, {54000, 57000, 60000} }, { { ONLP_THERMAL_ID_CREATE(THERMAL_4_ON_MAIN_BROAD), "TMP75-4", 0}, ONLP_THERMAL_STATUS_PRESENT, - ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + ONLP_THERMAL_CAPS_ALL, 0, {54000, 57000, 60000} }, { { ONLP_THERMAL_ID_CREATE(THERMAL_5_ON_MAIN_BROAD), "TMP75-5", 0}, ONLP_THERMAL_STATUS_PRESENT, - ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + ONLP_THERMAL_CAPS_ALL, 0, {945000, 997500, 105000} }, { { ONLP_THERMAL_ID_CREATE(THERMAL_6_ON_MAIN_BROAD), "TMP75-6", 0}, ONLP_THERMAL_STATUS_PRESENT, - ONLP_THERMAL_CAPS_ALL, 0, ONLP_THERMAL_THRESHOLD_INIT_DEFAULTS + ONLP_THERMAL_CAPS_ALL, 0, {54000, 57000, 60000} }, };