RziL: fix incorrect naming of fabs as fpos (#5955)

* rzil: fix incorrect output

* update test cases

Author: Ehab-24

librz/il/il_export_string.c

@@ -388,7 +388,7 @@ static void il_opdmp_fneg(RzILOpPure *op, RzStrBuf *sb, int pad) {
 }
 
 static void il_opdmp_fabs(RzILOpPure *op, RzStrBuf *sb, int pad) {
-	il_op_param_1("fpos", op->op.fabs, f);
+	il_op_param_1("fabs", op->op.fabs, f);
 }
 
 static void il_opdmp_fcast_int(RzILOpPure *op, RzStrBuf *sb, int pad) {

test/db/asm/arm_32

@@ -683,11 +683,11 @@ d "vbsl d0, d1, d2" 120111f3 0x0 (set d0 (| (& (var d1) (var d0)) (& (var d2) (~
 d "vbsl q0, q1, q2" 540112f3 0x0 (seq (set d0 (cast 64 false (| (& (append (var d3) (var d2)) (append (var d1) (var d0))) (& (append (var d5) (var d4)) (~ (append (var d1) (var d0))))))) (set d1 (cast 64 false (>> (| (& (append (var d3) (var d2)) (append (var d1) (var d0))) (& (append (var d5) (var d4)) (~ (append (var d1) (var d0))))) (bv 8 0x40) false))))
 d "vmvn d0, d1" 8105b0f3 0x0 (set d0 (~ (var d1)))
 d "vmvn q0, q1" c205b0f3 0x0 (seq (set d0 (cast 64 false (~ (append (var d3) (var d2))))) (set d1 (cast 64 false (>> (~ (append (var d3) (var d2))) (bv 8 0x40) false))))
-d "vacge.f32 d0, d1, d2" 120e01f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
-d "vacge.f32 d0, d0, d1" 110e00f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (var d0) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (var d0) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
-d "vacge.f32 q0, q1, q2" 540e02f3 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false) (bv 8 0x40) false))))
-d "vacgt.f32 d0, d1, d2" 120e21f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (<. (fpos (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (<. (fpos (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
-d "vacgt.f32 q0, q1, q2" 540e22f3 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fpos (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )) (fpos (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false) (bv 8 0x40) false))))
+d "vacge.f32 d0, d1, d2" 120e01f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) )) (fabs (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) )) (fabs (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
+d "vacge.f32 d0, d0, d1" 110e00f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (var d0) (bv 8 0x0) false)) )) (fabs (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (var d0) (bv 8 0x20) false)) )) (fabs (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
+d "vacge.f32 q0, q1, q2" 540e02f3 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (! (<. (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false) (bv 8 0x40) false))))
+d "vacgt.f32 d0, d1, d2" 120e21f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (<. (fabs (float 0 (cast 32 false (>> (var d2) (bv 8 0x0) false)) )) (fabs (float 0 (cast 32 false (>> (var d1) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (<. (fabs (float 0 (cast 32 false (>> (var d2) (bv 8 0x20) false)) )) (fabs (float 0 (cast 32 false (>> (var d1) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
+d "vacgt.f32 q0, q1, q2" 540e22f3 0x0 (seq empty (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x0) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x0) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x20) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x20) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x40) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x40) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x40) false) (bv 8 0x40) false))) (set d0 (cast 64 false (<< (cast 128 false (ite (<. (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false))) (set d1 (cast 64 false (>> (<< (cast 128 false (ite (<. (fabs (float 0 (cast 32 false (>> (append (var d5) (var d4)) (bv 8 0x60) false)) )) (fabs (float 0 (cast 32 false (>> (append (var d3) (var d2)) (bv 8 0x60) false)) ))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x60) false) (bv 8 0x40) false))))
 d "vceq.i8 d0, d1, d2" 120801f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x0) false)) (cast 8 false (>> (var d2) (bv 8 0x0) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x8) false)) (cast 8 false (>> (var d2) (bv 8 0x8) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x8) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x10) false)) (cast 8 false (>> (var d2) (bv 8 0x10) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x18) false)) (cast 8 false (>> (var d2) (bv 8 0x18) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x18) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x20) false)) (cast 8 false (>> (var d2) (bv 8 0x20) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x28) false)) (cast 8 false (>> (var d2) (bv 8 0x28) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x28) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x30) false)) (cast 8 false (>> (var d2) (bv 8 0x30) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x30) false)) (set d0 (<< (cast 64 false (ite (== (cast 8 false (>> (var d1) (bv 8 0x38) false)) (cast 8 false (>> (var d2) (bv 8 0x38) false))) (~ (bv 8 0x0)) (bv 8 0x0))) (bv 8 0x38) false)))
 d "vceq.i16 d0, d1, d2" 120811f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (== (cast 16 false (>> (var d1) (bv 8 0x0) false)) (cast 16 false (>> (var d2) (bv 8 0x0) false))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (== (cast 16 false (>> (var d1) (bv 8 0x10) false)) (cast 16 false (>> (var d2) (bv 8 0x10) false))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x10) false)) (set d0 (<< (cast 64 false (ite (== (cast 16 false (>> (var d1) (bv 8 0x20) false)) (cast 16 false (>> (var d2) (bv 8 0x20) false))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x20) false)) (set d0 (<< (cast 64 false (ite (== (cast 16 false (>> (var d1) (bv 8 0x30) false)) (cast 16 false (>> (var d2) (bv 8 0x30) false))) (~ (bv 16 0x0)) (bv 16 0x0))) (bv 8 0x30) false)))
 d "vceq.i32 d0, d1, d2" 120821f3 0x0 (seq empty (set d0 (<< (cast 64 false (ite (== (cast 32 false (>> (var d1) (bv 8 0x0) false)) (cast 32 false (>> (var d2) (bv 8 0x0) false))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x0) false)) (set d0 (<< (cast 64 false (ite (== (cast 32 false (>> (var d1) (bv 8 0x20) false)) (cast 32 false (>> (var d2) (bv 8 0x20) false))) (~ (bv 32 0x0)) (bv 32 0x0))) (bv 8 0x20) false)))
@@ -759,8 +759,8 @@ d "vldr s0, [fp, -0x14]" 050a1bed 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00
 d "vstr s1, [fp, 0x30]" 0c0acbed 0x0 (storew 0 (+ (var r11) (bv 32 0x30)) (cast 32 false (>> (var d0) (bv 7 0x20) false)))
 d "vldr s0, [sp, 8]" 020a9ded 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (loadw 0 32 (+ (var sp) (bv 32 0x8))))))
 d "vldr d0, [r2]" 000b92ed 0x0 (set d0 (loadw 0 64 (var r2)))
-d "vabs.f32 s0, s15" e70ab0ee 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (fbits (fpos (float 0 (cast 32 false (>> (var d7) (bv 7 0x20) false)) ))))))
-d "vabs.f64 d1, d8" c81bb0ee 0x0 (set d1 (fbits (fpos (float 1 (var d8) ))))
+d "vabs.f32 s0, s15" e70ab0ee 0x0 (set d0 (| (& (var d0) (bv 64 0xffffffff00000000)) (cast 64 false (fbits (fabs (float 0 (cast 32 false (>> (var d7) (bv 7 0x20) false)) ))))))
+d "vabs.f64 d1, d8" c81bb0ee 0x0 (set d1 (fbits (fabs (float 1 (var d8) ))))
 d "vswp d0, d1" 0100b2f3 0x0 (seq (set d0 (var d1)) (set d1 (var d0)))
 d "vswp q2, q3" 4640b2f3 0x0 (seq (set d4 (cast 64 false (append (var d7) (var d6)))) (set d5 (cast 64 false (>> (append (var d7) (var d6)) (bv 8 0x40) false))) (set d6 (cast 64 false (append (var d5) (var d4)))) (set d7 (cast 64 false (>> (append (var d5) (var d4)) (bv 8 0x40) false))))
 d "vzip.8 d0, d1" 8101b2f3 0x0 (seq (set d0 (cast 64 false (| (| (| (| (| (| (| (| (bv 128 0x0) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x0) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x0) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x8) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x8) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x10) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x10) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x18) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x18) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x20) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x20) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x28) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x28) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x30) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x30) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x38) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x38) false)))) (bv 32 0x10) false)))) (set d1 (cast 64 false (>> (| (| (| (| (| (| (| (| (bv 128 0x0) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x0) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x0) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x8) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x8) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x10) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x10) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x18) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x18) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x20) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x20) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x28) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x28) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x30) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x30) false)))) (bv 32 0x10) false)) (<< (| (<< (cast 128 false (cast 8 false (>> (var d1) (bv 8 0x38) false))) (bv 8 0x8) false) (cast 128 false (cast 8 false (>> (var d0) (bv 8 0x38) false)))) (bv 32 0x10) false)) (bv 8 0x8) false))))