diff --git a/crates/core_arch/src/powerpc/altivec.rs b/crates/core_arch/src/powerpc/altivec.rs index ccfed88a93..781de597a3 100644 --- a/crates/core_arch/src/powerpc/altivec.rs +++ b/crates/core_arch/src/powerpc/altivec.rs @@ -411,7 +411,7 @@ unsafe extern "unadjusted" { } #[macro_use] -mod sealed { +pub(crate) mod sealed { use super::*; #[unstable(feature = "stdarch_powerpc", issue = "111145")] @@ -837,7 +837,6 @@ mod sealed { impl_vec_cmp! { [VectorCmpGt vec_cmpgt] ( vec_vcmpgtub, vec_vcmpgtsb, vec_vcmpgtuh, vec_vcmpgtsh, vec_vcmpgtuw, vec_vcmpgtsw ) } test_impl! { vec_vcmpgefp(a: vector_float, b: vector_float) -> vector_bool_int [ vcmpgefp, vcmpgefp ] } - test_impl! { vec_vcmpequb(a: vector_unsigned_char, b: vector_unsigned_char) -> vector_bool_char [ vcmpequb, vcmpequb ] } test_impl! { vec_vcmpequh(a: vector_unsigned_short, b: vector_unsigned_short) -> vector_bool_short [ vcmpequh, vcmpequh ] } test_impl! { vec_vcmpequw(a: vector_unsigned_int, b: vector_unsigned_int) -> vector_bool_int [ vcmpequw, vcmpequw ] } @@ -2416,7 +2415,8 @@ mod sealed { #[inline] #[target_feature(enable = "altivec")] - #[cfg_attr(test, assert_instr(xvaddsp))] + #[cfg_attr(all(test, not(target_feature = "vsx")), assert_instr(vaddfp))] + #[cfg_attr(all(test, target_feature = "vsx"), assert_instr(xvaddsp))] pub unsafe fn vec_add_float_float(a: vector_float, b: vector_float) -> vector_float { simd_add(a, b) } diff --git a/crates/core_arch/src/powerpc/vsx.rs b/crates/core_arch/src/powerpc/vsx.rs index 60cb2ad44c..efa316c6e9 100644 --- a/crates/core_arch/src/powerpc/vsx.rs +++ b/crates/core_arch/src/powerpc/vsx.rs @@ -10,6 +10,7 @@ use crate::core_arch::powerpc::*; use crate::core_arch::simd::*; +use crate::intrinsics::simd::{simd_add, simd_mul, simd_sub}; #[cfg(test)] use stdarch_test::assert_instr; @@ -171,6 +172,68 @@ mod sealed { vec_mergeeo! { vector_unsigned_int, mergee, mergeo } vec_mergeeo! { vector_bool_int, mergee, mergeo } vec_mergeeo! { vector_float, mergee, mergeo } + + #[inline] + #[target_feature(enable = "vsx")] + #[cfg_attr(test, assert_instr(xvadddp))] + pub(crate) unsafe fn vec_add_double_double( + a: vector_double, + b: vector_double, + ) -> vector_double { + simd_add(a, b) + } + + // Implement AltiVec's VectorAdd trait for vector_double to enable vec_add support + #[unstable(feature = "stdarch_powerpc", issue = "111145")] + impl crate::core_arch::powerpc::altivec::sealed::VectorAdd for vector_double { + type Result = vector_double; + #[inline] + #[target_feature(enable = "vsx")] + unsafe fn vec_add(self, other: vector_double) -> Self::Result { + vec_add_double_double(self, other) + } + } + + #[inline] + #[target_feature(enable = "vsx")] + #[cfg_attr(test, assert_instr(xvsubdp))] + pub(crate) unsafe fn vec_sub_double_double( + a: vector_double, + b: vector_double, + ) -> vector_double { + simd_sub(a, b) + } + + // Implement AltiVec's VectorSub trait for vector_double to enable vec_sub support + #[unstable(feature = "stdarch_powerpc", issue = "111145")] + impl crate::core_arch::powerpc::altivec::sealed::VectorSub for vector_double { + type Result = vector_double; + #[inline] + #[target_feature(enable = "vsx")] + unsafe fn vec_sub(self, other: vector_double) -> Self::Result { + vec_sub_double_double(self, other) + } + } + + #[inline] + #[target_feature(enable = "vsx")] + #[cfg_attr(test, assert_instr(xvmuldp))] + pub(crate) unsafe fn vec_mul_double_double( + a: vector_double, + b: vector_double, + ) -> vector_double { + simd_mul(a, b) + } + + // Implement AltiVec's VectorMul trait for vector_double to enable vec_mul support. + #[unstable(feature = "stdarch_powerpc", issue = "111145")] + impl crate::core_arch::powerpc::altivec::sealed::VectorMul for vector_double { + #[inline] + #[target_feature(enable = "vsx")] + unsafe fn vec_mul(self, b: Self) -> Self { + vec_mul_double_double(self, b) + } + } } /// Vector permute. @@ -255,4 +318,36 @@ mod tests { test_vec_xxpermdi! {test_vec_xxpermdi_i64x2, i64x2, vector_signed_long, [0], [-1], [2], [-3]} test_vec_xxpermdi! {test_vec_xxpermdi_m64x2, m64x2, vector_bool_long, [false], [true], [false], [true]} test_vec_xxpermdi! {test_vec_xxpermdi_f64x2, f64x2, vector_double, [0.0], [1.0], [2.0], [3.0]} + + #[simd_test(enable = "vsx")] + fn test_vec_add_f64x2_f64x2() { + let a = vector_double::from(f64x2::from_array([1.0, 2.0])); + let b = vector_double::from(f64x2::from_array([3.0, 4.0])); + let expected = vector_double::from(f64x2::from_array([4.0, 6.0])); + + unsafe { + assert_eq!(f64x2::from(vec_add(a, b)), f64x2::from(expected)); + } + } + #[simd_test(enable = "vsx")] + fn test_vec_sub_f64x2_f64x2() { + let a = vector_double::from(f64x2::from_array([5.0, 8.0])); + let b = vector_double::from(f64x2::from_array([3.0, 4.0])); + let expected = vector_double::from(f64x2::from_array([2.0, 4.0])); + + unsafe { + assert_eq!(f64x2::from(vec_sub(a, b)), f64x2::from(expected)); + } + } + + #[simd_test(enable = "vsx")] + fn test_vec_mul_f64x2_f64x2() { + let a = vector_double::from(f64x2::from_array([2.0, 3.0])); + let b = vector_double::from(f64x2::from_array([4.0, 5.0])); + let expected = vector_double::from(f64x2::from_array([8.0, 15.0])); + + unsafe { + assert_eq!(f64x2::from(vec_mul(a, b)), f64x2::from(expected)); + } + } }