Skip to content

Commit 1e88ad4

Browse files
committed
VC707: Switches are inputs, right?
1 parent 57438f7 commit 1e88ad4

File tree

1 file changed

+8
-8
lines changed

1 file changed

+8
-8
lines changed

src/main/scala/shell/xilinx/VC707Shell.scala

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -418,14 +418,14 @@ abstract class VC707Shell(implicit val p: Parameters) extends RawModule {
418418
val btn_3 = IO(Analog(1.W))
419419

420420
//Sliding switches
421-
val sw_0 = IO(Analog(1.W))
422-
val sw_1 = IO(Analog(1.W))
423-
val sw_2 = IO(Analog(1.W))
424-
val sw_3 = IO(Analog(1.W))
425-
val sw_4 = IO(Analog(1.W))
426-
val sw_5 = IO(Analog(1.W))
427-
val sw_6 = IO(Analog(1.W))
428-
val sw_7 = IO(Analog(1.W))
421+
val sw_0 = IO(Input(Bool()))
422+
val sw_1 = IO(Input(Bool()))
423+
val sw_2 = IO(Input(Bool()))
424+
val sw_3 = IO(Input(Bool()))
425+
val sw_4 = IO(Input(Bool()))
426+
val sw_5 = IO(Input(Bool()))
427+
val sw_6 = IO(Input(Bool()))
428+
val sw_7 = IO(Input(Bool()))
429429

430430

431431
//-----------------------------------------------------------------------

0 commit comments

Comments
 (0)