From 6b96449360a953570e540a91442dceb1e2460b12 Mon Sep 17 00:00:00 2001
From: Mattia Moffa <mattia@moffa.xyz>
Date: Fri, 31 Jul 2026 21:38:09 +0200
Subject: [PATCH 1/2] max32666: fix boot-time CPU and cache configuration

Discovered while working on custom board, but generic to MAX32666. All
three reproduce behavior the MSDK adopts by default.

- Set VTOR to wolfBoot's vector table. The boot ROM leaves VTOR pointing
  to 0, and flash is not aliased at address 0, so any fault while
  wolfBoot runs was handled by the ROM's handlers instead of wolfBoot's.

- Wait for the ICC invalidation to complete before setting the enable
  bit. The cache was previously enabled while the invalidation was still
  in progress (taken from MSDK).

- Disable the ICC read buffer through the TME registers.
---
 hal/max32666.c | 11 ++++++++++-
 hal/max32666.h |  5 +++++
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/hal/max32666.c b/hal/max32666.c
index 859ece302d..a8fbaf117c 100644
--- a/hal/max32666.c
+++ b/hal/max32666.c
@@ -105,8 +105,9 @@ static void RAMFUNCTION icc_disable(void)
 
 static void RAMFUNCTION icc_enable(void)
 {
-    /* Invalidate and re-enable cache */
+    /* Invalidate cache, wait for completion, then re-enable */
     ICC0_INVALIDATE = 1;
+    while (!(ICC0_CTRL & ICC_CTRL_RDY)) {}
     ICC0_CTRL |= ICC_CTRL_EN;
     while (!(ICC0_CTRL & ICC_CTRL_RDY)) {}
 }
@@ -325,6 +326,14 @@ void hal_init(void)
     FLC0_CLKDIV = FLC_CLKDIV_VALUE;
     FLC1_CLKDIV = FLC_CLKDIV_VALUE;
 
+    /* Point VTOR at our vector table so faults hit our handlers */
+    *(volatile uint32_t *)0xE000ED08 = 0x10000000;
+
+    /* Disable the ICC read buffer via TME before enabling the cache */
+    TME_CTRL = 1;
+    SIR_TRIM_ICC = SIR_TRIM_ICC_RB_DIS;
+    TME_CTRL = 0;
+
     /* Enable instruction cache */
     icc_enable();
 
diff --git a/hal/max32666.h b/hal/max32666.h
index 94f1d734fb..d5fe8d2b2a 100644
--- a/hal/max32666.h
+++ b/hal/max32666.h
@@ -170,6 +170,11 @@
 #define ICC_CTRL_EN             (1UL << 0)          /* Cache enable */
 #define ICC_CTRL_RDY            (1UL << 16)         /* Cache ready */
 
+/* Test mode / trim registers */
+#define TME_CTRL                (*(volatile uint32_t *)0x40000C00UL)
+#define SIR_TRIM_ICC            (*(volatile uint32_t *)0x4000040CUL)
+#define SIR_TRIM_ICC_RB_DIS     (1UL << 6)          /* Read buffer disable */
+
 /* ============== WDT - Watchdog Timer ============== */
 /* MSDK: wdt_regs.h */
 #define WDT0_BASE               0x40003000UL

From 85fed8df5f5e92be47626cc675caa84ff97cc89e Mon Sep 17 00:00:00 2001
From: Mattia Moffa <mattia@moffa.xyz>
Date: Mon, 3 Aug 2026 21:30:14 +0200
Subject: [PATCH 2/2] Fix compile warnings with CUSTOM_PARTITION_TRAILER

---
 src/libwolfboot.c  | 3 ++-
 src/update_flash.c | 5 ++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/libwolfboot.c b/src/libwolfboot.c
index 62fa63e55c..0ac7bd1154 100644
--- a/src/libwolfboot.c
+++ b/src/libwolfboot.c
@@ -178,7 +178,8 @@ int wolfBoot_initialize_encryption(void)
 #undef WOLFBOOT_FIXED_PARTITIONS
 #endif
 
-#if defined(EXT_FLASH) && !defined(WOLFBOOT_NO_PARTITIONS)
+#if defined(EXT_FLASH) && !defined(WOLFBOOT_NO_PARTITIONS) && \
+    !defined(CUSTOM_PARTITION_TRAILER)
 static uint32_t ext_cache;
 #endif
 
diff --git a/src/update_flash.c b/src/update_flash.c
index 0cfeaab62e..f40129d855 100644
--- a/src/update_flash.c
+++ b/src/update_flash.c
@@ -914,6 +914,9 @@ static int RAMFUNCTION wolfBoot_update(int fallback_allowed)
     int fallback_image = 0;
 #ifndef DISABLE_BACKUP
     int rollback_needed = 0;
+#ifdef CUSTOM_PARTITION_TRAILER
+    (void)rollback_needed;
+#endif
     int bootStateRet = -1;
     uint8_t bootState = 0;
 #endif
@@ -1444,7 +1447,7 @@ void RAMFUNCTION wolfBoot_start(void)
     int bootRet;
 #ifndef WOLFBOOT_SELF_UPDATE_MONOLITHIC
     int updateRet;
-#ifndef DISABLE_BACKUP
+#if !defined(DISABLE_BACKUP) && !defined(CUSTOM_PARTITION_TRAILER)
     int resumedFinalErase;
 #endif
     uint8_t bootState;