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board hygiene + CLAUDE.md driving-seat tightening (post #223/#224/#225)#226

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Apr 20, 2026
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board hygiene + CLAUDE.md driving-seat tightening (post #223/#224/#225)#226
AdaWorldAPI merged 1 commit into
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claude/teleport-session-setup-wMZfb

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Summary

Retroactive board hygiene for PRs #223 / #224 / #225 + CLAUDE.md
driving-seat tightening
so the gap between merge and board update
never recurs. User directive: "should have happened to begin with."

Board hygiene (retroactive)

File Update
LATEST_STATE.md Header date + 3 new PR rows (#223, #224, #225); cam:: contract inventory expanded with LaneWidth / Distance / Rotation / ResidualSpec / CodecParams / CodecParamsBuilder / CodecParamsError; active branches + next-work blocks refreshed
PR_ARC_INVENTORY.md PREPEND (APPEND-ONLY rule) entries for #223 (AGI-as-SoA + I1-I10), #224 (three-part lab stack + thinking harvest + I11), #225 (codec-sweep plan + Rules A-F + CodecParams types)
STATUS_BOARD.md New section for codec-sweep-via-lab-infra-v1 — 18 D-ids across 5 phases, D0.6/D0.7 Shipped-in-#225, remainder Queued
EPIPHANIES.md PREPEND 6 dated findings: board-hygiene-as-driving-seat; codec-cert-is-token-agreement; three-part-lab-stack; thinking-harvest-AGI-magic-bullet; SoA-iron-rule; AGI-as-glove-four-axes

CLAUDE.md tightening (prospective enforcement)

New top-level § "The Stance — Driving Seat + AGI-as-Glove (P0,
read first)"
with three doctrines and one hard rule:

  1. Driving-seat posture — the session STEERS the stack, doesn't
    observe it. The board is live state, not reference.
  2. AGI-as-glove doctrine — AGI = (topic, angle, thinking,
    planner) maps to the four BindSpace SoA columns
    (FingerprintColumns / QualiaColumn / MetaColumn /
    EdgeColumn). New capability lands as a new column, not a new
    layer / struct / trait.
  3. Consult before guess — specialist-agent card → knowledge doc →
    board inventory → only then grep. Subagent spawn with curated
    docs beats main-thread hand-exploration.

Mandatory Board-Hygiene Rule — a table binding every PR scope
to the board file that must update in the same commit:

Adds... Must update in same commit
Contract type / module LATEST_STATE.md Contract Inventory
Merged PR LATEST_STATE.md + PR_ARC_INVENTORY.md PREPEND
New integration plan INTEGRATION_PLANS.md PREPEND + plans/<name>-v<N>.md
New D-id STATUS_BOARD.md row
Finding / correction EPIPHANIES.md PREPEND dated entry
Tech-debt observation TECH_DEBT.md entry
Unresolved issue ISSUES.md entry

Retroactive hygiene (merge PR → later notice board is stale →
separate cleanup commit) is now explicitly named as an anti-pattern
the rule forbids — with the 2026-04-20 session's own gap as the
precedent that motivated it.

Test Plan

https://claude.ai/code/session_01SbYsmmbPf9YQuYbHZN52Zh

Retroactive hygiene for the recent PR arc + prospective enforcement
so the gap never recurs. User directive: "should have happened to
begin with."

LATEST_STATE.md:
  - Header: "Last updated 2026-04-20 post PR #224 (PR #225 open)"
  - Recently Shipped table: prepended rows for #225 (open), #224,
    and #223 with full shipped-content summaries
  - Contract Inventory: expanded cam:: entry with all new codec-
    sweep types (LaneWidth / Distance / Rotation / ResidualSpec /
    CodecParams / CodecParamsBuilder / CodecParamsError) including
    the precision-ladder-fires-before-JIT invariant
  - Active Branches: recorded claude/teleport-session-setup-wMZfb
    and its three merged PRs
  - Active Integration Plans: added codec-sweep-via-lab-infra-v1
    alongside elegant-herding-rocket-v1
  - Immediate Next Work: codec-sweep Phase 0 remainder (D0.1/0.2/0.3/
    0.5) + the elegant-herding Phase 2 block

PR_ARC_INVENTORY.md (APPEND-ONLY — PREPEND only):
  - #225 entry: plan + CodecParams/Builder/precision validation +
    rules A-F locked + decisions for future PRs
  - #224 entry: three-part lab stack + thinking harvest + I11
    measurability locked
  - #223 entry: LAB-ONLY firewall + AGI-as-SoA + I1-I10 invariants
    locked (the cross-cutting architectural ruleset this workspace
    now enforces)

STATUS_BOARD.md:
  - New section: codec-sweep-via-lab-infra-v1 with 18 D-ids across
    5 phases (D0.6/D0.7 marked Shipped-in-#225; remainder Queued)

EPIPHANIES.md (APPEND-ONLY — PREPEND only, 6 new dated entries):
  - Board hygiene is the driving seat, not cleanup (this session's
    self-reflection turned into a rule)
  - Codec cert is token agreement, not synthetic ICC (#219#220
    arc; #225 CalibrationEqualsMeasurement typed rejection)
  - Lab REST surface is three-part (API + Planner + JIT), not just
    scaffolding
  - Thinking harvest via REST/Cypher = the AGI magic bullet
  - SoA never scalarises without ndarray (iron rule Rule C)
  - AGI is the glove, not the oracle — four-axis SoA is what you
    wear

CLAUDE.md — new top-level § "The Stance — Driving Seat +
AGI-as-Glove (P0, read first)":

  - Explicit driving-seat posture: the session STEERS the stack,
    doesn't observe it
  - AGI-as-glove doctrine concrete: topic → FingerprintColumns,
    angle → QualiaColumn, thinking → MetaColumn, planner →
    EdgeColumn. New capability lands as a new column, not a layer.
  - MANDATORY Board-Hygiene Rule as a table: every PR that adds a
    type / plan / D-id / epiphany / tech-debt / issue MUST update
    the corresponding board file IN THE SAME COMMIT. Retroactive
    hygiene (merge PR → later cleanup) is now an anti-pattern the
    rule forbids.
  - "Consult, don't guess" — agent/knowledge-first discipline:
    specialist-agent card → knowledge doc → board inventory →
    only then grep. Subagent spawn with curated docs beats main-
    thread grep.

147/147 contract suite still passing. Doc-only PR otherwise
(Cargo.toml / src/* unchanged; the orphan serde_yaml/base64 deps
from the timed-out bus-compiler subagent were reverted — they'll
land with D0.1/D0.3 when the Wire code lands).

https://claude.ai/code/session_01SbYsmmbPf9YQuYbHZN52Zh
@AdaWorldAPI AdaWorldAPI merged commit 3c9ee75 into main Apr 20, 2026
AdaWorldAPI pushed a commit that referenced this pull request Apr 20, 2026
First code deliverable of codec-sweep-via-lab-infra Phase 0 on the
consumer side. Extends the lab Wire surface to carry the CodecParams
shape from PR #225 with an object-oriented tensor DTO that decodes
once at ingress into a 64-byte-aligned buffer consumable directly by
F32x16::from_slice via slice::array_windows::<64>.

crates/cognitive-shader-driver/src/wire.rs:

  Serde mirrors for contract::cam types (zero serde in the contract
  per CLAUDE.md rule 5):
    - WireLaneWidth {F32x16, U8x64, F64x8, BF16x32}
    - WireDistance {AdcU8, AdcI8}
    - WireRotation {Identity, Hadamard{dim}, Opq{matrix_blob_id, dim}}
    - WireResidualSpec {depth, centroids}
    - WireCodecParams — mirrors CodecParams one-for-one
    - From/TryFrom conversions; TryFrom<WireCodecParams> for
      CodecParams runs the precision-ladder validation (OPQ↔BF16x32,
      Hadamard pow2, overfit guard rejecting calibration_rows ==
      measurement_rows) BEFORE any JIT compile would fire.

  WireTensorView + AlignedBytes (Rule A + Rule E + Rule F):
    - shape [u32; 2] + lane_width + bytes_base64 on the wire
    - decode() base64-decodes ONCE at ingress into AlignedBytes
      (heap, 64-byte aligned via Layout::from_size_align, Drop
      deallocates with matching layout, Send + Sync)
    - row() / subspace() / row_count() / col_count() / row_bytes() /
      element_bytes() — object-oriented methods per Rule E, mirror
      the SoA+SIMD ops the JIT kernel will perform
    - is_aligned_64() for the kernel_contract_test gate
    - WireTensorViewError {Base64, SizeMismatch, ZeroShape}

  WireCalibrateRequest extended additively:
    - New: params: Option<WireCodecParams> + tensor_view:
      Option<WireTensorView> (the new path)
    - Legacy: num_subspaces / num_centroids / kmeans_iterations /
      max_rows / icc_samples preserved for back-compat

  WireCalibrateResponse extended additively:
    - New: kernel_hash (= CodecParams::kernel_signature()),
      compile_time_us, backend ("amx" | "vnni" | "avx512" |
      "avx2" | "legacy")
    - Never "scalar" on a SoA path — the iron rule enforced at
      the response contract

crates/cognitive-shader-driver/Cargo.toml:
  - serve feature now pulls base64 (v0.22) + bytemuck (v1)
    optional deps. No new features; these belong under the
    existing lab umbrella.

crates/cognitive-shader-driver/src/codec_research.rs:
  - Legacy calibrate_tensor path fills the new response fields
    with zeros + backend = "legacy". D1.1 (JIT kernel) populates
    them meaningfully when it lands.

Tests (8 new, all passing under --features serve):
  - wire_codec_params_round_trip_to_contract
    — OPQ + BF16x32 + wide codebook → builds cleanly,
      is_matmul_heavy true
  - wire_codec_params_rejects_opq_with_f32x16
    — precision-ladder guard typed-rejects the wrong lane at ingress
  - wire_codec_params_rejects_calibration_equals_measurement
    — overfit guard typed-rejects the PR #219 pattern at ingress
  - wire_codec_params_deserializes_from_minimal_json
    — serde defaults correct (lane_width=F32x16, distance=AdcU8,
      rotation=Identity, calibration_rows=2048, seed=42)
  - wire_tensor_view_decode_lands_in_64byte_aligned_buffer
    — explicit Rule A proof: decoded AlignedBytes.is_aligned_64(),
      and slice::array_windows::<64>() yields exactly one window
      per 16-col F32 row
  - wire_tensor_view_rejects_size_mismatch
    — typed error for base64 payload not matching declared shape
  - wire_tensor_view_subspace_slicing
    — subspace(row, k, sub_bytes) returns the expected offset+len
  - wire_calibrate_request_{accepts_new_params_field,
    back_compat_legacy_fields}
    — both the new (params-carrying) and legacy payload shapes
      deserialise correctly

Board hygiene in the SAME commit (per CLAUDE.md Mandatory
Board-Hygiene Rule from PR #226):
  - STATUS_BOARD.md D0.1 row: Queued → In PR
  - LATEST_STATE.md cognitive-shader-driver section: new
    subsection listing the Wire surface types landed

Test summary: 55/55 cognitive-shader-driver tests pass under
--features serve; 147/147 lance-graph-contract tests pass.

Rules honored:
  Rule A — stdlib slice::array_windows::<N>() + ndarray::simd::*,
           proven by the test that calls array_windows::<64>() on
           the decoded row
  Rule B — no std::arch, no hpc::simd_avxNNN reach; ndarray::simd::*
           imports only
  Rule C — n/a for DTO code (JIT tier selection lands D1.1)
  Rule D — JSON/YAML/REST only, no in-Rust CodecParams construction
           on the Wire side
  Rule E — Wire surface IS the SIMD surface; LaneWidth explicit,
           methods not scalar bags, 64-byte-aligned decode proven
  Rule F — decode ONCE at ingress via WireTensorView::decode;
           WireCalibrateRequest::params: Option<WireCodecParams>
           carries the Rust object through the rest of the pipeline

https://claude.ai/code/session_01SbYsmmbPf9YQuYbHZN52Zh
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