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feat(avm)!: memory aware ecc add #15780
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,182 @@ | ||
| include "ecc.pil"; | ||
| include "gt.pil"; | ||
| include "execution.pil"; | ||
|
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||
| /** | ||
| * This handles the memory writes when the ECCADD opcode is executed by user code. | ||
| * The reads are handled by the registers in the execution trace. | ||
| * This trace writes the resulting embedded curve point to the addresses {dst, | ||
| * dst + 1, and dst + 2 }. Embedded curve points consist of the tuple of types | ||
| * {x: FF, y: FF, is_inf: U1 }. | ||
| * | ||
| * Opcode operands (relevant in EXECUTION when interacting with this gadget): | ||
| * - rop[0]: p_x_addr | ||
| * - rop[1]: p_y_addr | ||
| * - rop[2]: p_is_inf_addr | ||
| * - rop[3]: q_x_addr | ||
| * - rop[4]: q_y_addr | ||
| * - rop[5]: q_is_inf_addr | ||
| * - rop[6]: dst_addr | ||
| * | ||
| * Memory I/O: | ||
| * - register[0]: M[p_x_addr] aka p_x (x coordinate of point P - read from memory by EXECUTION) | ||
| * - p_x is tagged-checked by execution/registers to be FF based on instruction spec. | ||
| * - register[1]: M[p_y_addr] aka p_y (y coordinate of point P - read from memory by EXECUTION) | ||
| * - p_y is tagged-checked by execution/registers to be FF based on instruction spec. | ||
| * - register[2]: M[p_is_inf_addr] aka p_is_inf (boolean flag if P is the point at infinity - read from memory by EXECUTION) | ||
| * - p_is_inf is tagged-checked by execution/registers to be U1 based on instruction spec. | ||
| * - register[3]: M[q_x_addr] aka q_x (x coordinate of point Q - read from memory by EXECUTION) | ||
| * - q_x is tagged-checked by execution/registers to be FF based on instruction spec. | ||
| * - register[4]: M[q_y_addr] aka q_y (y coordinate of point Q - read from memory by EXECUTION) | ||
| * - q_y is tagged-checked by execution/registers to be FF based on instruction spec. | ||
| * - register[5]: M[q_is_inf_addr] aka q_is_inf (boolean flag if Q is the point at infinity - read from memory by EXECUTION) | ||
| * - q_is_inf is tagged-checked by execution/registers to be U1 based on instruction spec. | ||
| * - M[rop[6]]: M[dst_addr] aka res_x (x coordinate of the resulting point RES - written by this gadget) | ||
| * - guaranteed by this gadget to be FF. | ||
| * - M[rop[6]+1]: M[dst_offset+1] aka res_y (y coordinate of the resulting point RES - written by this gadget) | ||
| * - guaranteed by this gadget to be FF. | ||
| * - M[rop[6]+2]: M[dst_offset+2] aka res_is_inf (boolean flag if RES is the point at infinity - written by this gadget) | ||
| * - guaranteed by this gadget to be U1. | ||
| * | ||
| * ERROR HANDLING: | ||
| * A single error needs to be handled as part of this trace | ||
| * (1) DST_OUT_OF_BOUNDS_ACCESS: If the writes would access a memory address outside | ||
| * of the max AVM memory address (AVM_HIGHEST_MEM_ADDRESS). | ||
| * | ||
| * N.B This subtrace writes the values within a single row (i.e. 3 output columns) | ||
| * | ||
| * This subtrace is connected to the ECC subtrace via a lookup. ECC is used by | ||
| * other subtraces internally (e.g., address derivation) | ||
| */ | ||
|
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||
| namespace ecc_add_mem; | ||
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||
| pol commit sel; | ||
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||
| #[skippable_if] | ||
| sel = 0; | ||
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||
| pol commit execution_clk; | ||
| pol commit space_id; | ||
| pol commit dst_addr[3]; | ||
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||
| // dst_addr[0] constrained by the permutation to execution | ||
| #[WRITE_INCR_DST_ADDR] | ||
| dst_addr[1] = sel * (dst_addr[0] + 1); | ||
| dst_addr[2] = sel * (dst_addr[0] + 2); | ||
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| pol commit p_x, p_y, p_is_inf; | ||
| pol commit q_x, q_y, q_is_inf; | ||
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| //////////////////////////////////////////////// | ||
| // Error Handling - Out of Range Memory Access | ||
| //////////////////////////////////////////////// | ||
| pol commit sel_dst_out_of_range_err; | ||
| sel_dst_out_of_range_err * (1 - sel_dst_out_of_range_err) = 0; | ||
|
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| // Use the comparison gadget to check that the max addresses are within range | ||
| // The comparison gadget provides the ability to test GreaterThan so we check | ||
| // dst_addr[2] > max_mem_addr | ||
| pol commit max_mem_addr; // Column needed until we support constants in lookups | ||
| sel * (max_mem_addr - constants.AVM_HIGHEST_MEM_ADDRESS) = 0; | ||
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||
| #[CHECK_DST_ADDR_IN_RANGE] | ||
| sel { dst_addr[2], max_mem_addr, sel_dst_out_of_range_err } | ||
| in | ||
| gt.sel { gt.input_a, gt.input_b, gt.res }; | ||
|
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| //////////////////////////////////////////////// | ||
| // Dispatch from execution trace to ECC Add | ||
| //////////////////////////////////////////////// | ||
| #[DISPATCH_EXEC_ECC_ADD] | ||
| execution.sel_execute_ecc_add { | ||
| precomputed.clk, | ||
| execution.context_id, | ||
| // Point P | ||
| execution.register[0], | ||
| execution.register[1], | ||
| execution.register[2], | ||
| // Point Q | ||
| execution.register[3], | ||
| execution.register[4], | ||
| execution.register[5], | ||
| // Dst address | ||
| execution.rop[6], | ||
| // Error | ||
| execution.sel_opcode_error | ||
| } is | ||
|
IlyasRidhuan marked this conversation as resolved.
|
||
| sel { | ||
| execution_clk, | ||
| space_id, | ||
| // Point P | ||
| p_x, | ||
| p_y, | ||
| p_is_inf, | ||
| // Point Q | ||
| q_x, | ||
| q_y, | ||
| q_is_inf, | ||
| // Dst address | ||
| dst_addr[0], | ||
| // Error | ||
| sel_dst_out_of_range_err | ||
| }; | ||
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| /////////////////////////////////////////////////////////////////////// | ||
| // Dispatch inputs to ecc add and retrieve outputs | ||
| /////////////////////////////////////////////////////////////////////// | ||
| pol commit res_x, res_y, res_is_inf; | ||
| pol commit sel_should_exec; | ||
| sel_should_exec = sel * (1 - sel_dst_out_of_range_err); | ||
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| #[INPUT_OUTPUT_ECC_ADD] | ||
| sel_should_exec { | ||
| p_x, p_y, p_is_inf, | ||
| q_x, q_y, q_is_inf, | ||
| res_x, res_y, res_is_inf | ||
| } in | ||
| ecc.sel { | ||
| ecc.p_x, ecc.p_y, ecc.p_is_inf, | ||
| ecc.q_x, ecc.q_y, ecc.q_is_inf, | ||
| ecc.r_x, ecc.r_y, ecc.r_is_inf | ||
| }; | ||
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||
| //////////////////////////////////////////////// | ||
| // Write output to memory | ||
| //////////////////////////////////////////////// | ||
| // TODO: These need to be changed to permutations once we have the custom permutation selectors impl | ||
| #[WRITE_MEM_0] | ||
| sel_should_exec { | ||
| execution_clk, dst_addr[0], | ||
| res_x, /*FF_mem_tag*/ precomputed.zero, | ||
| space_id, /*rw=1*/ sel_should_exec | ||
| } in | ||
| memory.sel { | ||
| memory.clk, memory.address, | ||
| memory.value, memory.tag, | ||
| memory.space_id, memory.rw | ||
| }; | ||
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| #[WRITE_MEM_1] | ||
| sel_should_exec { | ||
| execution_clk, dst_addr[1], | ||
| res_y, /*FF_mem_tag*/ precomputed.zero, | ||
| space_id, /*rw=1*/ sel_should_exec | ||
| } in | ||
| memory.sel { | ||
| memory.clk, memory.address, | ||
| memory.value, memory.tag, | ||
| memory.space_id, memory.rw | ||
| }; | ||
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| #[WRITE_MEM_2] | ||
| sel_should_exec { | ||
| execution_clk, dst_addr[2], | ||
| res_is_inf, /*U1_mem_tag=1*/ sel_should_exec, | ||
| space_id, /*rw=1*/ sel_should_exec | ||
| } in | ||
| memory.sel { | ||
| memory.clk, memory.address, | ||
| memory.value, memory.tag, | ||
| memory.space_id, memory.rw | ||
| }; | ||
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I'll be honest.... It feels confusing to me to have this inside the gadget 😅
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yeah i think there was some discussion about a
exec_dispatch.pilfile to house all the lookups. The downside of putting it inexecution.pilis it gets really messy