feat: Signed integer division and modulus in brillig gen#5279
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Benchmark resultsNo metrics with a significant change found. Detailed resultsAll benchmarks are run on txs on the This benchmark source data is available in JSON format on S3 here. Values are compared against data from master at commit L2 block published to L1Each column represents the number of txs on an L2 block published to L1.
L2 chain processingEach column represents the number of blocks on the L2 chain where each block has 16 txs.
Circuits statsStats on running time and I/O sizes collected for every circuit run across all benchmarks.
Tree insertion statsThe duration to insert a fixed batch of leaves into each tree type.
MiscellaneousTransaction sizes based on how many contract classes are registered in the tx.
Transaction processing duration by data writes.
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| ctx.mov_instruction(result.address, num.address); | ||
| } | ||
| }); | ||
| self.brillig_context.deallocate_single_addr(max_positive); |
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Not for now but it would be great to use RAII if possible in rust!
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Yeah I've to think if I can use smart pointers to make the automatic drop() the compiler inserts at the end of lifetimes to release automatically scratch registers
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| // If result has to be negative, perform two's complement | ||
| self.brillig_context.codegen_if(result_is_negative.address, |ctx| { | ||
| let zero = ctx.make_constant_instruction(0_usize.into(), result.bit_size); |
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For the future: in a small-medium contract you'd be saving a lot of instructions if you just intern/pool the constants. That is, if you set them in a register the first time you see it and then just reuse them. (I guess you cannot know from the SSA if they will be modified, but you can do it for the Brillig-codegen ones).
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It's a little complicated to do it for all internal functions due to linking the functions together, but still possible!
Removes the signed div opcode since the AVM won't support it and replaces it with the emulated version using unsigned division.