This repository documents the design and development of a passive LC band-pass filter developed during my Summer Research Internship at the Space Applications Centre (ISRO), Ahmedabad under the Microwave Sensors & Signal Processing Division (MSSPD / MSDG / MRSA).
The project focused on designing a high-performance filter to suppress unwanted spectral artifacts generated by Digital Chirp Generators (DCGs) used in RF systems.
The filter was designed, simulated, and optimized using Keysight Advanced Design System (ADS) and prepared for PCB fabrication.
Organization: Space Applications Centre (ISRO), Ahmedabad
Division: Microwave Sensors & Signal Processing Division (MSSPD)
Program: Scientific Research and Training Division (SRTD)
Duration:
14 May 2025 – 23 July 2025
Mentors
- Sri Ritesh Kumar Sharma
- Smt. Shivani Bhargav
Digital Chirp Generators produce Linear Frequency Modulated (LFM) signals using digital synthesis and Digital-to-Analog Converters (DACs).
However, DAC reconstruction introduces several spectral artifacts including:
- Nyquist image frequencies
- quantization noise
- harmonic distortion
These unwanted components degrade spectral purity and can interfere with downstream RF components.
An analog band-pass filter is therefore required after the DAC stage to isolate the desired chirp signal while suppressing out-of-band components.
The project aimed to design a passive band-pass filter that could:
- Pass signals within 350–550 MHz
- Suppress Nyquist images near 250 MHz and 650 MHz
- Maintain low insertion loss
- Maintain good impedance matching (50 Ω system)
- Be suitable for PCB fabrication
The filter operates in the signal chain immediately after the DAC in a Digital Chirp Generator system.
Typical signal chain:
Digital waveform generation
→ DAC conversion
→ Band-pass filter (this project)
→ amplification / RF processing
Filtering at this stage prevents unwanted artifacts from being amplified or propagated further in the RF system.
| Parameter | Specification |
|---|---|
| Center Frequency | 450 MHz |
| Passband | 350–550 MHz |
| Filter Order | 9 |
| Topology | LC Chebyshev Band-pass |
| System Impedance | 50 Ω |
Multiple filter orders were evaluated during the design process:
| Filter Order | Observation |
|---|---|
| 7th Order | Poor return loss performance |
| 9th Order | Optimal trade-off between complexity and performance |
| 11th Order | Higher complexity and increased insertion loss |
A 9th-order Chebyshev LC band-pass filter was selected as the final design.
The initial filter was synthesized using the Keysight ADS filter design tool, which generated ideal LC component values satisfying the passband and stopband specifications.
Ideal components were replaced with real Murata RF components.
Component values were optimized by comparing the S-parameter responses of vendor models with the ideal filter elements.
Extensive S-parameter simulations were performed in Keysight ADS to evaluate:
- insertion loss (S21)
- return loss (S11, S22)
- stopband attenuation
The circuit was iteratively optimized to improve passband flatness and stopband rejection.
A manufacturable PCB layout was developed considering:
- trace impedance
- parasitic inductance and capacitance
- RF signal integrity
A 4-layer PCB stack-up was adopted to improve impedance control and reduce signal degradation.
The PCB layout was analyzed using ADS SIPro EM simulations to account for:
- trace parasitics
- pad capacitance
- layout-induced coupling
The EM simulation results were combined with circuit simulations to validate the final design.
| Parameter | Result |
|---|---|
| Passband | 350–550 MHz |
| Insertion Loss | ~3.8 dB at 450 MHz |
| Stopband Rejection | 75 dB @ 250 MHz |
| Stopband Rejection | 56 dB @ 650 MHz |
| Return Loss | < −16 dB in passband |
The filter effectively suppresses Nyquist image frequencies while preserving the desired signal band.
- Keysight Advanced Design System (ADS)
- ADS SIPro EM simulation
- RF filter design theory
- PCB layout design tools
├── SRTD
│ └── SRTD Report - Chilkunda Achutha Thyagaraju - RS02541.pdf
│ └── RS02541-CHILKUNDA_ACHUTHA_THYAGARAJU.pptx
└── Images
└── Version_1
├── filter_response.png
├── circuit_schematic.png
└── pcb_layout.png
└── Version_2
├── filter_response.png
├── circuit_schematic.png
└── pcb_layout.png
Potential improvements and extensions include:
- hardware fabrication and measurement validation
- optimization of return loss performance
- investigation of elliptic filter topologies for sharper roll-off
- evaluation of alternative PCB substrates for reduced loss
Chilkunda Achutha Thyagaraju
B.E. Electrical Engineering
National Institute of Technology, Rourkela
This project was carried out during the SRTD Internship Program at the Space Applications Centre (ISRO), Ahmedabad) under the guidance of:
- Sri Ritesh Kumar Sharma
- Smt. Shivani Bhargav
This project is licensed under the MIT License.