Support building the arm32 kernel with lld

[nathanchance]

I will work to get these two patches upstreamed so they can be dropped but I will need to add some additional justification to patch 2/2 (maybe @agners has some insight there, as my guess is that it just isn't necessary but something tells me RMK might want something more than that).

Travis presubmit run: https://travis-ci.com/nathanchance/continuous-integration/builds/93235172

[nickdesaulniers]

heh, at least the first patch I asked Greg why it wasn't sent for arm32 as well...

[nathanchance]

I am going to try to add some more justification to patch 2/2 by testing on my Raspberry Pi tonight then I'll merge this here and send them upstream.

[nickdesaulniers]

Can we build a working raspberry pi kernel w/ Clang? I should try on my rp0.

[nickdesaulniers]

I recommend filing a bug against lld and cc Ruiu and grimar@, they can probably give us more context as to this flag. If we wrap this flag in ld-option and it just works, that's great.

[nathanchance]

Can we build a working raspberry pi kernel w/ Clang? I should try on my rp0.

I can on my RPI 3B+: https://github.com/nathanchance/pi-kernel/commits/rpi-4.14.y

I recommend filing a bug against lld and cc Ruiu and grimar@, they can probably give us more context as to this flag. If we wrap this flag in ld-option and it just works, that's great.

Will do. I can link the kernel with lld no problem but when I tried to boot it, it panicked. I haven't had time to triage it unfortunately (might be because of lack of that flag or some other thing). I'll be home later tonight to do so.

[nickdesaulniers]

Do not merge until the boot failure is resolved.

[nickdesaulniers]

Travis presubmit run: https://travis-ci.com/nathanchance/continuous-integration/builds/93235172
I can link the kernel with lld no problem but when I tried to boot it, it panicked.

Ah, so rp3 has a boot issue, but defconfigs do not. That's ok.

[nathanchance]

Yes sorry, should have been more clear!

[agners]

@nathanchance not sure about the --pic-veneer situation, would have to look closer into it. Seems to be a no-MMU situation only. Can you put me on CC when sending the patches, will give them a try next week. Also add Ard Biesheuvel.

[nathanchance]

I recommend filing a bug against lld and cc Ruiu and grimar@, they can probably give us more context as to this flag. If we wrap this flag in ld-option and it just works, that's great.

Done (hopefully I did it right...): https://bugs.llvm.org/show_bug.cgi?id=39886

Can you put me on CC when sending the patches, will give them a try next week. Also add Ard Biesheuvel.

Done:

https://lore.kernel.org/lkml/20181205014213.943-1-natechancellor@gmail.com/
https://lore.kernel.org/lkml/20181205014213.943-2-natechancellor@gmail.com/

[nickdesaulniers]

LLVM patch for --pic-vineer: https://reviews.llvm.org/D55505

[agners]

I tried using lld to link a kernel for Arm32 Thumb2 using the last next (tag next-20181224) and Qemu. However, the kernel crashes after the following trace:

[    0.046175] Setting up static identity map for 0x40100000 - 0x40100054
[    0.047847] rcu: Hierarchical SRCU implementation.
[    0.054543] smp: Bringing up secondary CPUs ...
[    0.054814] smp: Brought up 1 node, 1 CPU
[    0.055017] SMP: Total of 1 processors activated (125.00 BogoMIPS).
[    0.055214] CPU: All CPU(s) started in SVC mode.
[    0.084658] devtmpfs: initialized
[    0.101788] VFP support v0.3: implementor 41 architecture 4 part 30 variant f rev 0
[    0.121463] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750
000 ns
[    0.122437] futex hash table entries: 256 (order: 2, 16384 bytes)
[    0.123147] ------------[ cut here ]------------
[    0.123712] WARNING: CPU: 0 PID: 1 at kernel/locking/lockdep.c:3593 lock_release+0x25d/0x282
[    0.123915] DEBUG_LOCKS_WARN_ON(depth <= 0)
[    0.124013] Modules linked in:
[    0.124493] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.20.0-rc7-next-20181224-00002-gde3c0f43712e-dirty #12
[    0.124706] Hardware name: Generic DT based system
[    0.124983] [<c010ecd7>] (unwind_backtrace) from [<c010ab25>] (show_stack+0xb/0xc)
[    0.125202] [<c010ab25>] (show_stack) from [<c0931d3d>] (dump_stack+0x75/0xaa)
[    0.125367] [<c0931d3d>] (dump_stack) from [<c011cf61>] (__warn+0xd5/0xe6)
[    0.125552] [<c011cf61>] (__warn) from [<c011cf9d>] (warn_slowpath_fmt+0x2b/0x40)
[    0.125715] [<c011cf9d>] (warn_slowpath_fmt) from [<c015c4a3>] (lock_release+0x25d/0x282)
[    0.125890] [<c015c4a3>] (lock_release) from [<c0943d13>] (rest_init+0x17b/0x1a0)
[    0.126132] [<c0943d13>] (rest_init) from [<c2087e24>] (0xc2087e24)
[    0.126370] irq event stamp: 1259
[    0.126539] hardirqs last  enabled at (1259): [<c0112753>] do_page_fault+0x31/0x26a
[    0.126742] hardirqs last disabled at (1258): [<c0101951>] __dabt_svc+0x51/0xa0
[    0.126932] softirqs last  enabled at (1230): [<c012230b>] irq_exit+0xef/0x10e
[    0.127110] softirqs last disabled at (1223): [<c012230b>] irq_exit+0xef/0x10e
[    0.127808] ---[ end trace acde984246e8ff6a ]---

Building a non-Thumb2 kernel seems to work and boot in Qemu here.

[martell]

D55505 landed as https://reviews.llvm.org/rL351326 @nickdesaulniers.
@nathanchance can you rebase?

[nathanchance]

@nathanchance can you rebase?

Done.

[nathanchance]

I plan to merge this when http://git.armlinux.org.uk/cgit/linux-arm.git/commit/?id=091bb549f7722723b284f63ac665e2aedcf9dec9 hits mainline (which should be in the next week or so due to the merge window) so that we don't have to carry that patch in this repo.