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@miczyg1 miczyg1 commented Jan 26, 2026

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Cover differences between AM5 and mobile parts of Phoenix processors.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add support for configuring AMD SB-TSI sensors with SMBus.
Now that there is an AMD platform using this Super I/O, the
implementation could be tested and verified.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Soft fuse bit 14 swaps the ROM2 mapping range of 32MiB flash. This
make the coreboot's ROM3 code incompatible with the soft fuse bit 14.
The bit has to be cleared for ROM3 to work properly in coreboot.
Otherwise, the CBFS walker would not be able to find the CBFS files.

TEST=Run romstage on MSI PRO B850-P.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
The offset mask should match the ROM file size. The AM5 combo images
may contain BIOS relative addresses exceeding 16MiB boundary. Unlike
server parts, where the SPI flash space is paged into 16MiB parts,
the desktop parts do not have such limitation.

Preserve the old mask for cases where physical addressing is used and
supports only 16MiB flashes.

TEST=Parse MSI PRO B850-P vendor BIOS.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
The value ot EFS offset 0x54 is the USB BIOS Update (UBU) pointer.
It is mentioned in doc 55758.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Add a new type pointing to the Promontory chipset FW on desktop
firmware images.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
The combo images on AM5 platform may have multiple ISH structures
which point to the same PSP L2 directories, but differ with PSP IDs.
Do not return prematurely from the PSP directory parsing. Instead,
let the tool print the duplicated PSP L2 address, but do not parse it
again. This lets the other entries in given directory to be parsed
and printed (if the L2 pointer is not the last entry in the directory).

Add printing ISH structures to determine the PSP IDs supported by
given PSP L2 directories.

TEST=Parse MSI PRO B850-P vendor BIOS.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
On AM5 desktop platforms the addressing mode for L2 directories
is table-relative (2). However, the L2 pointers and L1 directories
always use the BIOS relative address mode (1) in AM5 combo images.
Force the BIOS-relative address mode for L1 directories whenever
the tool attempts to use table-relative address mode for L1
directories and their entries.

TEST=Boot bootblock on MSI PRO B850-P.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
@miczyg1 miczyg1 force-pushed the b850_support_part1 branch from a14101e to 75041f8 Compare January 26, 2026 15:23
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2 participants