Lineage 16.0

Documentation/devicetree/bindings/arm/msm/lpm-levels.txt

@@ -71,8 +71,6 @@ Required properties:
 	sleep.
 	- qcom,last-level - When set, the cluster level is applied only when
 	there is 1 online core.
-	- qcom,disable-dynamic-int-routing: When set disables the dynamic
-	routing of rpm-smd and mpm interrupts to next wake up core.
 
 [Node bindings for qcom,pm-cpu]
 qcom,pm-cpu contains the low power modes that a cpu could enter. Currently it

Documentation/devicetree/bindings/arm/msm/lpm-workarounds.txt

@@ -5,11 +5,6 @@ The required properties are:
 - compatible: "qcom,lpm-workarounds"
 
 The optional properties are:
-- reg: The physical address and the size of the l1_l2_gcc and l2_pwr_sts
-	regitsters of performance cluster.
-
-- reg-names: "l2_pwr_sts" - string to identify l2_pwr_sts physical address.
-	     "l1_l2_gcc" - string to identify l1_l2_gcc physical address.
 
 - qcom,lpm-wa-cx-turbo-unvote: Indicates the workaround to unvote CX turbo
 	vote when system is coming out of rpm assisted power collaspe.
@@ -18,36 +13,11 @@ The optional properties are:
 - lpm-cx-supply:  will hold handle for CX regulator supply which is used
 	to unvote.
 
-- qcom,lpm-wa-skip-l2-spm: Due to a hardware bug on 8939 and 8909, secure
-	world needs to disable and enable L2 SPM to get the proper context
-	in secure watchdog bite cases. With this workaround there is a race
-	in programming L2 SPM between HLOS and secure world. This leads to
-	stability issues. To avoid this program L2 SPM only in secure world
-	based on the L2 mode flag passed. Set lpm-wa-skip-l2-spm node if this
-	is required.
-
-- qcom,lpm-wa-dynamic-clock-gating: Due to a hardware bug on 8952, L1/L2 dynamic
-	clock gating needs to be enabled by software for performance cluster
-	cores and L2. Set lpm-wa-dynamic-clock-gating node if this workaround is
-	required.
-
-- qcom,cpu-offline-mask: Dynamic clock gating should be enabled when cluster is
-	in L2 PC. Each bit of cpu-offline-mask lists the cpu no. to hotplug by KTM
-	driver.
-
-- qcom,non-boot-cpu-index: will hold index of non boot cluster cpu.
-
 Example:
 
 qcom,lpm-workarounds {
 	compatible = "qcom,lpm-workarounds";
-	reg = <0x0B011018 0x4>,
-	      <0x0B011088 0x4>;
-	reg-names = "l2-pwr-sts", "l1-l2-gcc";
+
 	lpm-cx-supply = <&pm8916_s2_corner>;
 	qcom,lpm-wa-cx-turbo-unvote;
-	qcom,lpm-wa-skip-l2-spm;
-	qcom,lpm-wa-dynamic-clock-gating;
-	qcom,cpu-offline-mask = "0xF";
-	qcom,non-boot-cpu-index = <4>;
 }

Makefile

@@ -380,7 +380,7 @@ CHECKFLAGS     := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
 CFLAGS_MODULE   = $(FLAGS_OPTIMIZE) $(GRAPHITE)
 AFLAGS_MODULE   = $(FLAGS_OPTIMIZE) $(GRAPHITE)
 LDFLAGS_MODULE  = --strip-debug
-CFLAGS_KERNEL	= $(FLAGS_OPTIMIZE) $(GRAPHITE) -mcpu=cortex-a57.cortex-a53+crypto+crc -mtune=cortex-a57.cortex-a53 -march=armv8-a+crypto+crc
+CFLAGS_KERNEL	= $(FLAGS_OPTIMIZE) $(GRAPHITE) -mcpu=cortex-a57.cortex-a53+crypto+crc -mtune=cortex-a57.cortex-a53 -march=armv8-a+crypto+crc -mfix-cortex-a53-843419 -mfix-cortex-a53-835769 
 AFLAGS_KERNEL	= $(FLAGS_OPTIMIZE) $(GRAPHITE)
 CFLAGS_GCOV	= -fprofile-arcs -ftest-coverage
 
@@ -437,6 +437,8 @@ KBUILD_CFLAGS   := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
 		   -Wno-switch-bool \
 		   -Wno-multistatement-macros \
 		   -Wno-bool-operation -Wno-nonnull -Wno-switch-unreachable -Wno-format-truncation -Wno-format-overflow -Wno-duplicate-decl-specifier -Wno-memset-elt-size -Wno-int-in-bool-context \
+		   -mstrict-align \
+		   -mfix-cortex-a53-843419 -mfix-cortex-a53-835769 \
 		   $(GEN_OPT_FLAGS) \
 		   $(GRAPHITE) \
 		   $(FLAGS_OPTIMIZE)

android/configs/android-recommended.cfg

@@ -109,6 +109,10 @@ CONFIG_TABLET_USB_GTCO=y
 CONFIG_TABLET_USB_HANWANG=y
 CONFIG_TABLET_USB_KBTAB=y
 CONFIG_TABLET_USB_WACOM=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_TASK_XACCT=y
 CONFIG_TIMER_STATS=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y

arch/alpha/include/uapi/asm/fcntl.h

@@ -32,6 +32,7 @@
 #define O_SYNC		(__O_SYNC|O_DSYNC)
 
 #define O_PATH		040000000
+#define __O_TMPFILE	0100000000
 
 #define F_GETLK		7
 #define F_SETLK		8

arch/arm/boot/dts/qcom/msm-pmi8994.dtsi

@@ -608,6 +608,8 @@
 			label = "rgb";
 			status = "okay";
 
+			qcom,rgb-sync;
+
 			qcom,rgb_0 {
 				label = "rgb";
 				qcom,id = <3>;

arch/arm/boot/dts/qcom/msm8994-mtp.dtsi

@@ -524,6 +524,7 @@
 			gpios = <&pm8994_gpios 3 0x1>;
 			linux,input-type = <1>;
 			linux,code = <115>;
+			gpio-key,wakeup;
 			debounce-interval = <15>;
 		};
 
@@ -534,6 +535,7 @@
 			gpios = <&pm8994_gpios 2 0x1>;
 			linux,input-type = <1>;
 			linux,code = <114>;
+			gpio-key,wakeup;
 			debounce-interval = <15>;
 		};
     //endif VENDOR_EDIT

arch/arm/boot/dts/qcom/msm8994.dtsi

@@ -37,9 +37,17 @@
 					dev = "/dev/block/platform/soc.0/f9824900.sdhci/by-name/system";
 					type = "ext4";
 					mnt_flags = "ro,barrier=1,discard";
-					fsmgr_flags = "wait";
+					fsmgr_flags = "wait,verify=/dev/block/platform/soc.0/f9824900.sdhci/by-name/reserve2";
 					status = "ok";
 				};
+vendor {
+      compatible = "android,vendor";
+      dev = "/dev/block/platform/soc.0/f9824900.sdhci/by-name/cache";
+      type = "ext4";
+      mnt_flags = "ro,barrier=1,discard";
+					fsmgr_flags = "wait,verify=/dev/block/platform/soc.0/f9824900.sdhci/by-name/reserve2";
+      status = "ok";
+    };
 			};
 		};
 	};
@@ -340,7 +348,7 @@
  					509   165
  				>;
  				idle-cost-data = <
- 					0 0 0 0
+ 					56 56 56 17
  				>;
  			};
  			CLUSTER_COST_1: cluster-cost1 {
@@ -360,7 +368,7 @@
  					1024   80
  				>;
  				idle-cost-data = <
- 					0 0 0 0
+ 					65 65 65 24
  				>;
  			};
  		};

arch/arm/include/asm/assembler.h

@@ -382,6 +382,14 @@ THUMB(	orr	\reg , \reg , #PSR_T_BIT	)
 	.size \name , . - \name
 	.endm
 
+	.macro	csdb
+#ifdef CONFIG_THUMB2_KERNEL
+	.inst.w	0xf3af8014
+#else
+	.inst	0xe320f014
+#endif
+	.endm
+
 	.macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
 #ifndef CONFIG_CPU_USE_DOMAINS
 	adds	\tmp, \addr, #\size - 1

arch/arm/include/asm/barrier.h

@@ -17,6 +17,12 @@
 #define isb(option) __asm__ __volatile__ ("isb " #option : : : "memory")
 #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory")
 #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory")
+#ifdef CONFIG_THUMB2_KERNEL
+#define CSDB	".inst.w 0xf3af8014"
+#else
+#define CSDB	".inst	0xe320f014"
+#endif
+#define csdb() __asm__ __volatile__(CSDB : : : "memory")
 #elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
 #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
 				    : : "r" (0) : "memory")
@@ -37,6 +43,13 @@
 #define dmb(x) __asm__ __volatile__ ("" : : : "memory")
 #endif
 
+#ifndef CSDB
+#define CSDB
+#endif
+#ifndef csdb
+#define csdb()
+#endif
+
 #ifdef CONFIG_ARCH_HAS_BARRIERS
 #include <mach/barriers.h>
 #elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
@@ -82,5 +95,24 @@ do {									\
 #define smp_mb__before_atomic()	smp_mb()
 #define smp_mb__after_atomic()	smp_mb()
 
+#ifdef CONFIG_CPU_SPECTRE
+static inline unsigned long array_index_mask_nospec(unsigned long idx,
+						    unsigned long sz)
+{
+	unsigned long mask;
+
+	asm volatile(
+		"cmp	%1, %2\n"
+	"	sbc	%0, %1, %1\n"
+	CSDB
+	: "=r" (mask)
+	: "r" (idx), "Ir" (sz)
+	: "cc");
+
+	return mask;
+}
+#define array_index_mask_nospec array_index_mask_nospec
+#endif
+
 #endif /* !__ASSEMBLY__ */
 #endif /* __ASM_BARRIER_H */

arch/arm/kernel/entry-common.S

@@ -435,9 +435,7 @@ local_restart:
 	tst	r10, #_TIF_SYSCALL_WORK		@ are we tracing syscalls?
 	bne	__sys_trace
 
-	cmp	scno, #NR_syscalls		@ check upper syscall limit
-	adr	lr, BSYM(ret_fast_syscall)	@ return address
-	ldrcc	pc, [tbl, scno, lsl #2]		@ call sys_* routine
+	invoke_syscall tbl, scno, r10, ret_fast_syscall
 
 	add	r1, sp, #S_OFF
 2:	mov	why, #0				@ no longer a real syscall
@@ -470,14 +468,8 @@ __sys_trace:
 	mov	r1, scno
 	add	r0, sp, #S_OFF
 	bl	syscall_trace_enter
-
-	adr	lr, BSYM(__sys_trace_return)	@ return address
-	mov	scno, r0			@ syscall number (possibly new)
-	add	r1, sp, #S_R0 + S_OFF		@ pointer to regs
-	cmp	scno, #NR_syscalls		@ check upper syscall limit
-	ldmccia	r1, {r0 - r6}			@ have to reload r0 - r6
-	stmccia	sp, {r4, r5}			@ and update the stack args
-	ldrcc	pc, [tbl, scno, lsl #2]		@ call sys_* routine
+	mov	scno, r0
+	invoke_syscall tbl, scno, r10, __sys_trace_return, reload=1
 	cmp	scno, #-1			@ skip the syscall?
 	bne	2b
 	add	sp, sp, #S_OFF			@ restore stack
@@ -523,6 +515,10 @@ sys_syscall:
 		bic	scno, r0, #__NR_OABI_SYSCALL_BASE
 		cmp	scno, #__NR_syscall - __NR_SYSCALL_BASE
 		cmpne	scno, #NR_syscalls	@ check range
+#ifdef CONFIG_CPU_SPECTRE
+		movhs	scno, #0
+		csdb
+#endif
 		stmloia	sp, {r5, r6}		@ shuffle args
 		movlo	r0, r1
 		movlo	r1, r2

arch/arm/kernel/entry-header.S

@@ -225,6 +225,31 @@
 #endif
 	.endm
 
+	.macro	invoke_syscall, table, nr, tmp, ret, reload=0
+#ifdef CONFIG_CPU_SPECTRE
+	mov	\tmp, \nr
+	cmp	\tmp, #NR_syscalls		@ check upper syscall limit
+	movcs	\tmp, #0
+	csdb
+	adr	lr, BSYM(\ret)			@ return address
+	.if	\reload
+	add	r1, sp, #S_R0 + S_OFF		@ pointer to regs
+	ldmccia	r1, {r0 - r6}			@ reload r0-r6
+	stmccia	sp, {r4, r5}			@ update stack arguments
+	.endif
+	ldrcc	pc, [\table, \tmp, lsl #2]	@ call sys_* routine
+#else
+	cmp	\nr, #NR_syscalls		@ check upper syscall limit
+	adr	lr, BSYM(\ret)			@ return address
+	.if	\reload
+	add	r1, sp, #S_R0 + S_OFF		@ pointer to regs
+	ldmccia	r1, {r0 - r6}			@ reload r0-r6
+	stmccia	sp, {r4, r5}			@ update stack arguments
+	.endif
+	ldrcc	pc, [\table, \nr, lsl #2]	@ call sys_* routine
+#endif
+	.endm
+
 /*
  * These are the registers used in the syscall handler, and allow us to
  * have in theory up to 7 arguments to a function - r0 to r6.

arch/arm/mm/Kconfig

@@ -395,6 +395,7 @@ config CPU_V7
 	select CPU_CP15_MMU
 	select CPU_HAS_ASID if MMU
 	select CPU_PABRT_V7
+	select CPU_SPECTRE if MMU
 	select CPU_TLB_V7 if MMU
 
 config CPU_THUMBONLY
@@ -772,6 +773,9 @@ config CPU_BPREDICT_DISABLE
 	help
 	  Say Y here to disable branch prediction.  If unsure, say N.
 
+config CPU_SPECTRE
+	bool
+
 config TLS_REG_EMUL
 	bool
 	select NEED_KUSER_HELPERS

arch/arm/mm/dma-mapping.c

@@ -160,6 +160,8 @@ static void arm_dma_unremap(struct device *dev, void *remapped_addr,
 		return;
 	}
 	vunmap(remapped_addr);
+	flush_tlb_kernel_range((unsigned long)remapped_addr,
+			(unsigned long)(remapped_addr + size));
 }
 
 struct dma_map_ops arm_dma_ops = {

arch/arm64/configs/haruhi_defconfig

@@ -598,14 +598,22 @@ CONFIG_DEFAULT_WESTWOOD=y
 CONFIG_DEFAULT_TCP_CONG="westwood"
 CONFIG_WIREGUARD=y
 # CONFIG_WIREGUARD_DEBUG is not set
-CONFIG_FB_MSM_MDSS_KCAL_CTRL=y
 CONFIG_CRYPTO_SHA256_ARM64=y
 CONFIG_CRYPTO_SHA512_ARM64=y
 CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
-CONFIG_QUICK_WAKEUP=y
-CONFIG_POWERSUSPEND=y
 # CONFIG_ARM_ARCH_TIMER_VCT_ACCESS is not set
 # CONFIG_TCP_CONG_BIC is not set
 # CONFIG_TCP_CONG_CUBIC is not set
 # CONFIG_TCP_CONG_HTCP is not set
 CONFIG_EXFAT_FS=y
+CONFIG_SDFAT_FS=y
+CONFIG_SDFAT_DELAYED_META_DIRTY=y
+CONFIG_SDFAT_SUPPORT_DIR_SYNC=y
+CONFIG_SDFAT_DEFAULT_CODEPAGE=437
+CONFIG_SDFAT_DEFAULT_IOCHARSET="utf8"
+CONFIG_SDFAT_ALIGNED_MPAGE_WRITE=y
+CONFIG_SDFAT_VIRTUAL_XATTR=y
+CONFIG_SDFAT_VIRTUAL_XATTR_SELINUX_LABEL="u:object_r:vfat:s0"
+CONFIG_SDFAT_DEBUG=y
+CONFIG_SDFAT_DBG_MSG=y
+CONFIG_SDFAT_STATISTICS=y

arch/arm64/include/uapi/asm/bitsperlong.h

@@ -16,7 +16,11 @@
 #ifndef __ASM_BITSPERLONG_H
 #define __ASM_BITSPERLONG_H
 
+#ifdef __aarch64__
 #define __BITS_PER_LONG 64
+#else
+#define __BITS_PER_LONG 32
+#endif
 
 #include <asm-generic/bitsperlong.h>
 

arch/arm64/mm/dma-mapping.c

@@ -506,6 +506,8 @@ static void arm64_dma_unremap(struct device *dev, void *remapped_addr,
 		return;
 	}
 	vunmap(remapped_addr);
+	flush_tlb_kernel_range((unsigned long)remapped_addr,
+			(unsigned long)(remapped_addr + size));
 }
 
 const struct dma_map_ops noncoherent_swiotlb_dma_ops = {

arch/parisc/include/uapi/asm/fcntl.h

@@ -20,6 +20,7 @@
 #define O_INVISIBLE	004000000 /* invisible I/O, for DMAPI/XDSM */
 
 #define O_PATH		020000000
+#define __O_TMPFILE	040000000
 
 #define F_GETLK64	8
 #define F_SETLK64	9

arch/sparc/include/uapi/asm/fcntl.h

@@ -35,6 +35,7 @@
 #define O_SYNC		(__O_SYNC|O_DSYNC)
 
 #define O_PATH		0x1000000
+#define __O_TMPFILE	0x2000000
 
 #define F_GETOWN	5	/*  for sockets. */
 #define F_SETOWN	6	/*  for sockets. */