[None][test] Add QA's perf test cases with L0 local mode - #12022
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Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
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📝 WalkthroughWalkthroughAdds extensive disaggregated performance benchmarking configurations for AI models (Qwen3, DeepSeek-R1, WideDeep, Kimi-K2) with varying hardware allocations and precisions, a multinode test list file for test selection, and a single model path mapping entry to the test suite. Changes
Estimated code review effort🎯 3 (Moderate) | ⏱️ ~25 minutes Possibly related PRs
Suggested reviewers
✨ Finishing Touches🧪 Generate unit tests (beta)
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PR_Github #38204 [ run ] triggered by Bot. Commit: |
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⚠️ Outside diff range comments (1)
tests/integration/defs/perf/test_perf_sanity.py (1)
1-1:⚠️ Potential issue | 🟡 MinorUpdate copyright year to 2026.
The copyright header shows
2022-2025but this file is being modified in 2026. As per coding guidelines, the copyright year should reflect the year of the latest meaningful modification.Proposed fix
-# SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. +# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/integration/defs/perf/test_perf_sanity.py` at line 1, Update the copyright header in the test file to include 2026 by replacing the existing "2022-2025" range with "2022-2026" at the top of tests/integration/defs/perf/test_perf_sanity.py so the file's copyright reflects the current modification year.
🟠 Major comments (16)
tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-UCX.yaml-52-70 (1)
52-70:⚠️ Potential issue | 🟠 MajorTrim CUDA graph captures to supported batch sizes.
gen.max_batch_sizeis16, butcuda_graph_config.batch_sizesgoes up to2048. If the harness pre-captures graphs for these entries, this preset will either waste a lot of memory or fail while building graphs for batches the worker can never admit.🛠️ Proposed fix
gen: tensor_parallel_size: 8 moe_expert_parallel_size: 8 enable_attention_dp: false pipeline_parallel_size: 1 max_batch_size: 16 max_num_tokens: 64 max_seq_len: 9419 cuda_graph_config: enable_padding: true batch_sizes: - 1 - 2 - 4 - 8 - 16 - - 32 - - 64 - - 128 - - 256 - - 512 - - 768 - - 1024 - - 2048🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen3_tep8_bs16_eplb0_mtp3_con8_ccb-UCX.yaml` around lines 52 - 70, The CUDA graph capture list exceeds the configured max batch size: trim cuda_graph_config.batch_sizes so every entry is <= the declared max_batch_size (16) to avoid pre-capturing unsupported large graphs; update the yaml entries under cuda_graph_config.batch_sizes to only include supported batch sizes (e.g., 1,2,4,8,16) or generate the list programmatically from max_batch_size so batch_sizes never contains values greater than max_batch_size.tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_con8192_ccb-NIXL.yaml-51-70 (1)
51-70:⚠️ Potential issue | 🟠 MajorKeep CUDA graph batch sizes within the declared worker max.
max_batch_sizeis capped at256, but the capture list still includes512,768,1024, and2048, plus a duplicate256. Those larger shapes cannot be scheduled by this worker and may either be rejected or just waste graph-capture time/memory.Suggested cleanup
gen: max_batch_size: 256 max_num_tokens: 256 max_seq_len: 9256 cuda_graph_config: enable_padding: true batch_sizes: - 1 - 2 - 4 - 8 - 16 - 32 - 64 - 128 - 256 - - 512 - - 768 - - 1024 - - 2048 - - 256🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_8k1k_ctx8_gen1_dep32_bs256_eplb416_mtp0_con8192_ccb-NIXL.yaml` around lines 51 - 70, The cuda graph capture list (cuda_graph_config.batch_sizes) contains values exceeding the worker's max_batch_size and a duplicate; update the batch_sizes in the YAML so every entry is unique and <= the declared max_batch_size (max_batch_size: 256) — e.g., remove 512, 768, 1024, 2048 and the duplicate 256 or replace any larger sizes with valid sizes up to 256; ensure consistency between max_batch_size and cuda_graph_config.batch_sizes to avoid invalid captures.tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-UCX.yaml-85-105 (1)
85-105:⚠️ Potential issue | 🟠 MajorPin
ctxto the same MoE backend asgen.
genexplicitly selectsWIDEEP, butctxnever setsmoe_config. In a disaggregated DeepSeek run that can leave context on a different default backend, which skews the perf signal and makes this case inconsistent with the intended WIDEEP coverage.Suggested fix
ctx: max_batch_size: 4 max_num_tokens: 4608 max_seq_len: 2251 tensor_parallel_size: 4 moe_expert_parallel_size: 4 enable_attention_dp: true pipeline_parallel_size: 1 print_iter_log: true cuda_graph_config: null disable_overlap_scheduler: true kv_cache_config: enable_block_reuse: false free_gpu_memory_fraction: 0.85 dtype: fp8 + moe_config: + backend: WIDEEP cache_transceiver_config: max_tokens_in_buffer: 4608 backend: UCX speculative_config: decoding_type: MTP num_nextn_predict_layers: 3🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp3_con2048_ccb-UCX.yaml` around lines 85 - 105, The ctx configuration block is not pinned to the same MoE backend as gen, which selects WIDEEP, so add a moe_config entry under ctx mirroring gen's MoE backend selection to ensure both use WIDEEP; specifically, update the ctx map (ctx: {...}) to include moe_config with the same backend/value used in gen (e.g., backend: WIDEEP and any matching subfields) so context and generation run on the same MoE backend.tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX.yaml-78-82 (1)
78-82:⚠️ Potential issue | 🟠 MajorConfigure the ctx role for WIDEEP as well.
This is a
wideep_*benchmark, but onlyworker_config.gensetsmoe_config.backend: WIDEEP. As written,worker_config.ctxis left to the default MoE backend, which makes the prefill side inconsistent with the decode side for this perf case.Suggested fix
ctx: enable_layerwise_nvtx_marker: true max_batch_size: 1 max_num_tokens: 8448 max_seq_len: 9419 tensor_parallel_size: 4 moe_expert_parallel_size: 4 enable_attention_dp: true pipeline_parallel_size: 1 print_iter_log: true cuda_graph_config: null disable_overlap_scheduler: true kv_cache_config: enable_block_reuse: false free_gpu_memory_fraction: 0.75 dtype: fp8 + moe_config: + backend: WIDEEP cache_transceiver_config: max_tokens_in_buffer: 8448 backend: UCX speculative_config: decoding_type: MTP num_nextn_predict_layers: 3Also applies to: 91-112
🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX.yaml` around lines 78 - 82, The ctx role is not configured to use the WIDEEP MoE backend, causing prefill/decoding inconsistency; update the YAML so that the ctx role (e.g., worker_config.ctx) uses the same moe_config.backend: WIDEEP as worker_config.gen (ensure any ctx-specific moe_config section or worker_config.ctx.moe_config sets backend: WIDEEP and mirrors relevant WIDEEP settings like load_balancer.num_slots and layer_updates_per_iter), and apply the same change to the other similar blocks mentioned (lines 91–112) so both prefill and decode sides use WIDEEP.tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX.yaml-54-72 (1)
54-72:⚠️ Potential issue | 🟠 MajorTrim
cuda_graph_config.batch_sizesto values the gen worker can actually schedule.
max_batch_sizeis16, but this capture list goes up to2048. Anything above16is unreachable for this worker and can either fail validation or add pointless graph-capture overhead during setup.Suggested fix
max_batch_size: 16 max_num_tokens: 64 max_seq_len: 9419 cuda_graph_config: enable_padding: true batch_sizes: - 1 - 2 - 4 - 8 - 16 - - 32 - - 64 - - 128 - - 256 - - 512 - - 768 - - 1024 - - 2048🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx8_gen1_dep32_bs16_eplb288_mtp3_con512_ccb-UCX.yaml` around lines 54 - 72, The cuda_graph_config.batch_sizes list contains sizes larger than this worker's max_batch_size (16) which are unreachable and wasteful; update the batch_sizes for the gen worker (cuda_graph_config.batch_sizes) to only include values <= max_batch_size (e.g., 1,2,4,8,16) or otherwise trim/remove entries above 16 so validation and graph capture only consider schedulable batches and avoid unnecessary overhead.tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0_con8-Default.yaml-51-66 (1)
51-66:⚠️ Potential issue | 🟠 MajorCUDA graph batch sizes should match the
bs8profile.Line 51 caps
gen.max_batch_sizeat 8, but Lines 56-66 still declare graph captures up to 512. Those larger captures are unreachable for this case and can skew setup time for the perf run.Suggested fix
cuda_graph_config: enable_padding: true batch_sizes: - 1 - 2 - 4 - 8 - - 16 - - 32 - - 64 - - 128 - - 256 - - 512🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx2_pp8_gen1_dep16_bs8_eplb0_mtp0_con8-Default.yaml` around lines 51 - 66, The cuda_graph_config.batch_sizes list contains captures larger than the declared max_batch_size (gen.max_batch_size: 8), which are unreachable and inflate setup time; update the cuda_graph_config entry (batch_sizes under cuda_graph_config) to only include sizes <= max_batch_size (e.g., 1, 2, 4, 8) or programmatically derive the list from max_batch_size so it matches the bs8 profile and removes 16,32,64,128,256,512 entries.tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0_con16-Default.yaml-15-15 (1)
15-15:⚠️ Potential issue | 🟠 MajorGen worker is undersized for the configured tensor parallelism.
This config allocates
--gres=gpu:4/gpus_per_node: 4withnum_gen_servers: 1, but the gen worker requirestensor_parallel_size: 16(lines 47-49). This needs 16 GPUs but only 4 are available. The job will fail during rank initialization when attempting to distribute 16 tensor-parallel ranks across a single 4-GPU node.Either increase
num_gen_serversto 4, reducetensor_parallel_sizeto ≤ 4, or adjust the topology accordingly.Also applies to: 27-30, 47-49
🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx3_pp8_gen1_dep16_bs16_eplb0_mtp0_con16-Default.yaml` at line 15, The gen worker's tensor_parallel_size (referenced as tensor_parallel_size in the gen worker/topology section) is set to 16 but the config only allocates 4 GPUs per node via extra_args: --gres=gpu:4 and gpus_per_node: 4 with num_gen_servers: 1; fix by making the tensor parallelism match available GPUs: either increase num_gen_servers to 4 so total GPUs ≥ 16, or reduce tensor_parallel_size to ≤ 4, or change extra_args/gpus_per_node to provide 16 GPUs; update the matching fields (num_gen_servers, tensor_parallel_size, extra_args/gres or gpus_per_node) consistently so tensor_parallel_size does not exceed total allocated GPUs.tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml-48-106 (1)
48-106:⚠️ Potential issue | 🟠 MajorConfigure the advertised
mtp3mode.This file is named as an
mtp3case, but neither worker block setsspeculative_config. As written, this benchmark will run plain decoding instead of 3-layer MTP, so the results will not match the scenario encoded in the filename.Suggested fix
gen: enable_layerwise_nvtx_marker: true tensor_parallel_size: 48 moe_expert_parallel_size: 48 enable_attention_dp: true enable_lm_head_tp_in_adp: true @@ cache_transceiver_config: max_tokens_in_buffer: 8320 backend: DEFAULT + speculative_config: + decoding_type: MTP + num_nextn_predict_layers: 3 stream_interval: 20 ctx: enable_layerwise_nvtx_marker: true @@ cache_transceiver_config: max_tokens_in_buffer: 8320 backend: DEFAULT + speculative_config: + decoding_type: MTP + num_nextn_predict_layers: 3🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml` around lines 48 - 106, The benchmark YAML names indicate mtp3 but neither the gen nor ctx worker specs enable speculative MTP; add a speculative_config stanza to both gen and ctx blocks to configure 3-layer MTP (e.g., set speculative_config.mode to "MTP", layers=3 or the project-specific mtp3 keys) so decoding runs in mtp3 mode; modify the gen and ctx sections (look for the top-level keys gen and ctx and add/update speculative_config) to match the mtp3 configuration used by other mtp3 benchmarks.tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml-55-56 (1)
55-56:⚠️ Potential issue | 🟠 MajorFix gen worker batch configuration to match
bs16label.The filename advertises a
bs16case, but the gen worker is configured withmax_batch_size: 1024andmax_num_tokens: 1024, which is 64× larger than otherbs16configs (which use 16 and 64 respectively). The CUDA graph capture extends to batch size 2048. This configuration mismatch means the benchmark exercises a different workload than the filename indicates—likely carrying over template values from a larger-batch config.Align these values with the pattern from comparable
bs16configurations. Also review the ctx worker batch settings at lines 90–91 for consistency.🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx2_gen1_dep48_bs16_eplb288_mtp3_con12288_ccb-DEFAULT.yaml` around lines 55 - 56, The gen worker in this YAML uses incorrect large-batch defaults: change the gen worker's max_batch_size to 16 and max_num_tokens to 64 (replace the current max_batch_size and max_num_tokens entries) to match the bs16 pattern used by comparable configs; then review and, if needed, adjust the ctx worker batch settings (the ctx worker's max_batch_size/max_num_tokens entries referenced around lines 90–91) so they are consistent with the bs16 configuration pattern.tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL_kv-reuse.yaml-54-72 (1)
54-72:⚠️ Potential issue | 🟠 MajorKeep CUDA graph capture sizes inside the worker envelope.
Line 54 and Line 55 cap the gen worker at 32 requests / 32 tokens, but Lines 59-72 still register CUDA graph batch sizes up to 2048. Those entries are unreachable at best and can fail validation or waste startup time at worst. If
bs32is intentional, trim the capture list to<=32; otherwise raise the worker limits to match.🔧 Suggested fix
gen: max_batch_size: 32 max_num_tokens: 32 max_seq_len: 2251 cuda_graph_config: enable_padding: true batch_sizes: - 1 - 2 - 4 - 8 - 16 - 32 - - 64 - - 128 - - 256 - - 512 - - 768 - - 1024 - - 2048🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL_kv-reuse.yaml` around lines 54 - 72, The CUDA graph capture sizes listed under the cuda_graph_config.batch_sizes must be consistent with the worker limits: update either the max_batch_size/max_num_tokens values or the batch_sizes array so they match; specifically, if you intend to keep the worker capped at 32 (max_batch_size: 32 and max_num_tokens: 32) then trim cuda_graph_config.batch_sizes to only values <= 32, otherwise raise max_batch_size and/or max_num_tokens to accommodate larger capture entries (e.g., include 64..2048) so the capture list is reachable and validation won't fail; adjust the entries under cuda_graph_config, enable_padding and batch_sizes to reflect the chosen limit.tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-UCX.yaml-42-43 (1)
42-43:⚠️ Potential issue | 🟠 MajorDisable tracing/logging knobs in the baseline perf case.
nsys_onis off, but both workers still enable layerwise NVTX markers and per-iteration logging. That adds avoidable hot-path overhead and will make this L0 benchmark under-report throughput.♻️ Suggested config change
worker_config: gen: - enable_layerwise_nvtx_marker: true + enable_layerwise_nvtx_marker: false @@ - print_iter_log: true + print_iter_log: false ctx: - enable_layerwise_nvtx_marker: true + enable_layerwise_nvtx_marker: false @@ - print_iter_log: true + print_iter_log: falseAlso applies to: 48-48, 73-73, 89-89, 97-97
🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_8k1k_ctx6_gen1_dep16_bs64_eplb288_mtp0_con1024_ccb-UCX.yaml` around lines 42 - 43, The baseline profiling config leaves NVTX layerwise markers and per-iteration logging enabled even though profiling.nsys_on is false; disable those hot-path tracing/logging knobs so the L0 benchmark doesn't under-report throughput—set the NVTX/layerwise marker flag (e.g., nvtx_layerwise or similar layerwise NVTX setting) to false and turn off per-iteration logging (e.g., per_iteration_logging, log_every_iter, or log_every_n_iters) in the same config block where profiling.nsys_on is defined (also apply the same change to the other listed configs).tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml-47-53 (1)
47-53:⚠️ Potential issue | 🟠 MajorAlign the file name with the actual topology and batch size.
This case is named
_tep8_bs32_, but Lines 48-53 configuretensor_parallel_size: 4,moe_expert_parallel_size: 4, andmax_batch_size: 64. That makes the benchmark coverage and any reported results misleading. Please either rename the file to match the current payload or update the payload so it truly represents thetep8/bs32scenario.🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yaml` around lines 47 - 53, The YAML's filename indicates tep8 and bs32 but the payload sets tensor_parallel_size: 4, moe_expert_parallel_size: 4, and max_batch_size: 64, causing a mismatch; either rename the file to reflect the current topology/batch (remove _tep8_bs32_ or change to _tep4_bs64_) or update the payload to match the intended scenario by setting tensor_parallel_size: 8, moe_expert_parallel_size: 8 (if applicable) and max_batch_size: 32; locate these keys (tensor_parallel_size, moe_expert_parallel_size, max_batch_size) in the file and make the consistent change so filename and payload align.tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0_con2-Default.yaml-47-50 (1)
47-50:⚠️ Potential issue | 🟠 MajorFix the gen topology so it matches the
tep4case name.This file is named
...gen8_tep4..., but Lines 47-50 configure the gen worker asTP=1 / EP=1 / PP=4. That means this case will exercise a pp4 topology instead of the advertised tep4 topology, which makes the benchmark label misleading and skews coverage for the intended scenario.🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0_con2-Default.yaml` around lines 47 - 50, The topology fields tensor_parallel_size and moe_expert_parallel_size are currently set to 1 causing the file named gen8_tep4... to actually exercise a PP=4-only topology; update the gen worker topology to match the tep4 case by setting tensor_parallel_size to 4 and moe_expert_parallel_size to 4 (leave enable_attention_dp as false and keep pipeline_parallel_size as 4) so the configuration reflects TEP=4.tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml-84-101 (1)
84-101:⚠️ Potential issue | 🟠 MajorAdd explicit
moe_configtoctxblocks in all 1k1k and 8k1k perf configs to match the 128k8k pattern.The
ctxblocks across Qwen3 and DeepSeek 1k1k and 8k1k configs setmoe_expert_parallel_sizebut omit explicitmoe_config, while the 128k8k DeepSeek configs includemoe_config.backend: TRTLLM. This inconsistency should be resolved by adding the explicit block to maintain uniformity across all MoE-enabled perf configurations.🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yaml` around lines 84 - 101, The ctx block sets moe_expert_parallel_size but lacks an explicit moe_config; add a moe_config block under ctx (e.g., moe_config: and set backend: TRTLLM) to match the 128k8k pattern so MoE-enabled perf configs are consistent; update the YAML where ctx contains moe_expert_parallel_size (referencing ctx, moe_expert_parallel_size, and moe_config.backend: TRTLLM) across the 1k1k and 8k1k Qwen3/DeepSeek perf config files.tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml-42-43 (1)
42-43:⚠️ Potential issue | 🟠 MajorDisable layerwise NVTX markers for this non-profiled perf baseline.
profiling.nsys_onisfalse, but both workers still enableenable_layerwise_nvtx_marker. That adds instrumentation overhead to the exact path this QA case is supposed to baseline, so the numbers will not be directly comparable to the rest of the suite.🛠 Proposed fix
worker_config: gen: - enable_layerwise_nvtx_marker: true + enable_layerwise_nvtx_marker: false @@ ctx: - enable_layerwise_nvtx_marker: true + enable_layerwise_nvtx_marker: falseAlso applies to: 48-49, 89-89
🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb288_mtp0_con1024_ccb-NIXL.yaml` around lines 42 - 43, The workers currently enable enable_layerwise_nvtx_marker even though profiling.nsys_on is false; update the YAML so that enable_layerwise_nvtx_marker is set to false (or removed) for both worker configurations when profiling.nsys_on is false (search for profiling.nsys_on and the enable_layerwise_nvtx_marker keys in the file and toggle the workers' enable_layerwise_nvtx_marker entries to false to eliminate NVTX instrumentation overhead).tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0_con1-Default.yaml-23-23 (1)
23-23:⚠️ Potential issue | 🟠 MajorTrim CUDA graph capture sizes to the only reachable batch size.
Line 23 drives only concurrency
1, and Line 51 caps the gen worker atmax_batch_size: 1. The captures for2..512can never be exercised by this case, so the benchmark pays extra graph-capture/warmup cost for dead configurations.✂️ Proposed fix
benchmark: streaming: true concurrency_list: '1' @@ gen: tensor_parallel_size: 4 @@ max_batch_size: 1 @@ cuda_graph_config: enable_padding: true batch_sizes: - 1 - - 2 - - 4 - - 8 - - 16 - - 32 - - 64 - - 128 - - 256 - - 512Also applies to: 51-66
🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0_con1-Default.yaml` at line 23, The benchmark YAML config lists concurrency_list: '1' and the generation worker is capped with max_batch_size: 1, so CUDA graph captures for batch sizes 2..512 are unreachable and wasteful; update the generation worker capture/capture_batch_sizes (and any capture_size or warmup_size arrays used in the generation worker block) to only include the single reachable batch size 1 (remove 2..512 entries) and mirror that change for the second block referenced (lines 51-66) so captures/warmup only occur for batch size 1.
🟡 Minor comments (11)
tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen1_dep32_bs128_eplb0_mtp3_con1024_ccb-UCX.yaml-9-9 (1)
9-9:⚠️ Potential issue | 🟡 Minor
benchmark_typedoes not match filename or actual workload.The filename indicates
8k1kand the benchmark settings useinput_length: 8192andoutput_length: 1024(which is 8k input, 1k output), butbenchmark_typeis set to1k1k. This inconsistency could cause confusion in test categorization and result analysis.Proposed fix
script_file: disaggr_torch.slurm - benchmark_type: 1k1k + benchmark_type: 8k1k config_index: -1🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/deepseek-r1-fp4_8k1k_ctx1_gen1_dep32_bs128_eplb0_mtp3_con1024_ccb-UCX.yaml` at line 9, The YAML sets benchmark_type: 1k1k which conflicts with the file name and workload (input_length: 8192, output_length: 1024); update the benchmark_type to reflect the actual workload (e.g., 8k1k) so the test metadata matches input_length/output_length and the filename (deepseek-r1-fp4_8k1k_ctx1_gen1_dep32_bs128_eplb0_mtp3_con1024_ccb-UCX.yaml); verify benchmark_type is consistent with the symbols input_length and output_length after the change.tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-UCX.yaml-32-40 (1)
32-40:⚠️ Potential issue | 🟡 MinorMissing
trtllm_wheel_pathfield present in the NIXL variant.The NIXL configuration file includes
trtllm_wheel_path: ''in the environment section, but this file omits it. For consistency between the UCX and NIXL configurations, consider adding the missing field.Proposed fix
environment: container_mount: <container_mount> container_image: <container_image> model_path: <model_path> trtllm_repo: '' build_wheel: false + trtllm_wheel_path: '' work_dir: <full_path_to_work_dir> worker_env_var: "TLLM_LOG_LEVEL=INFO TRTLLM_SERVER_DISABLE_GC=1 TRTLLM_WORKER_DISABLE_GC=1 TRTLLM_ENABLE_PDL=1 ENROOT_ALLOW_DEV=yes" server_env_var: "TRTLLM_SERVER_DISABLE_GC=1"🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/deepseek-r1-fp4_1k1k_ctx1_gen1_dep32_bs32_eplb0_mtp0_con1024_ccb-UCX.yaml` around lines 32 - 40, Add the missing environment key trtllm_wheel_path (e.g., trtllm_wheel_path: '') to the environment block so this UCX YAML matches the NIXL variant; locate the environment mapping (keys like container_mount, container_image, model_path, trtllm_repo, build_wheel, work_dir, worker_env_var, server_env_var) and insert the trtllm_wheel_path entry with the same default/empty value and formatting as the NIXL file.tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml-52-70 (1)
52-70:⚠️ Potential issue | 🟡 MinorCUDA graph batch sizes exceed
max_batch_size.
max_batch_sizeis set to 32, butcuda_graph_config.batch_sizesincludes values up to 2048. This violates the constraint thatmax_batch_sizemust equalmax(batch_sizes)inCudaGraphConfig. Either increasemax_batch_sizeto 2048 or trim batch_sizes to values ≤ 32. Oversized batch sizes waste memory and startup time since they will never be used.Suggested fix
cuda_graph_config: enable_padding: true batch_sizes: - 1 - 2 - 4 - 8 - 16 - 32 - - 64 - - 128 - - 256 - - 512 - - 768 - - 1024 - - 2048🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yaml` around lines 52 - 70, The CudaGraphConfig is inconsistent: max_batch_size (max_batch_size) is 32 but cuda_graph_config.batch_sizes contains sizes up to 2048; update the YAML so max_batch_size equals the maximum value in cuda_graph_config.batch_sizes (e.g., set max_batch_size: 2048) or prune cuda_graph_config.batch_sizes to only include values ≤ the current max_batch_size (e.g., remove entries >32) so that CudaGraphConfig.max_batch_size == max(batch_sizes).tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_con16384_ccb-NIXL.yaml-54-70 (1)
54-70:⚠️ Potential issue | 🟡 MinorRemove the duplicated CUDA graph batch size.
Line 70 repeats
1024after2048. That makes the capture ladder non-monotonic and adds a redundant graph-size entry for this case.✂️ Proposed fix
cuda_graph_config: enable_padding: true batch_sizes: - 1 - 2 - 4 - 8 - 16 - 32 - 64 - 128 - 256 - 512 - 768 - 1024 - 2048 - - 1024🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_kimi-k2-thinking-fp4_1k1k_ctx3_gen1_dep32_bs1024_eplb384_mtp0_con16384_ccb-NIXL.yaml` around lines 54 - 70, The cuda_graph_config.batch_sizes list contains a duplicated 1024 (after 2048) which breaks monotonicity; edit the batch_sizes sequence (key: cuda_graph_config.batch_sizes) and remove the redundant 1024 entry so the list is strictly non-decreasing (…512, 768, 1024, 2048) with no duplicate 1024 at the end.tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml-48-52 (1)
48-52:⚠️ Potential issue | 🟡 MinorFilename does not match configuration values (same as UCX variant).
The filename indicates
tep8andbs32, but the configuration hastensor_parallel_size: 4andmax_batch_size: 64. This is the same mismatch pattern seen in the UCX variant. Please verify and align the filename with the actual configuration values or vice versa.🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yaml` around lines 48 - 52, The filename indicates tep8 and bs32 but the YAML sets tensor_parallel_size: 4 and max_batch_size: 64; update either the filename to reflect tensor_parallel_size:4 and max_batch_size:64 or change the configuration values (tensor_parallel_size and max_batch_size) to match tep8 and bs32 respectively so the file name and content are consistent; verify the related UCX variant for the same pattern and ensure tensor_parallel_size, pipeline_parallel_size, and max_batch_size in this file match the naming convention used across tests.tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml-48-52 (1)
48-52:⚠️ Potential issue | 🟡 MinorFilename does not match configuration values (consistent with other FP8 variants).
All three Qwen3 FP8 configurations share the same mismatch: filename indicates
tep8andbs32, but actual values aretensor_parallel_size: 4andmax_batch_size: 64. This appears to be a systematic naming issue across FP8 Qwen3 configs. Consider batch-updating filenames to reflect actual configurations (e.g.,tep4_bs64) or correcting values if the filenames represent intended settings.🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yaml` around lines 48 - 52, Filename indicates tep8 and bs32 but the YAML sets tensor_parallel_size: 4 and max_batch_size: 64; update the file naming to reflect the actual configuration (e.g., rename files from tep8_bs32 to tep4_bs64) across all Qwen3 FP8 variants to match tensor_parallel_size and max_batch_size, or if the intended settings were tep8/bs32 instead, change the keys tensor_parallel_size and max_batch_size to 8 and 32 respectively; locate files by the presence of tensor_parallel_size, moe_expert_parallel_size, enable_attention_dp, pipeline_parallel_size, and max_batch_size and apply the consistent naming/value correction.tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml-48-52 (1)
48-52:⚠️ Potential issue | 🟡 MinorFilename does not match configuration values.
The filename indicates
tep8(tensor_parallel=8) andbs32(batch_size=32), but the actual configuration has:
tensor_parallel_size: 4(expected 8)max_batch_size: 64(expected 32)This mismatch can cause confusion when selecting or debugging test configurations. Please verify and either update the filename to reflect actual values or correct the configuration values to match the intended filename.
🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yaml` around lines 48 - 52, The YAML's metadata and filename disagree: the file name implies tensor_parallel_size=8 (tep8) and max_batch_size=32 (bs32) but the content sets tensor_parallel_size: 4 and max_batch_size: 64; update either the configuration or the filename so they match. Fix by changing the keys tensor_parallel_size and max_batch_size in this YAML to the intended values (set tensor_parallel_size: 8 and max_batch_size: 32) OR rename the file to reflect tensor_parallel_size: 4 and max_batch_size: 64 (adjust any references) so the filename and the config stay consistent.tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-NIXL.yaml-76-106 (1)
76-106:⚠️ Potential issue | 🟡 MinorAdd explicit
moe_config.backend: WIDEEPto thectxsection to matchgen.
gen.moe_config.backendis set toWIDEEP, butctxomitsmoe_configentirely. This pattern is consistent across all Qwen3 configurations. Either add an explicitctx.moe_config.backend: WIDEEPfor consistency, or document whetherctxintentionally inherits thegenconfiguration.🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-NIXL.yaml` around lines 76 - 106, The ctx section is missing an explicit moe_config.backend setting while gen sets moe_config.backend: WIDEEP; add moe_config: { backend: WIDEEP } (or equivalent YAML lines) under the ctx mapping so ctx.moe_config.backend is explicitly set to WIDEEP to match gen and avoid implicit inheritance assumptions; update the ctx block where keys like max_batch_size, max_num_tokens, etc. are defined and ensure the key name exactly matches moe_config and backend.tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml-59-73 (1)
59-73:⚠️ Potential issue | 🟡 MinorDuplicate batch size entry detected.
The
batch_sizeslist contains a duplicate entry for128(appears at both line 67 and line 73). This appears to be a copy-paste error that could cause issues with CUDA graph generation or at minimum create unnecessary redundancy.🔧 Proposed fix to remove duplicate
- 1024 - 2048 - - 128🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/wideep_deepseek-v32-fp4_8k1k_ctx2_gen1_dep32_bs128_eplb288_mtp3_con1024_ccb-DEFAULT.yaml` around lines 59 - 73, The batch_sizes list contains a duplicate value 128; open the YAML block labeled batch_sizes in the test config (the sequence shown under batch_sizes) and remove the redundant 128 entry so each batch size appears only once, ensuring the list contains unique values (e.g., keep one 128 and delete the second occurrence).tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml-48-52 (1)
48-52:⚠️ Potential issue | 🟡 MinorFilename does not match configuration parameters.
The filename indicates
tep8_bs32but the actual configuration has:
tensor_parallel_size: 4(expected 8 per filename)max_batch_size: 64(expected 32 per filename)Either rename the file to match the actual configuration or update the parameters to match the filename convention.
🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yaml` around lines 48 - 52, The filename indicates tensor_parallel_size 8 and batch size 32 but the YAML sets tensor_parallel_size: 4 and max_batch_size: 64; to fix, either rename the file to reflect the actual parameters or update the YAML values to match the filename convention (set tensor_parallel_size: 8 and max_batch_size: 32). Locate the keys tensor_parallel_size and max_batch_size in this YAML (and any related metadata or CI references) and make the values consistent with the filename, or change the filename to reflect the current values. Ensure any references elsewhere (scripts/tests) that expect tep8 or bs32 are updated accordingly.tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-UCX.yaml-48-52 (1)
48-52:⚠️ Potential issue | 🟡 MinorFilename does not match configuration parameters.
Similar to the NIXL variant, the filename indicates
tep8_bs32but the configuration has:
tensor_parallel_size: 4(expected 8)max_batch_size: 64(expected 32)This inconsistency may cause confusion when selecting or debugging test configurations.
🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed. In `@tests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-UCX.yaml` around lines 48 - 52, The YAML's filename claims tep8_bs32 but the config sets tensor_parallel_size: 4 and max_batch_size: 64; update one to match the other. Either change tensor_parallel_size to 8 and max_batch_size to 32, or rename the file to reflect tensor_parallel_size: 4 and max_batch_size: 64; ensure the file name and the keys tensor_parallel_size and max_batch_size are consistent so tests/selectors referencing tep8_bs32 match the actual configuration.
ℹ️ Review info
⚙️ Run configuration
Configuration used: Path: .coderabbit.yaml
Review profile: CHILL
Plan: Pro
Run ID: dc9117fb-df12-429e-a3ac-7570dcdc8b74
📒 Files selected for processing (143)
tests/integration/defs/perf/test_perf_sanity.pytests/integration/test_lists/qa/llm_perf_multinode.txttests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con1024_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep16_bs64_eplb0_mtp3_con512_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen1_dep32_bs16_eplb0_mtp3_con512_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con32_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx1_gen4_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP4_1k1k_ctx2_gen1_dep16_bs128_eplb0_mtp1_con2048_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con16_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con1_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con2_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con36_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con4_ccb-UCX.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-NIXL.yamltests/scripts/perf/disaggregated/Qwen3-235B-A22B-FP8_1k1k_ctx1_gen1_tep8_bs32_eplb0_mtp0_con8_ccb-UCX.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen13_tep4_bs1_eplb0_mtp0_con1-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen5_tep4_bs4_eplb0_mtp0_con4-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen6_tep8_bs1_eplb0_mtp3_con1-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen7_tep8_bs1_eplb0_mtp0_con1-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep4_bs2_eplb0_mtp0_con2-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp4_gen8_tep8_bs1_eplb0_mtp0_con1-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen11_tep4_bs2_eplb0_mtp0_con2-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen14_tep4_bs1_eplb0_mtp0_con1-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep16_bs1_eplb0_mtp3_con1-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_dep8_bs4_eplb0_mtp2_con4-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp0_con1-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs1_eplb0_mtp3_con1-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ctx1_pp8_gen1_tep8_bs2_eplb0_mtp3_con2-Default.yamltests/scripts/perf/disaggregated/deepseek-r1-fp4_128k8k_ct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PR_Github #38204 [ run ] completed with state
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Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com>
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/bot run --stage-list "" |
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PR_Github #38221 [ run ] triggered by Bot. Commit: |
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PR_Github #38221 [ run ] completed with state
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/bot run --stage-list "" |
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PR_Github #38350 [ run ] triggered by Bot. Commit: |
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/bot skip --comment "skip test as just modifying test conftest" |
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PR_Github #38361 [ skip ] triggered by Bot. Commit: |
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PR_Github #38361 [ skip ] completed with state |
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com> Signed-off-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster> Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com> Co-authored-by: Chenfei Zhang <chenfeiz@nvidia.com> Co-authored-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster>
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com> Signed-off-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster> Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com> Co-authored-by: Chenfei Zhang <chenfeiz@nvidia.com> Co-authored-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster>
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com> Signed-off-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster> Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com> Co-authored-by: Chenfei Zhang <chenfeiz@nvidia.com> Co-authored-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster>
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com> Signed-off-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster> Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com> Co-authored-by: Chenfei Zhang <chenfeiz@nvidia.com> Co-authored-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster>
Signed-off-by: Chenfei Zhang <chenfeiz@nvidia.com> Signed-off-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster> Signed-off-by: FredricZ-2007 <226039983+fredricz-20070104@users.noreply.github.com> Co-authored-by: Chenfei Zhang <chenfeiz@nvidia.com> Co-authored-by: Chenfei Zhang <chenfeiz@oci-hsg-cs-001-login-01.cm.cluster>
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