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[TRTLLM-13960][test] Offline equivalence test for sharding IR - #13963

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NVIDIA:mainfrom
nv-auto-deploy:gk/sharding-ir-equivalence-test
May 28, 2026
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[TRTLLM-13960][test] Offline equivalence test for sharding IR#13963
greg-kwasniewski1 merged 9 commits into
NVIDIA:mainfrom
nv-auto-deploy:gk/sharding-ir-equivalence-test

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@greg-kwasniewski1 greg-kwasniewski1 commented May 11, 2026

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Summary

Fixes #13960.

Adds an offline pytest that catches sharding-IR mistakes (bad hints, shape mismatches, numerical drift) by comparing a sharded prefill against the eager unsharded reference for a tiny, IR-onboarded HuggingFace model — without involving the full inference runtime (no PyExecutor, no cache init, no compile, no checkpoint download, no LLM_MODELS_ROOT).

Each invocation tests one model id (--sharding-ir-model-id <hf-id>). The test is skipped (not failed) when the option is absent so default pytest collection is unaffected. New model ids are added by extending _MODEL_SPECS in tests/unittest/auto_deploy/_utils_test/_sharding_ir_helpers.py.

The test workflow per rank:

  1. Instantiate a tiny (4-layer) IR model via transformers.<Config>() + the registered modeling_*_ir.py class. No factory, no filesystem.
  2. Re-init weights with a CPU torch.Generator seeded identically across ranks → bit-identical unsharded weights everywhere.
  3. Eager unsharded forward → reference logits.
  4. Snapshot state_dict().
  5. torch_export_to_gmapply_sharding_hints + strip_sharding_hints under world_size=4, tp_size=2, ep_size=2 (exercises both TP and EP — including the last-EP-rank conditional branch in MoEShardableNode.apply).
  6. gm_sharded.load_state_dict(snapshot, strict=False) fires the registered _load_hooks, slicing weights per rank.
  7. Sharded forward + torch.testing.assert_close against the reference with dtype-aware tolerance.

Files added

  • tests/unittest/auto_deploy/_utils_test/_sharding_ir_helpers.py — model registry, programmatic config + model build, deterministic random init, dtype-aware tolerance.
  • tests/unittest/auto_deploy/multigpu/transformations/library/conftest.py--sharding-ir-model-id pytest option + sharding_ir_model_id fixture (skips when absent).
  • tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py — the test, plus a module-level sys.path scrub that removes any uncompiled tensorrt_llm/ tree (no-op in single-tree CI; matters only for worktree-based dev setups).

Test plan

  • Test passes locally on 4×H100 for Qwen/Qwen3-8B: pytest auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py --sharding-ir-model-id Qwen/Qwen3-8B (~28s).
  • Test is skipped (not failed) when --sharding-ir-model-id is absent.
  • CI: green on the targeted AutoDeploy stages (triggered after PR opens).

Refs: #13960

Summary by CodeRabbit

  • Tests
    • Added comprehensive test infrastructure for validating sharding equivalence across multi-GPU distributed configurations, ensuring numerical correctness between sharded and eager model execution.
    • Added pytest configuration and fixtures to support parameterized IR model testing with environment variable control.

Review Change Stack

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/bot run --stage-list "A10-Build_Docs, A10-PackageSanityCheck-PY310-UB2204, A100X-PackageSanityCheck-PY312-UB2404, A30-AutoDeploy-1, H100_PCIe-AutoDeploy-1, DGX_B200-AutoDeploy-1, A100X-PyTorch-1, DGX_H100-4_GPUs-AutoDeploy-1, DGX_B200-4_GPUs-AutoDeploy-1"

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📝 Walkthrough

Walkthrough

This PR introduces an offline equivalence test for AutoDeploy's sharding IR, enabling rapid iteration on IR correctness without full runtime compilation. It provides helper utilities for deterministic model construction, pytest infrastructure for test configuration via command-line options, and a multi-GPU worker that validates numerical equivalence between eager unsharded and sharded prefill forward passes.

Changes

Sharding IR Equivalence Testing

Layer / File(s) Summary
Helper Utilities & Model Registry
tests/unittest/auto_deploy/_utils_test/_sharding_ir_helpers.py
Defines _TOLERANCES dict for dtype-specific numerical tolerances, enable_ir_models() to set AD_USE_IR_MODELS=1, IRModelSpec dataclass and _MODEL_SPECS registry with Qwen3 entry, and utility functions: lookup_spec() to retrieve specs by model id, build_ir_model() to instantiate tiny models from spec, extract_logits() to normalize output formats, build_random_prefill_inputs() to generate deterministic seeded inputs, and random_init_with_seed() to reinitialize model weights using CPU RNG for rank-independent initialization.
Pytest Configuration & Fixtures
tests/unittest/auto_deploy/multigpu/transformations/library/conftest.py
Registers --sharding-ir-model-id command-line option via pytest_addoption() and provides sharding_ir_model_id fixture that reads the option and skips tests when absent.
Multi-GPU Equivalence Test
tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py
Implements offline equivalence validation: scrubs unbuilt tensorrt_llm paths from sys.path at import time, defines deterministic sharding config (WORLD_SIZE=4, TP_SIZE=2, EP_SIZE=2), builds seeded tiny model via helper registry, computes eager unsharded logits reference, exports to FX graph module, applies InferenceOptimizer with sharding and weight-load hint transforms, loads unsharded snapshot into sharded graph using rank-aware load hooks, runs sharded forward, asserts numerical equality via tolerance_for(), captures per-rank exceptions to /tmp/sharding_ir_equiv_rank{rank}.log, and skips test if fewer than WORLD_SIZE GPUs available.

Estimated code review effort

🎯 4 (Complex) | ⏱️ ~45 minutes

🚥 Pre-merge checks | ✅ 5
✅ Passed checks (5 passed)
Check name Status Explanation
Title check ✅ Passed Title clearly and specifically summarizes the main change: adding an offline equivalence test for sharding IR, matching the primary objective of the PR.
Linked Issues check ✅ Passed All objectives from issue #13960 are met: tiny deterministic model build, weight loading stage execution, sharded vs unsharded comparison, dtype-aware tolerances, per-model invocation, and skip-by-default behavior implemented.
Out of Scope Changes check ✅ Passed All three new files (helper utilities, pytest conftest, and equivalence test) are directly aligned with the stated objectives and requirements of issue #13960. No out-of-scope changes detected.
Docstring Coverage ✅ Passed Docstring coverage is 84.62% which is sufficient. The required threshold is 80.00%.
Description check ✅ Passed PR description provides comprehensive overview of changes, test workflow, and verification strategy with clear objectives and test plan.

✏️ Tip: You can configure your own custom pre-merge checks in the settings.

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  • Create PR with unit tests

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🧹 Nitpick comments (3)
tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py (2)

209-214: 💤 Low value

Consider narrowing exception scope to Exception.

Catching BaseException includes KeyboardInterrupt and SystemExit, which could delay user interrupts. Since the purpose is debugging worker failures, Exception would be more appropriate while still capturing runtime errors.

♻️ Narrow exception scope
-    except BaseException:
+    except Exception:
         with open(f"/tmp/sharding_ir_equiv_rank{rank}.log", "w") as f:
             f.write(traceback.format_exc())
         raise

Regarding the static analysis hint (S108) about /tmp usage: this is acceptable for test debugging logs, especially since the path is per-rank unique and the test runs in controlled environments.

🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In
`@tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py`
around lines 209 - 214, Replace the overly broad "except BaseException" that
wraps the call to _run_equivalence_job_impl(model_id, rank, world_size) with
"except Exception" so that KeyboardInterrupt/SystemExit are not swallowed; keep
the existing traceback logging to /tmp/sharding_ir_equiv_rank{rank}.log and
re-raise after logging as currently implemented.

182-183: 💤 Low value

Missing keys are intentionally ignored.

The strict=False call with only unexpected checked suggests missing keys are expected when the sharded model structure differs. If this is intentional (e.g., some buffers not needed post-sharding), consider adding a brief comment clarifying this design choice.

📝 Optional: Add clarifying comment
     # ------------------------------------------------------------------
     # 4. Load the unsharded snapshot into the sharded graph. The hooks
     #    registered by apply_sharding_hints fire here, slicing each
     #    parameter to the per-rank shard before assignment.
     # ------------------------------------------------------------------
-    _, unexpected = gm_sharded.load_state_dict(sd_unsharded, strict=False)
+    # Missing keys are expected: some buffers/parameters may not exist in the
+    # sharded graph after transformation. Only unexpected keys indicate a problem.
+    missing, unexpected = gm_sharded.load_state_dict(sd_unsharded, strict=False)
     assert not unexpected, f"Unexpected keys when loading sharded state_dict: {unexpected[:5]}"
🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In
`@tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py`
around lines 182 - 183, Add a clarifying comment explaining that missing keys
from gm_sharded.load_state_dict(sd_unsharded, strict=False) are intentionally
ignored because the sharded model has a different structure and some
parameters/buffers from the unsharded state_dict are not required post-sharding;
reference the call to gm_sharded.load_state_dict(..., strict=False) and the
check of unexpected to indicate this design choice so future readers understand
why only unexpected keys are asserted and missing keys are allowed.
tests/unittest/auto_deploy/_utils_test/_sharding_ir_helpers.py (1)

25-25: 💤 Low value

Consider using Python 3.10+ built-in generics for type hints.

Per coding guidelines, prefer dict, tuple over typing.Dict, typing.Tuple in Python 3.10+ codebases.

♻️ Optional: Use built-in generics
-from typing import Any, Dict, Tuple
+from typing import Any

 import torch
 import torch.nn as nn

 # Default per-dtype tolerance for assert_close...
-_TOLERANCES: Dict[torch.dtype, Tuple[float, float]] = {
+_TOLERANCES: dict[torch.dtype, tuple[float, float]] = {
     torch.bfloat16: (5e-2, 5e-2),

And similarly for other usages (tolerance_for return type, IRModelSpec.tiny_kwargs).

🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@tests/unittest/auto_deploy/_utils_test/_sharding_ir_helpers.py` at line 25,
Replace typing.Dict and typing.Tuple usage with Python 3.10+ built-in generics
and remove them from the import: keep "from typing import Any" and delete "Dict,
Tuple" from the import line; then update annotations that reference Dict and
Tuple (e.g., the return type of tolerance_for and the type of
IRModelSpec.tiny_kwargs) to use dict[...] and tuple[...] respectively so only
built-in generics are used.
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

Nitpick comments:
In `@tests/unittest/auto_deploy/_utils_test/_sharding_ir_helpers.py`:
- Line 25: Replace typing.Dict and typing.Tuple usage with Python 3.10+ built-in
generics and remove them from the import: keep "from typing import Any" and
delete "Dict, Tuple" from the import line; then update annotations that
reference Dict and Tuple (e.g., the return type of tolerance_for and the type of
IRModelSpec.tiny_kwargs) to use dict[...] and tuple[...] respectively so only
built-in generics are used.

In
`@tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py`:
- Around line 209-214: Replace the overly broad "except BaseException" that
wraps the call to _run_equivalence_job_impl(model_id, rank, world_size) with
"except Exception" so that KeyboardInterrupt/SystemExit are not swallowed; keep
the existing traceback logging to /tmp/sharding_ir_equiv_rank{rank}.log and
re-raise after logging as currently implemented.
- Around line 182-183: Add a clarifying comment explaining that missing keys
from gm_sharded.load_state_dict(sd_unsharded, strict=False) are intentionally
ignored because the sharded model has a different structure and some
parameters/buffers from the unsharded state_dict are not required post-sharding;
reference the call to gm_sharded.load_state_dict(..., strict=False) and the
check of unexpected to indicate this design choice so future readers understand
why only unexpected keys are asserted and missing keys are allowed.

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📥 Commits

Reviewing files that changed from the base of the PR and between f18fc4f and 66527b6.

📒 Files selected for processing (3)
  • tests/unittest/auto_deploy/_utils_test/_sharding_ir_helpers.py
  • tests/unittest/auto_deploy/multigpu/transformations/library/conftest.py
  • tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py

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Looks good, just one nit:

Can we rename the _utils_test to utils? And rename the _sharding_ir_helpers.py to sharding_ir_helpers.py?

Comment thread tests/unittest/auto_deploy/utils/sharding_ir_helpers.py Outdated
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/bot run --reuse-test

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/bot run --extra-stage "DGX_B200-4_GPUs-AutoDeploy-1, DGX_H100-4_GPUs-AutoDeploy-1"

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greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 18, 2026
…ir_helpers.py to sharding_ir_helpers.py

Address review feedback on PR NVIDIA#13963:
- tests/unittest/auto_deploy/_utils_test/ -> tests/unittest/auto_deploy/utils/
- _sharding_ir_helpers.py -> sharding_ir_helpers.py (the file added by this PR)

Other private-prefixed helpers inside the directory (_custom_op_utils.py,
_dist_test_utils.py, _graph_test_helpers.py, _model_test_utils.py,
_torch_test_utils.py) are kept as-is since they are pre-existing and
outside this PR's scope.

References updated:
- tests/unittest/pytest.ini: pythonpath entry
- tests/unittest/auto_deploy/standalone/test_standalone_package.py: PYTHONPATH env
- tests/unittest/auto_deploy/multigpu/transformations/library/test_sharding_ir_equivalence.py: sys.path insertion, docstring reference, import statement

The 81 bare 'from _custom_op_utils import ...' style imports across the
test suite continue to work because the directory rename is reflected
in pytest.ini's pythonpath.

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
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greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 28, 2026
Add explicit sharding-hint ops to the canonical Granite modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ("mha" / "mlp").
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type="mha") on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic is untouched: Granite's embedding_multiplier, residual_multiplier,
attention_multiplier (used as the attention scaling kwarg), and logits_scaling
are all preserved.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Granite config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 28, 2026
Add explicit sharding-hint ops to the canonical HunYuan Dense V1 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic is untouched: HunYuan's QK-normalization (RMSNorm on Q/K applied
after RoPE), Dynamic NTK-Alpha RoPE scaling, and SiLU-gated MLP are preserved.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
HunYuan Dense config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 28, 2026
Add explicit sharding-hint ops to the canonical Seed-OSS modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic (GQA semantics, attention_bias / attention_out_bias asymmetry,
standard RoPE, RMSNorm, residuals) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Seed-OSS config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
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greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 28, 2026
Add explicit sharding-hint ops to the canonical Gemma 2 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic is untouched: Gemma 2's (1+weight) RMSNorm scaling, 4 layer norms
per decoder layer, attention logit softcapping, alternating sliding window /
full attention, custom query_pre_attn_scalar attention scaling, embedding
sqrt(hidden_size) normalization, and final logit softcapping are all preserved.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Gemma 2 config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
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greg-kwasniewski1 merged commit 0715e15 into NVIDIA:main May 28, 2026
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greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 29, 2026
Add explicit sharding-hint ops to the canonical Cohere/Cohere2 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic (parallel attention + MLP pattern, CohereLayerNorm, interleaved
RoPE via torch_rope_with_qk_interleaving, Cohere2 sliding window / conditional
RoPE, optional CohereLayerNorm-based Q/K-norm applied before RoPE on the
per-head head_dim axis) is untouched. Q/K-norm weights live on head_dim, which
is not a TP-sharded dim, so they remain replicated and require no hints.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Cohere config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 29, 2026
Add explicit sharding-hint ops to the canonical EXAONE modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/out and MLP projections
  (c_fc_0 / c_fc_1 / c_proj), with tp_mode (colwise / rowwise),
  tp_min_local_shape=head_dim on Q/K/V (GQA-safe), and layer_type
  ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise out_proj and MLP c_proj.

Model logic (EXAONE-specific naming, llama3-style RoPE scaling, bundled
ExaoneConfig, ExaoneAttentionBlock checkpoint-key wrapper) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
EXAONE config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 29, 2026
Add explicit sharding-hint ops to the canonical Llama 3 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic (Llama 3 / 3.1 / 3.2 / 3.3 GQA, SwiGLU, RMSNorm, RoPE with
llama3-style scaling via init_rope_inv_freq) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Llama 3 config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 29, 2026
Add explicit sharding-hint ops to the canonical DeepSeek-V2 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q_a/q_b/q, kv_a, o_proj,
  MLP gate/up/down, and shared-expert MLP, with tp_mode (none / colwise /
  rowwise) and layer_type ('mla' / 'mlp' / 'moe').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mla') on the
  Q reshape and post-attention output reshape whose head-count dim scales
  with TP.
- torch_mla called with enable_sharding=True, layer_type='mla' so
  _apply_hint_mla shards kv_b_proj.weight column-wise per head.
- torch.ops.auto_deploy.all_reduce after rowwise o_proj (layer_type='mla')
  and a single all_reduce after the (routed + shared) MoE merge point
  (layer_type='moe'). Shared expert MLP constructed with
  add_all_reduce=False, layer_type='moe' so its closing all_reduce is
  deferred.
- torch_moe carries layer_type='moe'.

Model logic (MLA semantics, softmax-based router gate, RMSNorm, residuals)
is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
DeepSeek-V2 config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 29, 2026
Add explicit sharding-hint ops to the canonical GLM4 MoE modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o, MLP gate/up/down
  and shared-expert MLP, with tp_mode (colwise / rowwise),
  tp_min_local_shape=head_dim on K/V (GQA-safe), and layer_type
  ('mha' / 'mlp' / 'moe').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after rowwise attn o_proj (layer_type=
  'mha') and a single all_reduce after the (routed + shared) MoE merge
  point (layer_type='moe'). Shared expert MLP constructed with
  add_all_reduce=False, layer_type='moe' so its closing all_reduce is
  deferred.
- torch_moe carries layer_type='moe'. The fused noaux_tc_op router gate
  is TP-replicated and kept verbatim.

Model logic (GQA + partial RoPE, QK norm, RMSNorm, residuals) is
untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
GLM4 MoE config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 29, 2026
Add explicit sharding-hint ops to the canonical Qwen3 MoE modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and dense MLP
  gate/up/down, with tp_mode (colwise / rowwise),
  tp_min_local_shape=head_dim on K/V (GQA-safe), and layer_type
  ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after rowwise attn o_proj
  (layer_type='mha'), after rowwise MLP down (layer_type='mlp'), and
  after torch_moe (layer_type='moe'). No shared expert in Qwen3 MoE, so
  a single MoE all_reduce suffices.
- torch_moe carries layer_type='moe'. The plain nn.Linear router gate is
  TP-replicated and kept verbatim.

Model logic (GQA, per-head Q/K RMSNorm, RoPE, residuals) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Qwen3 MoE config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 29, 2026
Add explicit sharding-hint ops to the canonical Llama 4 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP
  gate/up/down (including the shared expert), with tp_mode (colwise /
  rowwise), tp_min_local_shape=head_dim on K/V (GQA-safe), and layer_type
  ('mha' / 'mlp' / 'moe').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after rowwise attn o_proj
  (layer_type='mha'), after rowwise MLP down on dense layers
  (layer_type='mlp'), and a single all_reduce after the (routed + shared)
  MoE merge point (layer_type='moe'). Shared expert MLP constructed with
  add_all_reduce=False, layer_type='moe' so its closing all_reduce is
  deferred.
- The routed MoE remains expressed as stacked-weight torch.bmm; the
  pattern_matcher stage rewrites it into torch_moe (which carries
  layer_type='moe' by default) before sharding runs. The sigmoid router
  is a plain nn.Linear and stays TP-replicated.

Model logic (GQA + complex RoPE, NoPE layers, L2 QK norm, attn
temperature tuning, residuals) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Llama 4 config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical Gemma modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ("mha" / "mlp").
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type="mha") on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic is untouched: Gemma's (1+weight) RMSNorm load hook, the
embedding sqrt(hidden_size) normalization, the explicit attention_mask
path with is_causal=False, and the parameter / module hierarchy all
remain identical to the legacy file.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Gemma config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical Mistral modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ("mha" / "mlp").
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type="mha") on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic is untouched: sliding-window attention, is_causal=True
torch_attention call, parameter / module hierarchy, RMSNorm semantics
all remain identical to the legacy file.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Mistral config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical Granite modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ("mha" / "mlp").
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type="mha") on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic is untouched: Granite's embedding_multiplier, residual_multiplier,
attention_multiplier (used as the attention scaling kwarg), and logits_scaling
are all preserved.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Granite config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical HunYuan Dense V1 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic is untouched: HunYuan's QK-normalization (RMSNorm on Q/K applied
after RoPE), Dynamic NTK-Alpha RoPE scaling, and SiLU-gated MLP are preserved.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
HunYuan Dense config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical Seed-OSS modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic (GQA semantics, attention_bias / attention_out_bias asymmetry,
standard RoPE, RMSNorm, residuals) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Seed-OSS config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical Gemma 2 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic is untouched: Gemma 2's (1+weight) RMSNorm scaling, 4 layer norms
per decoder layer, attention logit softcapping, alternating sliding window /
full attention, custom query_pre_attn_scalar attention scaling, embedding
sqrt(hidden_size) normalization, and final logit softcapping are all preserved.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Gemma 2 config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical Cohere/Cohere2 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic (parallel attention + MLP pattern, CohereLayerNorm, interleaved
RoPE via torch_rope_with_qk_interleaving, Cohere2 sliding window / conditional
RoPE, optional CohereLayerNorm-based Q/K-norm applied before RoPE on the
per-head head_dim axis) is untouched. Q/K-norm weights live on head_dim, which
is not a TP-sharded dim, so they remain replicated and require no hints.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Cohere config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical EXAONE modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/out and MLP projections
  (c_fc_0 / c_fc_1 / c_proj), with tp_mode (colwise / rowwise),
  tp_min_local_shape=head_dim on Q/K/V (GQA-safe), and layer_type
  ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise out_proj and MLP c_proj.

Model logic (EXAONE-specific naming, llama3-style RoPE scaling, bundled
ExaoneConfig, ExaoneAttentionBlock checkpoint-key wrapper) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
EXAONE config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical Llama 3 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP projections,
  with tp_mode (colwise / rowwise), tp_min_local_shape=head_dim on Q/K/V
  (GQA-safe), and layer_type ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after the rowwise o_proj and MLP down_proj.

Model logic (Llama 3 / 3.1 / 3.2 / 3.3 GQA, SwiGLU, RMSNorm, RoPE with
llama3-style scaling via init_rope_inv_freq) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Llama 3 config across tp-only / ep-only / tep / attn-dp parallelism configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical DeepSeek-V2 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q_a/q_b/q, kv_a, o_proj,
  MLP gate/up/down, and shared-expert MLP, with tp_mode (none / colwise /
  rowwise) and layer_type ('mla' / 'mlp' / 'moe').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mla') on the
  Q reshape and post-attention output reshape whose head-count dim scales
  with TP.
- torch_mla called with enable_sharding=True, layer_type='mla' so
  _apply_hint_mla shards kv_b_proj.weight column-wise per head.
- torch.ops.auto_deploy.all_reduce after rowwise o_proj (layer_type='mla')
  and a single all_reduce after the (routed + shared) MoE merge point
  (layer_type='moe'). Shared expert MLP constructed with
  add_all_reduce=False, layer_type='moe' so its closing all_reduce is
  deferred.
- torch_moe carries layer_type='moe'.

Model logic (MLA semantics, softmax-based router gate, RMSNorm, residuals)
is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
DeepSeek-V2 config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical GLM4 MoE modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o, MLP gate/up/down
  and shared-expert MLP, with tp_mode (colwise / rowwise),
  tp_min_local_shape=head_dim on K/V (GQA-safe), and layer_type
  ('mha' / 'mlp' / 'moe').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after rowwise attn o_proj (layer_type=
  'mha') and a single all_reduce after the (routed + shared) MoE merge
  point (layer_type='moe'). Shared expert MLP constructed with
  add_all_reduce=False, layer_type='moe' so its closing all_reduce is
  deferred.
- torch_moe carries layer_type='moe'. The fused noaux_tc_op router gate
  is TP-replicated and kept verbatim.

Model logic (GQA + partial RoPE, QK norm, RMSNorm, residuals) is
untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
GLM4 MoE config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical Qwen3 MoE modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and dense MLP
  gate/up/down, with tp_mode (colwise / rowwise),
  tp_min_local_shape=head_dim on K/V (GQA-safe), and layer_type
  ('mha' / 'mlp').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after rowwise attn o_proj
  (layer_type='mha'), after rowwise MLP down (layer_type='mlp'), and
  after torch_moe (layer_type='moe'). No shared expert in Qwen3 MoE, so
  a single MoE all_reduce suffices.
- torch_moe carries layer_type='moe'. The plain nn.Linear router gate is
  TP-replicated and kept verbatim.

Model logic (GQA, per-head Q/K RMSNorm, RoPE, residuals) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Qwen3 MoE config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
greg-kwasniewski1 added a commit to nv-auto-deploy/TensorRT-LLM that referenced this pull request May 30, 2026
Add explicit sharding-hint ops to the canonical Llama 4 modeling file:
- torch.ops.auto_deploy.torch_linear_simple for q/k/v/o and MLP
  gate/up/down (including the shared expert), with tp_mode (colwise /
  rowwise), tp_min_local_shape=head_dim on K/V (GQA-safe), and layer_type
  ('mha' / 'mlp' / 'moe').
- torch.ops.auto_deploy.view (tp_scaled_dim=2, layer_type='mha') on
  Q/K/V/attn_output reshapes whose head-count dim scales with TP.
- torch.ops.auto_deploy.all_reduce after rowwise attn o_proj
  (layer_type='mha'), after rowwise MLP down on dense layers
  (layer_type='mlp'), and a single all_reduce after the (routed + shared)
  MoE merge point (layer_type='moe'). Shared expert MLP constructed with
  add_all_reduce=False, layer_type='moe' so its closing all_reduce is
  deferred.
- The routed MoE remains expressed as stacked-weight torch.bmm; the
  pattern_matcher stage rewrites it into torch_moe (which carries
  layer_type='moe' by default) before sharding runs. The sigmoid router
  is a plain nn.Linear and stays TP-replicated.

Model logic (GQA + complex RoPE, NoPE layers, L2 QK norm, attn
temperature tuning, residuals) is untouched.

Validated via the offline equivalence test from NVIDIA#13963 on a tiny 4-layer
Llama 4 config across tp-only / ep-only / tep / attn-dp parallelism
configs.

Refs NVIDIA#14642

Signed-off-by: greg-kwasniewski1 <213329731+greg-kwasniewski1@users.noreply.github.com>
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[AutoDeploy][Feature]: Offline equivalence test for sharding IR

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