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[https://nvbugs/6390307][fix] Update trtllm-gen FMHA JIT libraries #15974

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Merged
bobboli merged 1 commit into from
Jul 9, 2026
Merged

[https://nvbugs/6390307][fix] Update trtllm-gen FMHA JIT libraries #15974

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4 changes: 2 additions & 2 deletions cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/lib/aarch64-linux-gnu/libTrtLlmGen.a
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4 changes: 2 additions & 2 deletions cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/lib/aarch64-linux-gnu/libTrtLlmGenFmhaLib.a
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4 changes: 2 additions & 2 deletions cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/lib/x86_64-linux-gnu/libTrtLlmGen.a
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4 changes: 2 additions & 2 deletions cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/lib/x86_64-linux-gnu/libTrtLlmGenFmhaLib.a
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3 changes: 3 additions & 0 deletions cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/trtllmGen_fmha_export/FmhaAutoTuner.h
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Original file line number Diff line number Diff line change
Expand Up @@ -66,6 +66,9 @@ class FmhaAutoTuner {
// Select the MLA generation kernel.
void selectMlaGenerationKernel();

// Select the grouped Q64 MLA generation kernel when the capability predicate matches.
void selectGroupedMlaGenerationKernel();

private:
// computeNumCtas uses the same cluster occupancy helper as enableCgaReduction.
friend std::tuple<int32_t, int32_t, int32_t> computeNumCtas(FmhaOptions& options,
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10 changes: 7 additions & 3 deletions cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/trtllmGen_fmha_export/FmhaOptions.h
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Expand Up @@ -50,6 +50,8 @@ struct FmhaOptions : public KernelConfigBase {
int32_t mDsv4ScaleBufM{0};
// Enable the auto tuner.
bool mEnablesAutoTuner{false};
// Select the grouped MLA generation kernel in the auto tuner.
bool mSelectsGroupedMla{false};
// Enable the BF16Q+FP8KV K-only transform path. Disabled by default.
bool mEnablesBf16QFp8KvKOnlyTransform{false};
// Whether is exporting cubin.
Expand Down Expand Up @@ -133,6 +135,7 @@ struct FmhaOptions : public KernelConfigBase {
TO_JSON(mDryRun);
TO_JSON(mDsv4ScaleBufM);
TO_JSON(mEnablesAutoTuner);
TO_JSON(mSelectsGroupedMla);
TO_JSON(mEnablesBf16QFp8KvKOnlyTransform);
TO_JSON(mIsExportingCubin);
TO_JSON(mIsTracing);
Expand Down Expand Up @@ -529,12 +532,13 @@ inline void checkFmhaOptions(FmhaOptions const& options,
}
}

// The mGroupsTokensHeadsQ only works with GQA generation kernels.
// groupsTokensHeadsQ is allowed for GQA gen and explicitly selected MLA gen kernels.
if (options.mGroupsTokensHeadsQ) {
TLLM_CHECK_ERROR(!isContextKernel(options.mFmhaKernelType),
"mGroupsTokensHeadsQ should only be enabled for generation kernels.");
TLLM_CHECK_ERROR(!options.mIsMlaGen,
"MLA gen kernels haven't supported mGroupsTokensHeadsQ yet.");
TLLM_CHECK_ERROR(!options.mIsMlaGen
|| options.mSelectsGroupedMla,
"MLA generation with mGroupsTokensHeadsQ requires mSelectsGroupedMla.");
}


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14 changes: 10 additions & 4 deletions cpp/tensorrt_llm/kernels/trtllmGenKernels/fmha/trtllmGen_fmha_export/KernelTraits.h
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Expand Up @@ -207,8 +207,14 @@ struct KernelConfig : public KernelConfigBase {

// Set numStagesQ for headDim > 128 kernels.
if (mNumInstsQ * mNumInstsKv == 1) {
TLLM_CHECK_INFO(mTileSizeQ == 64 || (mHeadDimQk > 128 && mHeadDimV > 128),
"Consider using numInstsQ = 2 for better performance.");
// Whether the kernel is a generation kernel that skips softmax when possible.
bool isGenerationSkipsSoftmax =
options.mSkipsSoftmaxWhenPossible && !isContextKernel(options.mFmhaKernelType);
// Skip the check for skipsSoftmax generation kernels because this is intended.
if (!isGenerationSkipsSoftmax) {
TLLM_CHECK_INFO(mTileSizeQ == 64 || (mHeadDimQk > 128 && mHeadDimV > 128),
"Consider using numInstsQ = 2 for better performance.");
}
// There is no enough shared memory for 2 stages when the headDim is not split into multiple
// stages.
if (mHeadDimPerStageKv == 0 && keepsMmaAbForDsMlaGen) {
Expand Down Expand Up @@ -748,8 +754,8 @@ struct KernelTraits : public KernelConfig, public MmaTraits {
mSeparateSmemKv = true;
}

// The tile size for the correction step.
mCorrTileSize = std::min(mValidTilePvN, 64);
// Use the largest power-of-two tile up to 64 that exactly divides the correction width.
mCorrTileSize = std::gcd(mValidTilePvN, 64);

// The number of keys per tile.
mNumKeysPerTile = std::min(mNumTokensPerPage, mTileSizeKv);
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4 changes: 0 additions & 4 deletions tests/integration/test_lists/waives.txt
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Expand Up @@ -111,7 +111,6 @@ accuracy/test_llm_api_pytorch.py::TestQwen3NextInstruct::test_bf16_4gpu[tep4] SK
accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_fp8[latency] SKIP (https://nvbugs/6177390)
accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_fp8[throughput_latency] SKIP (https://nvbugs/6177390)
accuracy/test_llm_api_pytorch.py::TestQwen3_235B_A22B::test_nvfp4[latency_moe_trtllm] SKIP (https://nvbugs/6402009)
accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.9-fp8kv=False] SKIP (https://nvbugs/6388157)
accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16[tp1-TRTLLM] SKIP (https://nvbugs/6428008)
accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_bf16_mtp SKIP (https://nvbugs/6206179)
accuracy/test_llm_api_pytorch.py::TestQwen3_5_35B_A3B::test_fp8[enable_block_reuse=True] SKIP (https://nvbugs/6210714)
Expand Down Expand Up @@ -223,9 +222,6 @@ full:B300/accuracy/test_llm_api_pytorch_multimodal.py::TestQwen2_5_VL_7B::test_a
full:B300/disaggregated/test_disaggregated.py::test_disaggregated_ctxpp2_genpp2[TinyLlama-1.1B-Chat-v1.0] SKIP (https://nvbugs/6322073)
full:B300/test_e2e.py::test_qwen_e2e_cpprunner_large_new_tokens[DeepSeek-R1-Distill-Qwen-1.5B-DeepSeek-R1-Distill-Qwen-1.5B] SKIP (https://nvbugs/6414760)
full:B300/unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "TRTLLM" SKIP (https://nvbugs/6165866)
full:DGX_B200/accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.5-fp8kv=False] SKIP (https://nvbugs/6390307)
full:DGX_B200/accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.5-fp8kv=True] SKIP (https://nvbugs/6390307)
full:DGX_B200/accuracy/test_llm_api_pytorch.py::TestQwen3_30B_A3B_Instruct_2507::test_skip_softmax_attention_4gpus[target_sparsity_0.9-fp8kv=True] SKIP (https://nvbugs/6390307)
full:DGX_B200/unittest/_torch/modules/moe/test_moe_backend.py::test_moe_backend -k "TRTLLM" SKIP (https://nvbugs/6165866)
full:DGX_B200/unittest/auto_deploy/multigpu/custom_ops/test_ad_dist_strategies.py::test_allreduce_strategies[MIN_LATENCY] SKIP (https://nvbugs/6403920)
full:DGX_B200/unittest/auto_deploy/multigpu/custom_ops/test_ad_dist_strategies.py::test_allreduce_strategies[ONESHOT] SKIP (https://nvbugs/6403920)
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