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[https://nvbugs/6329052][fix] Change the config for DSV3 disagg conditional test - #16528

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Shixiaowei02 merged 1 commit into
NVIDIA:mainfrom
Shixiaowei02:fix/bug6329052-deepseek-v3-lite-disagg-conditional
Jul 17, 2026
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[https://nvbugs/6329052][fix] Change the config for DSV3 disagg conditional test#16528
Shixiaowei02 merged 1 commit into
NVIDIA:mainfrom
Shixiaowei02:fix/bug6329052-deepseek-v3-lite-disagg-conditional

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@Shixiaowei02 Shixiaowei02 commented Jul 17, 2026

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Description

This pull request updates the configuration for DeepSeek-V3-Lite and adjusts test waivers for related disaggregated tests. The main changes are the addition of new model configuration options and the removal of test waivers for specific DeepSeek-V3-Lite disaggregated tests, likely reflecting improved support or bug fixes.

Configuration updates:

  • Updated disagg_config_cache_reuse_deepseek_v3.yaml to set attn_backend to FLASHINFER and added model_kwargs with num_hidden_layers: 4 for the DeepSeek-V3-Lite model.

Test waiver updates:

  • Removed waivers for the test test_workers_conditional_disaggregation_deepseek_v3_lite_bf16[DeepSeek-V3-Lite-bf16] from both A100 and L40S test lists, indicating this test is no longer being skipped due to bug 6329052. [1] [2]

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Summary by CodeRabbit

  • Tests
    • Updated DeepSeek-V3-Lite integration settings to use the FLASHINFER attention backend and a four-layer model configuration.
    • Removed skip waivers for DeepSeek-V3-Lite worker tests on A100 and L40S hardware, allowing these tests to run normally.

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coderabbitai Bot commented Jul 17, 2026

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Review Change Stack

📝 Walkthrough

Walkthrough

The DeepSeek-V3-Lite disaggregated test configuration now uses FLASHINFER with four hidden layers. Its A100 and L40S test waive entries are removed.

Changes

DeepSeek disaggregation test enablement

Layer / File(s) Summary
Configure and enable DeepSeek-V3-Lite coverage
tests/integration/defs/disaggregated/test_configs/disagg_config_cache_reuse_deepseek_v3.yaml, tests/integration/test_lists/waives.txt
The configuration adds FLASHINFER attention and four hidden layers, and removes the matching A100 and L40S waive entries.

Estimated code review effort: 1 (Trivial) | ~5 minutes

Suggested reviewers: yuxianq

🚥 Pre-merge checks | ✅ 5
✅ Passed checks (5 passed)
Check name Status Explanation
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
Title check ✅ Passed The title matches the main change and includes a valid bug reference and fix type.
Description check ✅ Passed The description covers the issue, solution, and checklist; only Test Coverage is left empty.
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🧪 Generate unit tests (beta)
  • Create PR with unit tests

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/bot run --disable-fail-fast --stage-list "DGX_H100-4_GPUs-PyTorch-DeepSeek-1"

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PR_Github #59913 [ run ] triggered by Bot. Commit: 28b86d0 Link to invocation

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PR_Github #59913 [ run ] completed with state FAILURE. Commit: 28b86d0
/LLM/main/L0_MergeRequest_PR pipeline #48315 (Partly Tested) completed with status: 'ABORTED'

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⚠️ Action Required:

  • Please check the failed tests and fix your PR
  • If you cannot view the failures, ask the CI triggerer to share details
  • Once fixed, request an NVIDIA team member to trigger CI again

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…V3-Lite disagg conditional test

test_workers_conditional_disaggregation_deepseek_v3_lite_bf16 failed on
pre-Hopper GPUs:
- L40S (nvbugs/6329052): the full ~50GB bf16 weights do not fit in 44GB,
  so the model OOMs during executor creation.
- A100 / SM80 (nvbugs/6274934): the TRTLLM MLA FMHA kernel is unavailable,
  AttentionOp::initialize aborts and the disagg server never becomes ready
  (300s timeout).

Set attn_backend=FLASHINFER (MLA runs on SM80/SM89) and
model_kwargs.num_hidden_layers=4 (shrinks the model so it fits) in the
disagg conditional cache-reuse config, and drop the now-obsolete A100/L40S
waives. The QA functional test entry is kept so cross-GPU coverage is
retained.

Signed-off-by: Xiaowei Shi <39303645+Shixiaowei02@users.noreply.github.com>
@Shixiaowei02
Shixiaowei02 force-pushed the fix/bug6329052-deepseek-v3-lite-disagg-conditional branch from 28b86d0 to 31c45b9 Compare July 17, 2026 07:10
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/bot run --disable-fail-fast --stage-list "DGX_H100-4_GPUs-PyTorch-DeepSeek-1"

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PR_Github #59916 [ run ] triggered by Bot. Commit: 31c45b9 Link to invocation

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PR_Github #59916 [ run ] completed with state SUCCESS. Commit: 31c45b9
/LLM/main/L0_MergeRequest_PR pipeline #48318 (Partly Tested) completed with status: 'SUCCESS'

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/bot skip --comment "Related tests have passed."

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Shixiaowei02 enabled auto-merge (squash) July 17, 2026 09:35
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PR_Github #59951 [ skip ] triggered by Bot. Commit: 31c45b9 Link to invocation

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PR_Github #59951 [ skip ] completed with state SUCCESS. Commit: 31c45b9
Skipping testing for commit 31c45b9

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Shixiaowei02 merged commit 7473916 into NVIDIA:main Jul 17, 2026
8 checks passed
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Shixiaowei02 deleted the fix/bug6329052-deepseek-v3-lite-disagg-conditional branch July 17, 2026 11:02
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