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[https://nvbugs/5440521][bug] Fix sequence slot allocation for attention DP - #6878

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[https://nvbugs/5440521][bug] Fix sequence slot allocation for attention DP#6878
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@Tabrizian Tabrizian commented Aug 13, 2025

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Summary by CodeRabbit

  • Bug Fixes

    • Prevents allocating compute slots during request initialization or early transmission stages, reducing contention and stalled requests in edge cases.
    • Ensures slots are reliably removed when requests free resources.
  • Performance

    • Allocates slots only when requests are truly ready; when performance metrics are enabled, records the initial scheduling time to improve latency predictability and throughput under load.

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@Tabrizian
Tabrizian requested a review from a team as a code owner August 13, 2025 23:35
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Tabrizian requested a review from shaharmor98 August 13, 2025 23:35
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📝 Walkthrough

Walkthrough

prepare_resources in seq_slot_manager.py now only allocates a new slot when llm_req.seq_slot is None and the request is not in disaggregated-generation init or transmission-in-progress states; on allocation it sets llm_req.seq_slot and llm_req.py_seq_slot and may call set_first_scheduled_time() when performance metrics are enabled. free_resources unchanged.

Changes

Cohort / File(s) Summary of Changes
Seq slot allocation logic
tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py
Changed prepare_resources allocation condition to llm_req.seq_slot is None and not (llm_req.is_disagg_generation_init_state or llm_req.is_disagg_generation_transmission_in_progress); added comment explaining skip for disagg init state; on allocation assign llm_req.seq_slot and llm_req.py_seq_slot; call llm_req.set_first_scheduled_time() if llm_req.return_perf_metrics is true; free_resources behavior unchanged.

Sequence Diagram(s)

sequenceDiagram
    participant Client
    participant PyExecutor
    participant SeqSlotManager
    participant SlotAllocator

    Client->>PyExecutor: submit request (llm_req)
    PyExecutor->>SeqSlotManager: prepare_resources(llm_req)
    SeqSlotManager->>SeqSlotManager: check llm_req.seq_slot\nand disagg state flags
    alt seq_slot is None AND not (is_disagg_generation_init_state or is_disagg_generation_transmission_in_progress)
        SeqSlotManager->>SlotAllocator: allocate_slot()
        SlotAllocator-->>SeqSlotManager: slot
        SeqSlotManager->>SeqSlotManager: set llm_req.seq_slot\nset llm_req.py_seq_slot
        alt llm_req.return_perf_metrics
            SeqSlotManager->>llm_req: set_first_scheduled_time()
        end
    else
        SeqSlotManager->>SeqSlotManager: skip allocation
    end
    SeqSlotManager-->>PyExecutor: return
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Estimated code review effort

🎯 2 (Simple) | ⏱️ ~8 minutes

Possibly related PRs

Suggested reviewers

  • Shixiaowei02
  • yuxianq

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Actionable comments posted: 1

🧹 Nitpick comments (2)
tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py (2)

1-1: Prefer module-namespace imports for classes/enums.

Guideline: maintain module namespace in imports. Consider importing the module and referencing symbols via the module to improve clarity and avoid name clashes.

Example:

from . import llm_request

# type hints
def get_needed_resource_to_completion(self, request: llm_request.LlmRequest) -> int: ...
def free_resources(self, request: llm_request.LlmRequest) -> None: ...

# usage
if llm_req.seq_slot is None and llm_req.state != llm_request.LlmRequestState.DISAGG_GENERATION_INIT:
    ...

Note: This change affects type hints and usage throughout the file; apply consistently if you adopt it.


19-21: Simplify condition: use != instead of “not … ==” for readability.

No behavior change; just clearer intent.

Apply this diff:

-            if llm_req.seq_slot is None and not llm_req.state == LlmRequestState.DISAGG_GENERATION_INIT:
+            if llm_req.seq_slot is None and llm_req.state != LlmRequestState.DISAGG_GENERATION_INIT:
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**/*.py: Python code must target Python 3.8+
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Maintain module namespace in imports (from package.subpackage import foo; then use foo.SomeClass())
Python file names use snake_case
Python class names use PascalCase
Python functions/methods and local variables use snake_case; variables starting with a number get k_ prefix (e.g., k_99th_percentile)
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Avoid shadowing variables from outer scopes in Python
Initialize all externally visible members of a Python class in init
Prefer docstrings for interfaces used outside a file; comments for local code
Use Google-style docstrings for classes and functions (Sphinx-parsable)
Document attributes/variables inline with short docstrings
Avoid reflection when simple alternatives exist (e.g., prefer explicit parameters over dict(**locals()))
In try/except, catch the narrowest exceptions possible
For duck-typing with try/except, keep try body minimal and put logic in else

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**/*.{cpp,cxx,cc,cu,h,hpp,hxx,hh,cuh,py}

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tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py (1)

19-21: Seq-slot allocation looks correct — DISAGG_GENERATION_INIT should skip and will be allocated after transmission completes

Short summary: I verified the execution paths — SeqSlotManager skips allocation only for DISAGG_GENERATION_INIT, and requests move to GENERATION_IN_PROGRESS (so get a slot) before the main resource allocation pass runs. No other disagg states need to be special-cased.

Relevant locations (checked):

  • tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py — guard: if llm_req.seq_slot is None and not llm_req.state == LlmRequestState.DISAGG_GENERATION_INIT (allocates via SlotManager.add_slot).
  • tensorrt_llm/_torch/pyexecutor/py_executor.py — main loop calls _prepare_disagg_gen_transmission_complete(...) before self.resource_manager.prepare_resources(scheduled_batch) (see the loop and ordering in the 660–760 and 1240–1336 ranges). _prepare_disagg_gen_transmission_complete transitions transmission-complete requests to LlmRequestState.GENERATION_IN_PROGRESS.
  • tensorrt_llm/_torch/pyexecutor/py_executor.py — _prepare_disagg_gen_init(...) invokes resource managers for DISAGG_GENERATION_INIT requests (SeqSlotManager is called there but will intentionally skip allocation due to the guard).
  • tensorrt_llm/_torch/pyexecutor/resource_manager.py — SlotManager.add_slot/remove_slot implement mapping and free_slots (add_slot used by SeqSlotManager; remove_slot called on free_resources).

Conclusion: the change is intentional and safe — we do not need to re-allocate earlier; allocation happens after the disagg transmission-complete → GENERATION_IN_PROGRESS transition. No additional states need to be skipped.

@@ -1,4 +1,4 @@
from .llm_request import LlmRequest
from .llm_request import LlmRequest, LlmRequestState

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⚠️ Potential issue

Add NVIDIA copyright header (current year).

Per coding guidelines, prepend the NVIDIA copyright header to all source files.

Apply this diff at the top of the file:

+# Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+
 from .llm_request import LlmRequest, LlmRequestState
📝 Committable suggestion

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Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.

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from .llm_request import LlmRequest, LlmRequestState
# Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
from .llm_request import LlmRequest, LlmRequestState
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tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py lines 1-1: prepend the
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@Tabrizian
Tabrizian requested a review from Shixiaowei02 August 14, 2025 07:44
@Tabrizian
Tabrizian force-pushed the user/imant/fixSeqSlotsWithADP branch from a863e7e to 2c1791e Compare August 14, 2025 07:44
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/bot run

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PR_Github #15257 [ run ] triggered by Bot

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Actionable comments posted: 1

♻️ Duplicate comments (1)
tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py (1)

1-1: Add NVIDIA copyright header (current year).

Per coding guidelines, prepend the NVIDIA copyright header to all source files.

Apply this diff at the top of the file:

+ # Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved.
+
 from .llm_request import LlmRequest, LlmRequestState
🧹 Nitpick comments (1)
tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py (1)

21-21: Prefer != over not == for readability.

Equivalent semantics; the inequality operator is clearer.

-            if llm_req.seq_slot is None and not llm_req.state == LlmRequestState.DISAGG_GENERATION_INIT:
+            if llm_req.seq_slot is None and llm_req.state != LlmRequestState.DISAGG_GENERATION_INIT:
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**/*.py

📄 CodeRabbit Inference Engine (CODING_GUIDELINES.md)

**/*.py: Python code must target Python 3.8+
Python indentation: 4 spaces, no tabs
Maintain module namespace in imports (from package.subpackage import foo; then use foo.SomeClass())
Python file names use snake_case
Python class names use PascalCase
Python functions/methods and local variables use snake_case; variables starting with a number get k_ prefix (e.g., k_99th_percentile)
Global variables use G_ prefixed UPPER_SNAKE_CASE (e.g., G_MY_GLOBAL)
Constants use UPPER_SNAKE_CASE in Python
Avoid shadowing variables from outer scopes in Python
Initialize all externally visible members of a Python class in init
Prefer docstrings for interfaces used outside a file; comments for local code
Use Google-style docstrings for classes and functions (Sphinx-parsable)
Document attributes/variables inline with short docstrings
Avoid reflection when simple alternatives exist (e.g., prefer explicit parameters over dict(**locals()))
In try/except, catch the narrowest exceptions possible
For duck-typing with try/except, keep try body minimal and put logic in else

Files:

  • tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py
**/*.{cpp,cxx,cc,cu,h,hpp,hxx,hh,cuh,py}

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Prepend NVIDIA copyright header (current year) to all source files

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📚 Learning: 2025-08-12T10:28:57.320Z
Learnt from: CR
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File: CODING_GUIDELINES.md:0-0
Timestamp: 2025-08-12T10:28:57.320Z
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Applied to files:

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🔇 Additional comments (3)
tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py (3)

1-1: LGTM: Importing LlmRequestState for state checks is correct.

The added import is used appropriately in the allocation guard below.


19-21: Correctly skip slot allocation during DISAGG_GENERATION_INIT.

This aligns allocation with post-init only, which is consistent with fixing attention DP init behavior.


19-21: SlotManager.remove_slot is safe for requests that never acquired a slot — no change required.

remove_slot checks membership before popping and only mutates state when a slot exists, so calling free_resources for requests that skipped allocation (e.g., DISAGG_GENERATION_INIT) is a no-op.

  • Evidence:
    • tensorrt_llm/_torch/pyexecutor/resource_manager.py — SlotManager.remove_slot (conditional pop/add).
    • tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py — prepare_resources skips DISAGG_GENERATION_INIT; free_resources calls remove_slot.

Comment thread tensorrt_llm/_torch/pyexecutor/seq_slot_manager.py Outdated
@Tabrizian
Tabrizian force-pushed the user/imant/fixSeqSlotsWithADP branch from 2c1791e to 9b47a9c Compare August 14, 2025 23:10
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/bot run

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PR_Github #15350 [ run ] triggered by Bot

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PR_Github #15350 [ run ] completed with state SUCCESS
/LLM/release-1.0/L0_MergeRequest_PR pipeline #127 completed with status: 'FAILURE'

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I am quite new to trtllm, so I wonder whether we shall always keep logic alignment between py implementation and cpp implementation (e.g. also change the logic in cpp/tensorrt_llm/batch_manager/assignReqSeqSlots.cpp correspondingly)?

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@yifeizhang-c assignReqSeqSlots.cpp is only used for the TRT backend

@Tabrizian
Tabrizian force-pushed the user/imant/fixSeqSlotsWithADP branch from 9b47a9c to d56286b Compare August 18, 2025 23:32
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Tabrizian requested a review from a team as a code owner August 18, 2025 23:32
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/bot run --disable-fail-fast

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PR_Github #15669 [ run ] triggered by Bot

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PR_Github #15669 [ run ] completed with state SUCCESS
/LLM/release-1.0/L0_MergeRequest_PR pipeline #189 completed with status: 'FAILURE'

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The current logic is similar to the changes used to fix bs==1 non-stop issue #6975 , with a difference that

I am not sure whether any choice would make more sense compared with the other one.

Signed-off-by: Iman Tabrizian <10105175+tabrizian@users.noreply.github.com>
@Tabrizian
Tabrizian force-pushed the user/imant/fixSeqSlotsWithADP branch from d56286b to 52d285c Compare August 19, 2025 06:38
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@yifeizhang-c I'm fine with that change too. Closing the PR in favour of your change.

@Tabrizian Tabrizian closed this Aug 19, 2025
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