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adidt/templates/adrv9009_zu11eg.dts: Fix tx loop-back-adc-profile #17

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Merged
tfcollins merged 1 commit into from
Mar 7, 2023
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adidt/templates/adrv9009_zu11eg.dts: Fix tx loop-back-adc-profile #17

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adidt/templates/adrv9009_zu11eg.dts: Fix tx loop-back-adc-profile 
Use lpbkAdcProfile instead of FIR filter coefs

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
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mhennerich committed Mar 7, 2023
commit 9dff93fbbd8c279fafab77ad947af640515e53a5
2 changes: 1 addition & 1 deletion adidt/templates/adrv9009_zu11eg.dts
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Expand Up @@ -202,7 +202,7 @@
adi,tx-profile-tx-input-rate_khz = <{{ tx['txInputRate_kHz'] }}>;
adi,tx-profile-tx-int5-interpolation = <{{ tx['txInt5Interpolation'] }}>;
adi,tx-profile-tx-fir-coefs = /bits/ 16 <{{ tx['filter']['coefs'] }}>;
adi,tx-profile-loop-back-adc-profile = /bits/ 16 <{{ tx['filter']['coefs'] }}>;
adi,tx-profile-loop-back-adc-profile = /bits/ 16 <{{ lpbk['lpbkAdcProfile']['coefs'] }}>;

adi,dig-clocks-clk-pll-hs-div = <{{ clocks['clkPllHsDiv'] }}>;
adi,dig-clocks-clk-pll-vco-freq_khz = <{{ clocks['clkPllVcoFreq_kHz'] }}>;
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