arch/xtensa: add gdbstub support #16095
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[Experimental Bot, please feedback here] Yes, this PR appears to meet the NuttX requirements, although some sections could be more thoroughly documented. Strengths:
Areas for Potential Improvement:
Overall: The PR is well-structured and provides the necessary information. Adding the minor improvements suggested above would make it even stronger. |
Or the gdb on host machine cannot connect to target, the command such as "target remote /dev/ttyUSB1" will timeout. Signed-off-by: anjiahao <anjiahao@xiaomi.com>
After PR#14672, there is no use of XCHAL_SYSCALL_LEVEL. Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
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Hi @chirping78 , If you don't mind, can you please run |
@tmedicci cannot run About the toolchain version, I have not updated it after last time you told me to use the same version as in CI's docker. |
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| static const uint16_t g_reg_offs[] = | ||
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| /* In the same order as gdb command "maintenance print remote-registers" */ |
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Hi @tmedicci Thanks for your reminder!
Hi @chirping78
May I know the gdb version you are using?
Could you please try to verify based on coredump test case here. Thanks!
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@XuNeo
Could you help check above question?
It seems that libs/libc/gdbstub/lib_gdbstub.c and sched/misc/coredump.c both are using g_tcbinfo.reg_off.p, but with different interpretation?
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It will break coredump if the register layout is different in GDB and coredump.
It does also happen on x86-64 platform. This can be solved by including more register info in g_reginfo(g_reg_offs).
What's worse is that different GDB expects different register layout. For example, xt-gdb and esp32s3-gdb have different register layout.
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It will break coredump if the register layout is different in GDB and coredump. It does also happen on x86-64 platform. This can be solved by including more register info in
g_reginfo(g_reg_offs).What's worse is that different GDB expects different register layout. For example, xt-gdb and esp32s3-gdb have different register layout.
So for current issue, we can expand the struct g_reg_offs to same size as before, but in order with gdb remote register?
For xt-gdb and esp32s3-gdb, this may be resolved by chip selection CONFIG_ARCH_CHIP_XXX in future?
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Or for current issue, use CONFIG_COREDUMP and CONFIG_SERIAL_GDBSTUB to define two different structure?
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OK, I see. The conflict between coredump and gdbstub can't be resolved simply.
This needs structure updating.
I will close this PR for now, and add back after the structure is updated.
By the error message, it seems you're using Python 2.7. Can you double-check, please? |
@tmedicci pls check the host_info: |
It's found that some memory ranges such as IROM can't be read by bytes, so change the memory reading to be 4-byte aligment. Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
This will make gdb command 'g' get correct response. Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
Add the single step breakpoint handling. Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
build, flash, and run: ``` ./tools/configure.sh -E esp32s3-devkit:gdbstub make -j flash ESPTOOL_PORT=/dev/ttyUSB0 minicom -D /dev/ttyUSB0 -b 115200 ``` launch gdb to debug: ``` xtensa-esp32s3-elf-gdb nuttx (gdb) target remote /dev/ttyUSB1 (gdb) b cmd_ls (gdb) c ``` Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
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Currently the structure of |
Summary
As follow up to #15907, add gdbstub support to xtensa arch.
Impact
No impact to users, only enhanced the development tools.
Testing
Please note that two USB-to-UART converters are used here.
One is the on-board USB-to-UART, which is used for program the flash, and nsh access;
another is an external USB-to-UART converter, connected to GPIO17/GPIO18, or U1TXD/U1RXD.
Now you can run
lscommand in the nsh to trigger the breakpoint, and test these gdb functionsStopping and Continuing:
b
c
n
s
ni
si
finish
Examining the Stack:
bt
info frame
info locals
Examining Code:
disass
Examining Data:
p
x
info reg