Skip to content

armv7-r/a: bugfix: fix a4 register use but not store in xxx_invalidate/flush/clean_all.S#5367

Merged
masayuki2009 merged 1 commit into
apache:masterfrom
zhuyanlinzyl:a
Feb 8, 2022
Merged

armv7-r/a: bugfix: fix a4 register use but not store in xxx_invalidate/flush/clean_all.S#5367
masayuki2009 merged 1 commit into
apache:masterfrom
zhuyanlinzyl:a

Conversation

@zhuyanlinzyl

@zhuyanlinzyl zhuyanlinzyl commented Jan 28, 2022

Copy link
Copy Markdown
Contributor

fix a4 register use but not store in xxx_invalidate/flush/clean_all.S

Signed-off-by: zhuyanlin zhuyanlin1@xiaomi.com

Summary

fix a4 register use but not store in xxx_invalidate/flush/clean_all.S

Impact

Testing

Comment thread arch/arm/src/armv7-a/cp15_clean_dcache_all.S Outdated
@pkarashchenko

Copy link
Copy Markdown
Contributor

@zhuyanlinzyl do you have possibility to address comments this week?

@xiaoxiang781216

Copy link
Copy Markdown
Contributor

We are in Spring Festival and come back to work in the next week.

@zhuyanlinzyl

zhuyanlinzyl commented Feb 7, 2022

Copy link
Copy Markdown
Contributor Author

@masayuki2009 @pkarashchenko I update a new patch, please review again.

Use sub loop instead of add loop

And it work well in sabrelite qemu.

Comment thread arch/arm/src/armv7-r/cp15_invalidate_dcache_all.S
Comment thread arch/arm/src/armv7-r/cp15_flush_dcache_all.S Outdated
Comment thread arch/arm/src/armv7-r/cp15_clean_dcache_all.S Outdated
@zhuyanlinzyl

zhuyanlinzyl commented Feb 7, 2022 via email

Copy link
Copy Markdown
Contributor Author

@masayuki2009

Copy link
Copy Markdown
Contributor

@masayuki2009 @pkarashchenko I update a new patch, please review again.

Use sub loop instead of add loop
And it work well in sabrelite qemu.

@zhuyanlinzyl

Did you test with your board (I think Xiaomi uses dual Cortex-A7-based board) as well?

@zhuyanlinzyl

Copy link
Copy Markdown
Contributor Author

@masayuki2009 Yes, I test in our smp a7 board, this patch can work

@zhuyanlinzyl zhuyanlinzyl changed the title armv7-r/a: bugfix: save and restore a4 register in xxx_dcache_all.S armv7-r/a: bugfix: fix a4 register use but not store in xxx_invalidate/flush/clean_all.S Feb 8, 2022
add r1, r1, #1 /* Increment the way counter */
cmp r4, r1 /* Last way */
sub r1, r1, #1 /* Subtraction the way counter */
cmp r1, #0 /* Last way? */

Copy link
Copy Markdown
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

@zhuyanlinzyl
Is this condition correct?
If the number of ways equals 4 (i.e. r1 = 3), it hits only 3times.

Copy link
Copy Markdown
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

@masayuki2009

Yes, sub and bne only loop 3times.
I use subs and bcs , It should loop 4times.

I update the patch. please review agian.

add r1, r1, #1 /* Increment the way counter */
cmp r4, r1 /* Last way */
bne way_loop /* Keep looping if not */
sub r1, r1, #1 /* Subtraction the way counter */

@masayuki2009 masayuki2009 Feb 8, 2022

Copy link
Copy Markdown
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Copy link
Copy Markdown
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It's a typ mistake. I fix and update the patch @masayuki2009 .

Use sub loop instead of add loop

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

5 participants