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7ee0902
Code migration Start (#1)
jcf94 May 26, 2020
9fcbf0b
Split transform_step out & Update more UTs (#3)
jcf94 May 27, 2020
f43e82f
Add search_task, measure and serialization (#4)
jcf94 May 28, 2020
e0a5ed5
Add MetaTileRewritePolicy (#5)
jcf94 May 29, 2020
359905a
Basic Python API for State (#6)
jcf94 Jun 3, 2020
2032a64
Add Python API: Measure & Task (#7)
jcf94 Jun 4, 2020
6b21dc6
Add ansor.auto_schedule() API; First AutoSchedule working version(#8)
jcf94 Jun 4, 2020
e52135f
Bug fix & Add python serialization API (#10)
jcf94 Jun 5, 2020
1fe6638
Improve code style, python wrapper and test cases (#11)
merrymercy Jun 7, 2020
43d1530
fix unit tests
merrymercy Jun 8, 2020
f367d15
Add RPCRunner & OpenCL/CUDA test (#12)
jcf94 Jun 8, 2020
2bd6471
rebase to upstream/master
merrymercy Jun 8, 2020
c860f2c
Add Ansor basic tutorial (#13)
jcf94 Jun 8, 2020
f60d1a6
migrate feature extraction (#14)
merrymercy Jun 8, 2020
b839c0f
Add XGBModel & RPCRunnerWarpper (#15)
jcf94 Jun 9, 2020
cfe58d7
Migrate workload_registry.py (#16)
merrymercy Jun 9, 2020
143ea45
add task scheduler (#17)
merrymercy Jun 9, 2020
ed075c2
Add conv2d cuda tutorial with workload registry (#18)
jcf94 Jun 9, 2020
74ec7d0
add tune_test.py (the old tune_wkl.py) (#19)
merrymercy Jun 9, 2020
cd0a516
Code refine for tune_test.py & Add a pre load callback (#20)
jcf94 Jun 10, 2020
3a24e49
Add python custom sketch rule (#21)
jcf94 Jun 11, 2020
a155c1f
Ansor Relay Integration (without layout rewrite) (#22)
minminsun Jun 12, 2020
674027f
Add tune_op_subgraph.py & Some code clean for tune_network.py (#23)
jcf94 Jun 12, 2020
2f241ed
add explicit_unroll_max_extent (#25)
merrymercy Jun 12, 2020
18d44b8
Add Index simplification & API update (#26)
jcf94 Jun 15, 2020
4ea6712
Update PreLoadMeasuredStates & Some bug fix (#27)
jcf94 Jun 16, 2020
6126cdb
Add tensorize step for loop_state (#31)
jcf94 Jun 19, 2020
c7364df
State python api update (#33)
jcf94 Jun 19, 2020
36cd9ef
kernel layout rewrite (#28)
minminsun Jun 19, 2020
145e61c
[cache flush] port cache flush to ansor (#32)
FrozenGene Jun 19, 2020
2c27816
Improve relay integration (#34)
merrymercy Jun 20, 2020
0794875
Fix xgb error & Simplify dispatcher (#35)
merrymercy Jun 20, 2020
a4c4548
Rename "MetaTileRewritePolicy" to "SketchPolicy". (#36)
merrymercy Jun 20, 2020
593a2c7
rebase
merrymercy Jun 20, 2020
53bd591
Migrate all node::make to noderef's construct function (#37)
jcf94 Jun 22, 2020
8e53d12
Some lint fix & Recover the double constructor of tvm::PrimExpr (#39)
jcf94 Jun 23, 2020
cd5c5ad
Add MutateComputeLocation and MutateParallel in evolutionary search (…
merrymercy Jun 23, 2020
5860191
Improve loop state python API (stage_tensors -> stage_ops) (#41)
merrymercy Jun 23, 2020
14a19cd
ComputeDAG bug fix & Add Custom TensorCore Matmul Example (#42)
jcf94 Jun 24, 2020
b012e27
Rever Commits, Start to build minimum Ansor system
jcf94 Jun 24, 2020
d6d6b85
Code clean for minimum Ansor system
jcf94 Jun 24, 2020
4042cfa
Bug fix & Delete AccessAnalyzer
jcf94 Jun 28, 2020
7695def
Delete attachmap & Code clean
jcf94 Jun 28, 2020
0c200cd
Doc update
jcf94 Jun 28, 2020
9c35e50
Headfile update & Python doc update
jcf94 Jun 28, 2020
a015051
clang-format fix
jcf94 Jun 29, 2020
6823802
pylint fix
jcf94 Jun 29, 2020
a82dbb8
Update
jcf94 Jun 29, 2020
ac36c46
Doc update
jcf94 Jun 29, 2020
a62b1e0
Update
jcf94 Jun 30, 2020
3eac89d
Merge branch 'upstream_master' into upstream_0_new
jcf94 Jun 30, 2020
526cf42
Bug fix after code merge to the new master
jcf94 Jun 30, 2020
426ec82
clang-format fix
jcf94 Jun 30, 2020
907c17c
Update
jcf94 Jul 1, 2020
64f8f8d
Update
jcf94 Jul 1, 2020
1b16dd4
Update std::vector to Array; Update verbosity setting; Some commemts
jcf94 Jul 1, 2020
9fa897b
std::vector->Array & std::string->String
jcf94 Jul 2, 2020
f40c7af
Add init_state to ComputeDAG
jcf94 Jul 2, 2020
0a24daf
Update
jcf94 Jul 2, 2020
a45fd89
Update some unordered_map to Map
jcf94 Jul 2, 2020
bfc6663
clang-format fix
jcf94 Jul 2, 2020
eb02e77
Comments addressed
jcf94 Jul 3, 2020
cb2442f
Lint fix
jcf94 Jul 3, 2020
b1ca20c
Update
jcf94 Jul 3, 2020
49dbec6
Merge branch 'upstream_master' into upstream_0_new
jcf94 Jul 3, 2020
8add768
Update
jcf94 Jul 3, 2020
78e5313
Update
jcf94 Jul 4, 2020
546abbe
Update
jcf94 Jul 4, 2020
d418a57
Update
jcf94 Jul 5, 2020
8e1d65d
Update
jcf94 Jul 5, 2020
3a67a72
Update
jcf94 Jul 9, 2020
28a7b8f
Update
jcf94 Jul 9, 2020
1360b1b
Update
jcf94 Jul 9, 2020
52afe74
Rename ansor namespace to auto_schedule
jcf94 Jul 11, 2020
6a61fb6
Update
jcf94 Jul 11, 2020
3a4e5da
Rename ThreadPool to ParallelFor
jcf94 Jul 14, 2020
dbe019b
Add parallel_for
jcf94 Jul 14, 2020
1f1b878
Remove ThreadPool
jcf94 Jul 14, 2020
02fede9
Update python/tvm/auto_schedule/auto_schedule.py
merrymercy Jul 14, 2020
eea0989
trigger CI
merrymercy Jul 14, 2020
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jcf94 committed Jun 29, 2020
commit a82dbb80758c54d6b6c55293e095a8f337a1c791
16 changes: 8 additions & 8 deletions src/ansor/transform_step.h
Original file line number Diff line number Diff line change
Expand Up @@ -230,15 +230,14 @@ namespace std {
template <>
struct hash<::tvm::ansor::Step> {
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std::size_t operator()(const ::tvm::ansor::Step& step) const {
// clang-format off
if (auto ps = step.as<::tvm::ansor::ReorderStepNode>()) {
return ::dmlc::HashCombine(1,
::dmlc::HashCombine(std::hash<int>()(ps->stage_id),
ps->after_ids));
::dmlc::HashCombine(std::hash<int>()(ps->stage_id), ps->after_ids));
} else if (auto ps = step.as<::tvm::ansor::SplitStepNode>()) {
size_t ret = ::dmlc::HashCombine(
2, ::dmlc::HashCombine(
std::hash<int>()(ps->stage_id),
::dmlc::HashCombine(std::hash<int>()(ps->iter_id), ps->inner_to_outer)));
size_t ret = ::dmlc::HashCombine(2,
::dmlc::HashCombine(std::hash<int>()(ps->stage_id),
::dmlc::HashCombine(std::hash<int>()(ps->iter_id), ps->inner_to_outer)));
for (const auto& len : ps->lengths) {
if (len.defined()) {
auto pint = len.as<::tvm::tir::IntImmNode>();
Expand All @@ -250,12 +249,13 @@ struct hash<::tvm::ansor::Step> {
}
return ret;
} else if (auto ps = step.as<::tvm::ansor::FuseStepNode>()) {
return ::dmlc::HashCombine(
3, ::dmlc::HashCombine(std::hash<int>()(ps->stage_id), ps->fused_ids));
return ::dmlc::HashCombine(3,
::dmlc::HashCombine(std::hash<int>()(ps->stage_id), ps->fused_ids));
} else {
LOG(FATAL) << "Invalid step";
}
return 0;
// clang-format on
}
};
} // namespace std
Expand Down