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Feature: high-z TCK/SWCLK when idle#1192
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…get clock tristating
…emoved a duplicate gpio_set_mode() call
…to comply with the project style
…rget clock tristating
…call from TAP init remote call code
This netted a 36 byte code size reduction
dragonmux
added
Enhancement
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I've tested this out with recent BMP hardware on an STM32G030J6 that needs to share its SWCLK pin with a UART TX signal. The Hi-Z feature on the BMP SWCLK signal allows the G030J6 to safely share the pin for both programing and functional operation without danger of contention which is confirmed by measuring the Voh/Vol levels prior / during / post flashing. Levels were observed to be fully 3.3V / 0V with no evidence of excessive current flow. |
esden
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Aug 16, 2022
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LGTM, tested on 1bitsy (STM32F415) and BMP V2.3 (GD32F103) all seems good so far. 🤞
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Detailed description
Certain low pin-count parts very heavily overload the device pins with functionality. This can mean it's inappropriate to drive TCK/SWCLK before initiating a scan, after scan but before attach, and after detach.
This PR introduces tristating support for these devices when running native hardware revision 6 and newer, allowing BMP to work around this problem. This also means BMP will play nicer with other devices on the roadmap.
This has been tested working against both the SWD and JTAG modes of the Tiva-C TM4C123GH6PM.
Your checklist for this pull request
make PROBE_HOST=native)make PROBE_HOST=hosted)Closing issues
Fixes #945