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34 changes: 23 additions & 11 deletions cranelift/codegen/meta/src/pulley.rs
Original file line number Diff line number Diff line change
Expand Up @@ -103,11 +103,11 @@ impl Inst<'_> {
}
}

pub fn generate_rust(filename: &str, out_dir: &Path) -> Result<(), Error> {
let mut rust = String::new();

// Generate a pretty-printing method for debugging.
rust.push_str("pub fn print(inst: &RawInst) -> String {\n");
/// Generates a pretty-printing method for debugging.
pub fn generate_raw_inst_display(rust: &mut String) -> Result<(), Error> {
rust.push_str("impl<'a> std::fmt::Display for RawInstDisplay<'a> {\n");
rust.push_str("fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {\n");
rust.push_str("let inst = self.0;\n");
rust.push_str("match inst {\n");
for inst @ Inst { name, .. } in OPS.iter().chain(EXTENDED_OPS) {
if inst.skip() {
Expand Down Expand Up @@ -140,9 +140,11 @@ pub fn generate_rust(filename: &str, out_dir: &Path) -> Result<(), Error> {
format_string.push_str("}");
if ty.contains("Reg") {
if matches!(op, Operand::Writable { .. }) {
locals.push_str(&format!("let {name} = reg_name(*{name}.to_reg());\n"));
locals.push_str(&format!(
"let {name} = RegNameDisplay(*{name}.to_reg());\n"
));
} else {
locals.push_str(&format!("let {name} = reg_name(**{name});\n"));
locals.push_str(&format!("let {name} = RegNameDisplay(**{name});\n"));
}
}
}
Expand All @@ -154,10 +156,10 @@ pub fn generate_rust(filename: &str, out_dir: &Path) -> Result<(), Error> {
Operand::Binop { src2, .. } => {
pat.push_str("dst, src1, src2,");
format_string.push_str(" {dst}, {src1}, {src2}");
locals.push_str(&format!("let dst = reg_name(*dst.to_reg());\n"));
locals.push_str(&format!("let src1 = reg_name(**src1);\n"));
locals.push_str(&format!("let dst = RegNameDisplay(*dst.to_reg());\n"));
locals.push_str(&format!("let src1 = RegNameDisplay(**src1);\n"));
if src2.contains("Reg") {
locals.push_str(&format!("let src2 = reg_name(**src2);\n"));
locals.push_str(&format!("let src2 = RegNameDisplay(**src2);\n"));
}
}
}
Expand All @@ -167,13 +169,23 @@ pub fn generate_rust(filename: &str, out_dir: &Path) -> Result<(), Error> {
"
RawInst::{name} {{ {pat} }} => {{
{locals}
format!(\"{format_string}\")
write!(f, \"{format_string}\")
}}
"
));
}
rust.push_str("}\n");
rust.push_str("}\n");
rust.push_str("}\n");

Ok(())
}

pub fn generate_rust(filename: &str, out_dir: &Path) -> Result<(), Error> {
let mut rust = String::new();

// Generate a pretty-printing method for debugging.
generate_raw_inst_display(&mut rust)?;

// Generate `get_operands` to feed information to regalloc
rust.push_str(
Expand Down
146 changes: 103 additions & 43 deletions cranelift/codegen/src/isa/pulley_shared/inst/args.rs
Original file line number Diff line number Diff line change
Expand Up @@ -204,7 +204,7 @@ impl core::fmt::Display for Amode {
}
}
Amode::RegOffset { base, offset } => {
let name = reg_name(**base);
let name = RegNameDisplay(**base);
if *offset >= 0 {
write!(f, "{name}+{offset}")
} else {
Expand Down Expand Up @@ -463,103 +463,163 @@ impl Cond {
impl fmt::Display for Cond {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
match self {
Cond::If32 { reg } => write!(f, "if32 {}", reg_name(**reg)),
Cond::IfNot32 { reg } => write!(f, "if_not32 {}", reg_name(**reg)),
Cond::If32 { reg } => write!(f, "if32 {}", RegNameDisplay(**reg)),
Cond::IfNot32 { reg } => write!(f, "if_not32 {}", RegNameDisplay(**reg)),
Cond::IfXeq32 { src1, src2 } => {
write!(f, "if_xeq32 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xeq32 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXneq32 { src1, src2 } => {
write!(f, "if_xneq32 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xneq32 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXslt32 { src1, src2 } => {
write!(f, "if_xslt32 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xslt32 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXslteq32 { src1, src2 } => {
write!(f, "if_xslteq32 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xslteq32 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXult32 { src1, src2 } => {
write!(f, "if_xult32 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xult32 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXulteq32 { src1, src2 } => {
write!(f, "if_xulteq32 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xulteq32 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXeq64 { src1, src2 } => {
write!(f, "if_xeq64 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xeq64 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXneq64 { src1, src2 } => {
write!(f, "if_xneq64 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xneq64 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXslt64 { src1, src2 } => {
write!(f, "if_xslt64 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xslt64 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXslteq64 { src1, src2 } => {
write!(f, "if_xslteq64 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xslteq64 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXult64 { src1, src2 } => {
write!(f, "if_xult64 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xult64 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXulteq64 { src1, src2 } => {
write!(f, "if_xulteq64 {}, {}", reg_name(**src1), reg_name(**src2))
write!(
f,
"if_xulteq64 {}, {}",
RegNameDisplay(**src1),
RegNameDisplay(**src2)
)
}
Cond::IfXeq32I32 { src1, src2 } => {
write!(f, "if_xeq32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xeq32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXneq32I32 { src1, src2 } => {
write!(f, "if_xneq32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xneq32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXslt32I32 { src1, src2 } => {
write!(f, "if_xslt32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xslt32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXslteq32I32 { src1, src2 } => {
write!(f, "if_xslteq32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xslteq32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXsgt32I32 { src1, src2 } => {
write!(f, "if_xsgt32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xsgt32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXsgteq32I32 { src1, src2 } => {
write!(f, "if_xsgteq32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xsgteq32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXult32I32 { src1, src2 } => {
write!(f, "if_xult32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xult32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXulteq32I32 { src1, src2 } => {
write!(f, "if_xulteq32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xulteq32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXugt32I32 { src1, src2 } => {
write!(f, "if_xugt32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xugt32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXugteq32I32 { src1, src2 } => {
write!(f, "if_xugteq32_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xugteq32_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXeq64I32 { src1, src2 } => {
write!(f, "if_xeq64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xeq64_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXneq64I32 { src1, src2 } => {
write!(f, "if_xneq64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xneq64_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXslt64I32 { src1, src2 } => {
write!(f, "if_xslt64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xslt64_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXslteq64I32 { src1, src2 } => {
write!(f, "if_xslteq64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xslteq64_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXsgt64I32 { src1, src2 } => {
write!(f, "if_xsgt64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xsgt64_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXsgteq64I32 { src1, src2 } => {
write!(f, "if_xsgteq64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xsgteq64_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXult64I32 { src1, src2 } => {
write!(f, "if_xult64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xult64_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXulteq64I32 { src1, src2 } => {
write!(f, "if_xulteq64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xulteq64_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXugt64I32 { src1, src2 } => {
write!(f, "if_xugt64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xugt64_i32 {}, {src2}", RegNameDisplay(**src1))
}
Cond::IfXugteq64I32 { src1, src2 } => {
write!(f, "if_xugteq64_i32 {}, {src2}", reg_name(**src1))
write!(f, "if_xugteq64_i32 {}, {src2}", RegNameDisplay(**src1))
}
}
}
Expand Down Expand Up @@ -607,7 +667,7 @@ impl fmt::Display for AddrO32 {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
match self {
AddrO32::Base { addr, offset } => {
let addr = reg_name(**addr);
let addr = RegNameDisplay(**addr);
write!(f, "{addr}, {offset}")
}
}
Expand Down Expand Up @@ -644,7 +704,7 @@ impl fmt::Display for AddrZ {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
match self {
AddrZ::Base { addr, offset } => {
let addr = reg_name(**addr);
let addr = RegNameDisplay(**addr);
write!(f, "{addr}, {offset}")
}
}
Expand Down Expand Up @@ -700,9 +760,9 @@ impl fmt::Display for AddrG32 {
wasm_addr,
offset,
} => {
let host_heap_base = reg_name(**host_heap_base);
let host_heap_bound = reg_name(**host_heap_bound);
let wasm_addr = reg_name(**wasm_addr);
let host_heap_base = RegNameDisplay(**host_heap_base);
let host_heap_bound = RegNameDisplay(**host_heap_bound);
let wasm_addr = RegNameDisplay(**wasm_addr);
write!(
f,
"{host_heap_base}, {host_heap_bound}, {wasm_addr}, {offset}",
Expand Down Expand Up @@ -765,9 +825,9 @@ impl fmt::Display for AddrG32Bne {
wasm_addr,
offset,
} => {
let host_heap_base = reg_name(**host_heap_base);
let host_heap_bound_addr = reg_name(**host_heap_bound_addr);
let wasm_addr = reg_name(**wasm_addr);
let host_heap_base = RegNameDisplay(**host_heap_base);
let host_heap_bound_addr = RegNameDisplay(**host_heap_bound_addr);
let wasm_addr = RegNameDisplay(**wasm_addr);
write!(
f,
"{host_heap_base}, \
Expand Down
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