Tracking issue for a review comment on #129992.
The AMD64 RegNum enum now includes XMM0–XMM15. Any runtime code that maps ICorDebugInfo::RegNum to CONTEXT offsets (e.g. GetRegOffsInCONTEXT in vm/util.cpp) must be updated accordingly; today the TARGET_AMD64 switch only handles GPRs and will treat the new XMM RegNum values as invalid. That can break native var access for VLT_REG_FP and the new mixed int+fp VLT_REG_REG cases on AMD64.
Tracking issue for a review comment on #129992.
The AMD64 RegNum enum now includes XMM0–XMM15. Any runtime code that maps
ICorDebugInfo::RegNumto CONTEXT offsets (e.g.GetRegOffsInCONTEXTinvm/util.cpp) must be updated accordingly; today theTARGET_AMD64switch only handles GPRs and will treat the new XMM RegNum values as invalid. That can break native var access forVLT_REG_FPand the new mixed int+fpVLT_REG_REGcases on AMD64.