Add missing THUMB_BRANCH24 and ARM64_BRANCH26 to Relocation.GetSize#128170
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These relocation types were handled in ReadValue/WriteValue but missing from GetSize, causing a NotSupportedException when PEObjectWriter resolves relocations during ARM/ARM64 composite R2R image emission. Fixes crossgen2 crash in runtime-coreclr crossgen2-composite pipeline on linux arm (Generate CORE_ROOT step). Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Pull request overview
This PR updates Crossgen2/CoreCLR tooling relocation metadata so Relocation.GetSize reports the correct span size for two instruction-immediate relocation kinds used on ARM/ARM64.
Changes:
- Add
RelocType.IMAGE_REL_BASED_THUMB_BRANCH24 => 4toRelocation.GetSize. - Add
RelocType.IMAGE_REL_BASED_ARM64_BRANCH26 => 4toRelocation.GetSize.
3 tasks
teo-tsirpanis
added
area-ReadyToRun
and removed
area-crossgen2-coreclr
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/azp run runtime-coreclr crossgen2-composite |
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Azure Pipelines successfully started running 1 pipeline(s). |
Resolve ARM branch relocations in PE images and avoid out-of-range Thumb branches for composite ARM exact method body calls. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Remove the speculative ARM composite-mode branch heuristic and keep PE relocation handling consistent with existing unchecked relocation resolution. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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/azp run runtime-coreclr crossgen2-composite |
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Azure Pipelines successfully started running 1 pipeline(s). |
Use a non-branch relocation hint for exact composite method bodies on ARM so crossgen2 emits an address-load sequence instead of a Thumb BL that may exceed its immediate range. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
davidwrighton
approved these changes
May 19, 2026
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These relocation types were handled in ReadValue/WriteValue but missing from GetSize, causing a NotSupportedException when PEObjectWriter resolves relocations during ARM/ARM64 composite R2R image emission.
This doesn't fully fix the coreroot build because there are relocs from async variants to their resumption stubs which don't fit into these reloc sizes. A follow-up PR to place resumption stubs next to their async methods will fix that.