Skip to content
Draft
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
9 changes: 9 additions & 0 deletions src/coreclr/jit/emitarm64sve.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3046,6 +3046,15 @@ void emitter::emitInsSve_R_R_R(instruction ins,
emitInsSve_R_R(ins, attr, reg1, reg3, opt, sopt);
return;

case INS_sve_sqxtnt:
case INS_sve_uqxtnt:
case INS_sve_sqxtunt:
// RMW instructions without movprfx support, use mov instead
assert(insSveMovOptsUnpredicated(mopt));
emitIns_Mov(INS_sve_mov, attr, reg1, reg2, /* canSkip */ true, opt);
emitInsSve_R_R(ins, attr, reg1, reg3, opt, sopt);
return;

case INS_sve_and:
case INS_sve_bic:
case INS_sve_eor:
Expand Down
12 changes: 11 additions & 1 deletion src/coreclr/jit/hwintrinsiccodegenarm64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2211,7 +2211,17 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
case NI_Sve2_CreateWhileReadAfterWriteMaskUInt16:
case NI_Sve2_CreateWhileReadAfterWriteMaskUInt32:
case NI_Sve2_CreateWhileReadAfterWriteMaskUInt64:
// WHILERW operands are always pointers (64-bit), so emitSize is always EA_8BYTE.
case NI_Sve2_CreateWhileWriteAfterReadMaskByte:
case NI_Sve2_CreateWhileWriteAfterReadMaskDouble:
case NI_Sve2_CreateWhileWriteAfterReadMaskInt16:
case NI_Sve2_CreateWhileWriteAfterReadMaskInt32:
case NI_Sve2_CreateWhileWriteAfterReadMaskInt64:
case NI_Sve2_CreateWhileWriteAfterReadMaskSByte:
case NI_Sve2_CreateWhileWriteAfterReadMaskSingle:
case NI_Sve2_CreateWhileWriteAfterReadMaskUInt16:
case NI_Sve2_CreateWhileWriteAfterReadMaskUInt32:
case NI_Sve2_CreateWhileWriteAfterReadMaskUInt64:
// WHILERW/WHILEWR operands are always pointers (64-bit), so emitSize is always EA_8BYTE.
// No signed/unsigned instruction variant exists.
GetEmitter()->emitIns_R_R_R(ins, EA_8BYTE, targetReg, op1Reg, op2Reg, opt);
break;
Expand Down
14 changes: 14 additions & 0 deletions src/coreclr/jit/hwintrinsiclistarm64sve.h
Original file line number Diff line number Diff line change
Expand Up @@ -388,6 +388,16 @@ HARDWARE_INTRINSIC(Sve2, CreateWhileReadAfterWriteMaskSingle,
HARDWARE_INTRINSIC(Sve2, CreateWhileReadAfterWriteMaskUInt16, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_sve_whilerw, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileReadAfterWriteMaskUInt32, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_whilerw, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileReadAfterWriteMaskUInt64, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_whilerw, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskByte, -1, 2, {INS_invalid, INS_sve_whilewr, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskDouble, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_whilewr}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskInt16, -1, 2, {INS_invalid, INS_invalid, INS_sve_whilewr, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskInt32, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_whilewr, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskInt64, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_whilewr, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskSByte, -1, 2, {INS_sve_whilewr, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskSingle, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_whilewr, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskUInt16, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_sve_whilewr, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskUInt32, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_whilewr, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, CreateWhileWriteAfterReadMaskUInt64, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_whilewr, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_ReturnsPerElementMask)
HARDWARE_INTRINSIC(Sve2, DotProductRotateComplex, -1, 4, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cdot, INS_invalid, INS_sve_cdot, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_HasImmediateOperand)
HARDWARE_INTRINSIC(Sve2, DotProductRotateComplexBySelectedIndex, -1, 5, {INS_sve_cdot, INS_invalid, INS_sve_cdot, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_SpecialCodeGen|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation|HW_Flag_SpecialImport|HW_Flag_BaseTypeFromSecondArg)
HARDWARE_INTRINSIC(Sve2, FusedAddHalving, -1, -1, {INS_sve_shadd, INS_sve_uhadd, INS_sve_shadd, INS_sve_uhadd, INS_sve_shadd, INS_sve_uhadd, INS_sve_shadd, INS_sve_uhadd, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasRMWSemantics|HW_Flag_LowMaskedOperation)
Expand Down Expand Up @@ -461,6 +471,10 @@ HARDWARE_INTRINSIC(Sve2, PolynomialMultiplyWideningEven,
HARDWARE_INTRINSIC(Sve2, PolynomialMultiplyWideningOdd, -1, 2, {INS_invalid, INS_invalid, INS_invalid, INS_sve_pmullt, INS_invalid, INS_invalid, INS_invalid, INS_sve_pmullt, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable)
HARDWARE_INTRINSIC(Sve2, ReciprocalEstimate, -1, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_urecpe, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve2, ReciprocalSqrtEstimate, -1, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_ursqrte, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve2, SaturatingExtractNarrowingLower, -1, 1, {INS_sve_sqxtnb, INS_sve_uqxtnb, INS_sve_sqxtnb, INS_sve_uqxtnb, INS_sve_sqxtnb, INS_sve_uqxtnb, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable)
HARDWARE_INTRINSIC(Sve2, SaturatingExtractNarrowingUpper, -1, 2, {INS_sve_sqxtnt, INS_sve_uqxtnt, INS_sve_sqxtnt, INS_sve_uqxtnt, INS_sve_sqxtnt, INS_sve_uqxtnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve2, SaturatingExtractUnsignedNarrowingLower, -1, 1, {INS_invalid, INS_sve_sqxtunb, INS_invalid, INS_sve_sqxtunb, INS_invalid, INS_sve_sqxtunb, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable)
HARDWARE_INTRINSIC(Sve2, SaturatingExtractUnsignedNarrowingUpper, -1, 2, {INS_invalid, INS_sve_sqxtunt, INS_invalid, INS_sve_sqxtunt, INS_invalid, INS_sve_sqxtunt, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve2, Scatter16BitNarrowingNonTemporal, -1, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_stnt1h, INS_sve_stnt1h, INS_sve_stnt1h, INS_sve_stnt1h, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_ExplicitMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve2, Scatter16BitWithByteOffsetsNarrowingNonTemporal, -1, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_stnt1h, INS_sve_stnt1h, INS_sve_stnt1h, INS_sve_stnt1h, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_ExplicitMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve2, Scatter32BitNarrowingNonTemporal, -1, -1, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_stnt1w, INS_sve_stnt1w, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialCodeGen|HW_Flag_ExplicitMaskedOperation|HW_Flag_LowMaskedOperation)
Expand Down
Loading
Loading