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Set minimum ISAs when compiling native code #130556

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130f254
Set minimum ISAs when compiling native code
MichalPetryka Jul 11, 2026
5f5f5ca
Update compile options for target architectures
MichalPetryka Jul 11, 2026
cf6c6ad
Fix syntax for add_compile_options in CMake
MichalPetryka Jul 11, 2026
115e220
Apply suggestion from @am11
jkotas Jul 13, 2026
a6febbe
Merge remote-tracking branch 'upstream/main' into patch-67
MichalPetryka Jul 21, 2026
96a87b3
Move code and enable define
MichalPetryka Jul 21, 2026
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67 changes: 41 additions & 26 deletions eng/native/configurecompiler.cmake
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Original file line number Diff line number Diff line change
Expand Up @@ -24,9 +24,9 @@ include(${CMAKE_CURRENT_LIST_DIR}/configureoptimization.cmake)
if(CLR_CMAKE_TARGET_BROWSER AND DEFINED TRYRUN_BROWSER_EMSCRIPTEN_VERSION)
file(READ "${CMAKE_CURRENT_LIST_DIR}/../../src/mono/browser/emscripten-version.txt" CURRENT_EMSCRIPTEN_VERSION)
string(STRIP "${CURRENT_EMSCRIPTEN_VERSION}" CURRENT_EMSCRIPTEN_VERSION)

if(NOT TRYRUN_BROWSER_EMSCRIPTEN_VERSION STREQUAL CURRENT_EMSCRIPTEN_VERSION)
message(WARNING
message(WARNING
"Emscripten version mismatch detected!\n"
" Current Emscripten: ${CURRENT_EMSCRIPTEN_VERSION}\n"
" Cached features for: ${TRYRUN_BROWSER_EMSCRIPTEN_VERSION}\n"
Expand Down Expand Up @@ -880,40 +880,55 @@ if(CLR_CMAKE_TARGET_OPENBSD)
endif()

if(CLR_CMAKE_HOST_UNIX_ARM)
if (NOT DEFINED CLR_ARM_FPU_TYPE)
set(CLR_ARM_FPU_TYPE vfpv3)
endif(NOT DEFINED CLR_ARM_FPU_TYPE)

# Because we don't use CMAKE_C_COMPILER/CMAKE_CXX_COMPILER to use clang
# we have to set the triple by adding a compiler argument
add_compile_options(-mthumb)
add_compile_options(-mfpu=${CLR_ARM_FPU_TYPE})
if (NOT DEFINED CLR_ARM_FPU_CAPABILITY)
set(CLR_ARM_FPU_CAPABILITY 0x7)
endif(NOT DEFINED CLR_ARM_FPU_CAPABILITY)
add_definitions(-DCLR_ARM_FPU_CAPABILITY=${CLR_ARM_FPU_CAPABILITY})
add_compile_options(-march=armv7-a)
if(ARM_SOFTFP)
add_definitions(-DARM_SOFTFP)
add_compile_options(-mfloat-abi=softfp)
endif(ARM_SOFTFP)
if (NOT DEFINED CLR_ARM_FPU_TYPE)
set(CLR_ARM_FPU_TYPE vfpv3)
endif(NOT DEFINED CLR_ARM_FPU_TYPE)

# Because we don't use CMAKE_C_COMPILER/CMAKE_CXX_COMPILER to use clang
# we have to set the triple by adding a compiler argument
add_compile_options(-mthumb)
add_compile_options(-mfpu=${CLR_ARM_FPU_TYPE})
if (NOT DEFINED CLR_ARM_FPU_CAPABILITY)
set(CLR_ARM_FPU_CAPABILITY 0x7)
endif(NOT DEFINED CLR_ARM_FPU_CAPABILITY)
add_definitions(-DCLR_ARM_FPU_CAPABILITY=${CLR_ARM_FPU_CAPABILITY})
add_compile_options(-march=armv7-a)
if(ARM_SOFTFP)
add_definitions(-DARM_SOFTFP)
add_compile_options(-mfloat-abi=softfp)
endif(ARM_SOFTFP)
endif(CLR_CMAKE_HOST_UNIX_ARM)

if(CLR_CMAKE_HOST_UNIX_ARMV6)
add_compile_options(-mfpu=vfp)
add_definitions(-DCLR_ARM_FPU_CAPABILITY=0x0)
add_compile_options(-march=armv6zk)
add_compile_options(-mcpu=arm1176jzf-s)
add_compile_options(-mfloat-abi=hard)
add_compile_options(-mfpu=vfp)
add_definitions(-DCLR_ARM_FPU_CAPABILITY=0x0)
add_compile_options(-march=armv6zk)
add_compile_options(-mcpu=arm1176jzf-s)
add_compile_options(-mfloat-abi=hard)
endif(CLR_CMAKE_HOST_UNIX_ARMV6)

if(CLR_CMAKE_HOST_UNIX_RISCV64)
add_compile_options(-march=rv64gc)
add_compile_options(-mabi=lp64d)
endif(CLR_CMAKE_HOST_UNIX_RISCV64)

if(CLR_CMAKE_HOST_UNIX_X86)
add_compile_options(-msse2)
if(CLR_CMAKE_TARGET_ARCH_AMD64)

@jkotas jkotas Jul 21, 2026

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This should not be based on TARGET. It should be based on HOST

if(CLR_CMAKE_HOST_WIN32)
add_compile_options($<$<COMPILE_LANGUAGE:C,CXX>:/arch:SSE4.2>)
else()
add_compile_options(-march=x86-64-v2)
endif()
elseif(CLR_CMAKE_TARGET_ARCH_I386)

@jkotas jkotas Jul 21, 2026

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Nit: This should use consistent style with above - either use if/endif blocks for all arche, or use elseif chain for all arches.

if(CLR_CMAKE_HOST_WIN32)
add_compile_options($<$<COMPILE_LANGUAGE:C,CXX>:/arch:SSE2>)
else()
add_compile_options(-march=x86-64)
endif()
elseif(CLR_CMAKE_TARGET_ARCH_ARM64)
if(CLR_CMAKE_HOST_WIN32)
add_compile_options($<$<COMPILE_LANGUAGE:C,CXX>:/arch:armv8.0+lse>)
add_compile_definitions(LSE_INSTRUCTIONS_ENABLED_BY_DEFAULT)
endif()
endif()

if(CLR_CMAKE_HOST_UNIX)
Expand Down
47 changes: 0 additions & 47 deletions src/coreclr/runtime/arm64/WriteBarriers.asm
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Original file line number Diff line number Diff line change
Expand Up @@ -268,30 +268,11 @@ NotInHeap
;;
LEAF_ENTRY RhpCheckedLockCmpXchg

#ifndef LSE_INSTRUCTIONS_ENABLED_BY_DEFAULT
PREPARE_EXTERNAL_VAR_INDIRECT_W g_cpuFeatures, 16
tbz x16, #ARM64_ATOMICS_FEATURE_FLAG_BIT, CmpXchgRetry
#endif

mov x10, x2
casal x10, x1, [x0] ;; exchange
cmp x2, x10
bne CmpXchgNoUpdate

#ifndef LSE_INSTRUCTIONS_ENABLED_BY_DEFAULT
b DoCardsCmpXchg
CmpXchgRetry
;; Check location value is what we expect.
ldaxr x10, [x0]
cmp x10, x2
bne CmpXchgNoUpdate

;; Current value matches comparand, attempt to update with the new value.
stlxr w12, x1, [x0]
cbnz w12, CmpXchgRetry
#endif

DoCardsCmpXchg
;; We have successfully updated the value of the objectref so now we need a GC write barrier.
;; The following barrier code takes the destination in x0 and the value in x1 so the arguments are
;; already correctly set up.
Expand All @@ -301,12 +282,6 @@ DoCardsCmpXchg
CmpXchgNoUpdate
;; x10 still contains the original value.
mov x0, x10

#ifndef LSE_INSTRUCTIONS_ENABLED_BY_DEFAULT
tbnz x16, #ARM64_ATOMICS_FEATURE_FLAG_BIT, NoBarrierCmpXchg
InterlockedOperationBarrier
NoBarrierCmpXchg
#endif
ret lr

LEAF_END RhpCheckedLockCmpXchg
Expand All @@ -326,25 +301,8 @@ NoBarrierCmpXchg
;;
LEAF_ENTRY RhpCheckedXchg

#ifndef LSE_INSTRUCTIONS_ENABLED_BY_DEFAULT
PREPARE_EXTERNAL_VAR_INDIRECT_W g_cpuFeatures, 16
tbz x16, #ARM64_ATOMICS_FEATURE_FLAG_BIT, ExchangeRetry
#endif

swpal x1, x10, [x0] ;; exchange

#ifndef LSE_INSTRUCTIONS_ENABLED_BY_DEFAULT
b DoCardsXchg
ExchangeRetry
;; Read the existing memory location.
ldaxr x10, [x0]

;; Attempt to update with the new value.
stlxr w12, x1, [x0]
cbnz w12, ExchangeRetry
#endif

DoCardsXchg
;; We have successfully updated the value of the objectref so now we need a GC write barrier.
;; The following barrier code takes the destination in x0 and the value in x1 so the arguments are
;; already correctly set up.
Expand All @@ -354,11 +312,6 @@ DoCardsXchg
;; x10 still contains the original value.
mov x0, x10

#ifndef LSE_INSTRUCTIONS_ENABLED_BY_DEFAULT
tbnz x16, #ARM64_ATOMICS_FEATURE_FLAG_BIT, NoBarrierXchg
InterlockedOperationBarrier
NoBarrierXchg
#endif
ret

LEAF_END RhpCheckedXchg
Expand Down
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