Skip to content

Odroid 3.13.y #56

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
mdrjr merged 26 commits into from
Jul 15, 2014
Merged

Odroid 3.13.y #56

Changes from 1 commit
Commits
Show all changes
26 commits
Select commit Hold shift + click to select a range
f524dad
CHROMIUM: drm/exynos: add support for hdmi audio through alsa soc
Jan 29, 2013
8baf592
drm: remove the default DVI=true, and set hdmi audio plugin
hsnaves Jul 13, 2014
e4a62f8
ASoC: hdmi audio plugin is capable of using up to 8 channels.
hsnaves Jul 13, 2014
9c31693
clk: samsung: added callbacks for PM suspend and resume.
hsnaves Jul 13, 2014
3c28215
clk: samsung: adapted the code for the newly introduced PM callbacks.
hsnaves Jul 13, 2014
d032f3c
clk: samsung: added wait_locktime for PLL clocks.
hsnaves Jul 13, 2014
6a27266
exynos5410: added hdmi audio plugin to the DTS file, and renamed some…
hsnaves Jul 13, 2014
c127918
ASoC: exynos: Issues with the EPLL clock in daisy_max98095.
hsnaves Jul 13, 2014
1ee20c9
exynos5410: Changed the way to initialize clocks (using __clk_lookup …
hsnaves Jul 13, 2014
da37cef
clk: exynos5410: removed unused aliases in the clock definitions.
hsnaves Jul 13, 2014
7b4f014
clk: exynos5410: reorganizing the registers
hsnaves Jul 13, 2014
86a98ba
clk: exynos5410: added PLL register to PM suspend/resume.
hsnaves Jul 13, 2014
d9524dc
clk: exynos5410: Renamed more clocks from sclk_* to mout_*
hsnaves Jul 13, 2014
42fd6c5
clk: exynos5410: Renamed some more clocks.
hsnaves Jul 13, 2014
49f7787
clk: exynos5410: the system freezes after we add the new gate clocks.
hsnaves Jul 13, 2014
aaeed74
clk: exynos5410: with more clocks
hsnaves Jul 13, 2014
009c670
clk: exynos5410: added the last (empty) entry to each PLL clock table.
hsnaves Jul 13, 2014
42241fb
clk: exynos5410: EPLL still had a problem, which is now fixed.
hsnaves Jul 13, 2014
631d5d8
ASoC: exynos: audio seems to be working perfectly for the frequency 4…
hsnaves Jul 13, 2014
c2ef167
clk: exynos5410: added the problematic GATE clocks back, but now with…
hsnaves Jul 13, 2014
0d9df4b
ASoC: We don't need these three clocks anymore.
hsnaves Jul 13, 2014
d6ce42a
clk: exynos5410: Major cleaning up of the file
hsnaves Jul 13, 2014
77dbfdf
clk: exynos5410: Removed SCLK_PWM
hsnaves Jul 14, 2014
f948165
ASoC: HDMI audio is now working.
hsnaves Jul 14, 2014
866e9c1
clk: added extra features to DebugFS representation of the clock tree.
hsnaves Jul 14, 2014
3c519d4
exynos5410: added the sound driver to the default configuration.
hsnaves Jul 14, 2014
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Prev Previous commit
Next Next commit
clk: exynos5410: EPLL still had a problem, which is now fixed.
  • Loading branch information
@hsnaves
hsnaves committed Jul 13, 2014
commit 42241fb23e280467ae5774515fc13b2736de01d5
2 changes: 1 addition & 1 deletion drivers/clk/samsung/clk-exynos5410.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -380,7 +380,7 @@ static const struct samsung_pll_rate_table epll_tbl[] = {
PLL_36XX_RATE(180633600, 301, 5, 3, -3670),
PLL_36XX_RATE( 67737600, 452, 5, 5, -27263),
PLL_36XX_RATE( 49152000, 197, 3, 5, -25690),
PLL_36XX_RATE( 45158400, 181, 3, 5, -24013),
PLL_36XX_RATE( 45158401, 181, 3, 5, -24012),
PLL_36XX_RATE(0, 0, 0, 0, 0),
};

Expand Down