9 calculation instructions add sub and or xor

[mathish06]

No description provided.

[Copilot]

Pull request overview

Adds support for Corewar “calculation” instructions by implementing the missing opcode handlers and wiring them into the VM’s opcode dispatch.

Changes:

• Added implementations for add, sub, and, or, xor instruction handlers.
• Updated the process execution dispatcher to call the new handlers and made instruction fetch wrap safely in memory.
• Registered the new source file in the build and exposed prototypes in the public header.

Reviewed changes

Copilot reviewed 4 out of 4 changed files in this pull request and generated 4 comments.

File	Description
src/instructions/instructions_calc.c	Implements op_add, op_sub, op_and, op_or, op_xor plus argument decoding helpers.
src/core/execute_processes.c	Adds opcode→function dispatch entries for the new instructions; wraps opcode fetch by MEM_SIZE.
Makefile	Builds the newly added instruction source file.
include/corewar.h	Declares new instruction handlers for linking/dispatch.

Comments suppressed due to low confidence (3)

src/instructions/instructions_calc.c:85

• Same issue as op_add: returning early on invalid registers leaves proc->pc unchanged, which can lock the process on the same invalid sub instruction indefinitely. Advance the PC by the full instruction size (5 bytes) even when arguments are invalid.

    if (r1 < 0 || r1 >= REG_NUMBER || r2 < 0 || r2 >= REG_NUMBER)
        return;
    if (r3 < 0 || r3 >= REG_NUMBER)
        return;

src/instructions/instructions_calc.c:124

• Same as op_and: validate types[] against op_tab for or (especially ensuring the 3rd arg is T_REG) and ensure PC advancement matches the actual encoded argument sizes when the coding byte is invalid.

    decode_coding_byte(vm->arena[(proc->pc + 1) % MEM_SIZE], types);
    v1 = get_val(vm, proc, types[0], &pos);
    v2 = get_val(vm, proc, types[1], &pos);
    r3 = vm->arena[pos % MEM_SIZE] - 1;
    if (r3 >= 0 && r3 < REG_NUMBER) {

src/instructions/instructions_calc.c:144

• Same as op_and: validate types[] against op_tab for xor (especially ensuring the 3rd arg is T_REG) and ensure PC advancement matches the actual encoded argument sizes when the coding byte is invalid.

    decode_coding_byte(vm->arena[(proc->pc + 1) % MEM_SIZE], types);
    v1 = get_val(vm, proc, types[0], &pos);
    v2 = get_val(vm, proc, types[1], &pos);
    r3 = vm->arena[pos % MEM_SIZE] - 1;
    if (r3 >= 0 && r3 < REG_NUMBER) {

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