|
7 | 7 | #include "elf/glibc_elf.h" |
8 | 8 | #include "rz_types.h" |
9 | 9 | #include "rz_types_base.h" |
| 10 | +#include "rz_util/rz_assert.h" |
10 | 11 | #include "rz_util/rz_buf.h" |
11 | 12 | #include "rz_util/rz_log.h" |
12 | 13 |
|
@@ -2342,25 +2343,31 @@ static void patch_reloc_riscv(RZ_INOUT RzBuffer *buf_patched, const ut64 patch_a |
2342 | 2343 | case R_RISCV_NONE: |
2343 | 2344 | return; |
2344 | 2345 |
|
2345 | | - case R_RISCV_32: |
| 2346 | + case R_RISCV_32: { |
2346 | 2347 | val = S + A; |
2347 | | - rz_buf_write_ble32_at(buf_patched, patch_addr, val, big_endian); |
| 2348 | + bool success = rz_buf_write_ble32_at(buf_patched, patch_addr, val, big_endian); |
| 2349 | + rz_return_if_fail(success); |
2348 | 2350 | break; |
2349 | | - |
2350 | | - case R_RISCV_64: |
| 2351 | + } |
| 2352 | + case R_RISCV_64: { |
2351 | 2353 | val = S + A; |
2352 | | - rz_buf_write_ble64_at(buf_patched, patch_addr, val, big_endian); |
| 2354 | + bool success = rz_buf_write_ble64_at(buf_patched, patch_addr, val, big_endian); |
| 2355 | + rz_return_if_fail(success); |
2353 | 2356 | break; |
2354 | | - |
| 2357 | + } |
2355 | 2358 | case R_RISCV_RELATIVE: |
2356 | 2359 | val = A + B; |
2357 | 2360 | switch (bits) { |
2358 | | - case 32: |
2359 | | - rz_buf_write_ble32_at(buf_patched, patch_addr, val, big_endian); |
| 2361 | + case 32: { |
| 2362 | + bool success = rz_buf_write_ble32_at(buf_patched, patch_addr, val, big_endian); |
| 2363 | + rz_return_if_fail(success); |
2360 | 2364 | break; |
2361 | | - case 64: |
2362 | | - rz_buf_write_ble64_at(buf_patched, patch_addr, val, big_endian); |
| 2365 | + } |
| 2366 | + case 64: { |
| 2367 | + bool success = rz_buf_write_ble64_at(buf_patched, patch_addr, val, big_endian); |
| 2368 | + rz_return_if_fail(success); |
2363 | 2369 | break; |
| 2370 | + } |
2364 | 2371 | default: |
2365 | 2372 | RZ_LOG_WARN("Unsupported number of bits for R_RISCV_RELATIVE: %d, only 32 bits and 64 bits are supported", bits); |
2366 | 2373 | return; |
@@ -2412,22 +2419,28 @@ static void patch_reloc_riscv(RZ_INOUT RzBuffer *buf_patched, const ut64 patch_a |
2412 | 2419 |
|
2413 | 2420 | case R_RISCV_JUMP_SLOT: |
2414 | 2421 | switch (bits) { |
2415 | | - case 32: |
2416 | | - rz_buf_write_ble32_at(buf_patched, patch_addr, S, big_endian); |
| 2422 | + case 32: { |
| 2423 | + bool success = rz_buf_write_ble32_at(buf_patched, patch_addr, S, big_endian); |
| 2424 | + rz_return_if_fail(success); |
2417 | 2425 | break; |
2418 | | - case 64: |
2419 | | - rz_buf_write_ble64_at(buf_patched, patch_addr, S, big_endian); |
| 2426 | + } |
| 2427 | + case 64: { |
| 2428 | + bool success = rz_buf_write_ble64_at(buf_patched, patch_addr, S, big_endian); |
| 2429 | + rz_return_if_fail(success); |
2420 | 2430 | break; |
| 2431 | + } |
2421 | 2432 | default: |
2422 | 2433 | RZ_LOG_WARN("Unsupported number of bits for R_RISCV_JUMP_SLOT: %d, only 32 bits and 64 bits are supported", bits); |
2423 | 2434 | break; |
2424 | 2435 | } |
2425 | 2436 | break; |
2426 | 2437 |
|
2427 | | - case R_RISCV_32_PCREL: |
| 2438 | + case R_RISCV_32_PCREL: { |
2428 | 2439 | val = S + A - P; |
2429 | | - rz_buf_write_ble32_at(buf_patched, patch_addr, val, big_endian); |
| 2440 | + bool success = rz_buf_write_ble32_at(buf_patched, patch_addr, val, big_endian); |
| 2441 | + rz_return_if_fail(success); |
2430 | 2442 | break; |
| 2443 | + } |
2431 | 2444 |
|
2432 | 2445 | case R_RISCV_GOT_HI20: { |
2433 | 2446 | val = fs->G + fs->GOT + A - P; |
@@ -2506,91 +2519,111 @@ static void patch_reloc_riscv(RZ_INOUT RzBuffer *buf_patched, const ut64 patch_a |
2506 | 2519 | rz_buf_read_ble8_at(buf_patched, patch_addr, &old_val, big_endian); |
2507 | 2520 | ut64 result = ((ut64)old_val) + S + A; |
2508 | 2521 | unsigned long long addr = patch_addr; |
2509 | | - rz_buf_write_ble8_offset(buf_patched, &addr, (ut8)result, big_endian); |
| 2522 | + bool success = rz_buf_write_ble8_offset(buf_patched, &addr, (ut8)result, big_endian); |
| 2523 | + rz_return_if_fail(success); |
2510 | 2524 | break; |
2511 | 2525 | } |
2512 | 2526 |
|
2513 | 2527 | case R_RISCV_ADD16: { |
2514 | 2528 | ut16 old_val = 0; |
2515 | | - rz_buf_read_ble16_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2529 | + bool success = rz_buf_read_ble16_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2530 | + rz_return_if_fail(success); |
2516 | 2531 | ut64 result = ((ut64)old_val) + S + A; |
2517 | | - rz_buf_write_ble16_at(buf_patched, patch_addr, (ut16)result, big_endian); |
| 2532 | + success = rz_buf_write_ble16_at(buf_patched, patch_addr, (ut16)result, big_endian); |
| 2533 | + rz_return_if_fail(success); |
2518 | 2534 | break; |
2519 | 2535 | } |
2520 | 2536 |
|
2521 | 2537 | case R_RISCV_ADD32: { |
2522 | 2538 | ut32 old_val = 0; |
2523 | | - rz_buf_read_ble32_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2539 | + bool success = rz_buf_read_ble32_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2540 | + rz_return_if_fail(success); |
2524 | 2541 | ut64 result = ((ut64)old_val) + S + A; |
2525 | | - rz_buf_write_ble32_at(buf_patched, patch_addr, (ut32)result, big_endian); |
| 2542 | + success = rz_buf_write_ble32_at(buf_patched, patch_addr, (ut32)result, big_endian); |
| 2543 | + rz_return_if_fail(success); |
2526 | 2544 | break; |
2527 | 2545 | } |
2528 | 2546 |
|
2529 | 2547 | case R_RISCV_ADD64: { |
2530 | 2548 | ut64 old_val = 0; |
2531 | | - rz_buf_read_ble64_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2549 | + bool success = rz_buf_read_ble64_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2550 | + rz_return_if_fail(success); |
2532 | 2551 | ut64 result = old_val + S + A; |
2533 | | - rz_buf_write_ble64_at(buf_patched, patch_addr, result, big_endian); |
| 2552 | + success = rz_buf_write_ble64_at(buf_patched, patch_addr, result, big_endian); |
| 2553 | + rz_return_if_fail(success); |
2534 | 2554 | break; |
2535 | 2555 | } |
2536 | 2556 |
|
2537 | 2557 | case R_RISCV_SUB8: { |
2538 | 2558 | ut8 old_val = 0; |
2539 | | - rz_buf_read_ble8_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2559 | + bool success = rz_buf_read_ble8_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2560 | + rz_return_if_fail(success); |
2540 | 2561 | ut64 result = ((ut64)old_val) - S - A; |
2541 | 2562 | unsigned long long addr = patch_addr; |
2542 | | - rz_buf_write_ble8_offset(buf_patched, &addr, (ut8)result, big_endian); |
| 2563 | + success = rz_buf_write_ble8_offset(buf_patched, &addr, (ut8)result, big_endian); |
| 2564 | + rz_return_if_fail(success); |
2543 | 2565 | break; |
2544 | 2566 | } |
2545 | 2567 |
|
2546 | 2568 | case R_RISCV_SUB16: { |
2547 | 2569 | ut16 old_val = 0; |
2548 | | - rz_buf_read_ble16_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2570 | + bool success = rz_buf_read_ble16_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2571 | + rz_return_if_fail(success); |
2549 | 2572 | ut64 result = ((ut64)old_val) - S - A; |
2550 | | - rz_buf_write_ble16_at(buf_patched, patch_addr, (ut16)result, big_endian); |
| 2573 | + success = rz_buf_write_ble16_at(buf_patched, patch_addr, (ut16)result, big_endian); |
| 2574 | + rz_return_if_fail(success); |
2551 | 2575 | break; |
2552 | 2576 | } |
2553 | 2577 |
|
2554 | 2578 | case R_RISCV_SUB32: { |
2555 | 2579 | ut32 old_val = 0; |
2556 | | - rz_buf_read_ble32_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2580 | + bool success = rz_buf_read_ble32_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2581 | + rz_return_if_fail(success); |
2557 | 2582 | ut64 result = ((ut64)old_val) - S - A; |
2558 | | - rz_buf_write_ble32_at(buf_patched, patch_addr, (ut32)result, big_endian); |
| 2583 | + success = rz_buf_write_ble32_at(buf_patched, patch_addr, (ut32)result, big_endian); |
| 2584 | + rz_return_if_fail(success); |
2559 | 2585 | break; |
2560 | 2586 | } |
2561 | 2587 |
|
2562 | 2588 | case R_RISCV_SUB64: { |
2563 | 2589 | ut64 old_val = 0; |
2564 | | - rz_buf_read_ble64_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2590 | + bool success = rz_buf_read_ble64_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2591 | + rz_return_if_fail(success); |
2565 | 2592 | ut64 result = ((ut64)old_val) - S - A; |
2566 | | - rz_buf_write_ble64_at(buf_patched, patch_addr, result, big_endian); |
| 2593 | + success = rz_buf_write_ble64_at(buf_patched, patch_addr, result, big_endian); |
| 2594 | + rz_return_if_fail(success); |
2567 | 2595 | break; |
2568 | 2596 | } |
2569 | 2597 |
|
2570 | 2598 | case R_RISCV_SET8: { |
2571 | 2599 | val = S + A; |
2572 | 2600 | unsigned long long addr = patch_addr; |
2573 | | - rz_buf_write_ble8_offset(buf_patched, &addr, (ut8)val, big_endian); |
| 2601 | + bool success = rz_buf_write_ble8_offset(buf_patched, &addr, (ut8)val, big_endian); |
| 2602 | + rz_return_if_fail(success); |
2574 | 2603 | break; |
2575 | 2604 | } |
2576 | 2605 | case R_RISCV_SET16: { |
2577 | 2606 | val = S + A; |
2578 | | - rz_buf_write_ble16_at(buf_patched, patch_addr, (ut16)val, big_endian); |
| 2607 | + bool success = rz_buf_write_ble16_at(buf_patched, patch_addr, (ut16)val, big_endian); |
| 2608 | + rz_return_if_fail(success); |
2579 | 2609 | break; |
2580 | 2610 | } |
2581 | 2611 | case R_RISCV_SET32: { |
2582 | 2612 | val = S + A; |
2583 | | - rz_buf_write_ble32_at(buf_patched, patch_addr, (ut32)val, big_endian); |
| 2613 | + bool success = rz_buf_write_ble32_at(buf_patched, patch_addr, (ut32)val, big_endian); |
| 2614 | + rz_return_if_fail(success); |
2584 | 2615 | break; |
2585 | 2616 | } |
2586 | 2617 |
|
2587 | 2618 | case R_RISCV_SET6: |
2588 | 2619 | case R_RISCV_SUB6: { |
2589 | 2620 | ut8 old_val = 0; |
2590 | | - rz_buf_read_ble8_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2621 | + bool success = rz_buf_read_ble8_at(buf_patched, patch_addr, &old_val, big_endian); |
| 2622 | + rz_return_if_fail(success); |
2591 | 2623 | val = S + A; |
2592 | 2624 | ut8 result = (rel_type == R_RISCV_SET6) ? val : ((old_val & 0x3F) - val); |
2593 | | - rz_buf_write_ble8_at(buf_patched, patch_addr, (old_val & 0xC0) | (result & 0x3F), big_endian); |
| 2625 | + success = rz_buf_write_ble8_at(buf_patched, patch_addr, (old_val & 0xC0) | (result & 0x3F), big_endian); |
| 2626 | + rz_return_if_fail(success); |
2594 | 2627 | break; |
2595 | 2628 | } |
2596 | 2629 |
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