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Is there a reason for forcing an SPI read after a SPI write? #62

@therealprof

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@therealprof

In

https://github.com/japaric/embedded-hal/blob/23ee5d244d7a4eba619ef4d1e08a38e5c05f8987/src/blocking/spi.rs#L60

there's a forced data read after the write which may block forever if there's no data clocked in on the MISO line. Is there a reason for this or just an oversight?

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