Register tensors with symmetric memory for qwen#18643
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ispobock merged 2 commits intosgl-project:mainfrom Feb 20, 2026
Merged
Register tensors with symmetric memory for qwen#18643ispobock merged 2 commits intosgl-project:mainfrom
ispobock merged 2 commits intosgl-project:mainfrom
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hlu1
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Feb 11, 2026
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Please add perf benchmark numbers |
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Symmetric Memory Benchmark: Qwen3-Next-80B-A3B-Thinking-FP8 on 4x GB200TP4 ConfigurationServer (symm-mem enabled): python -m sglang.launch_server --model Qwen/Qwen3-Next-80B-A3B-Thinking-FP8 --tp 4 --max-running-requests 1024 --chunked-prefill-size 8192 --mem-fraction-static 0.8 --disable-radix-cache --mamba-ssm-dtype float32 --fp8-gemm-backend flashinfer_trtllm --attention-backend trtllm_mha --cuda-graph-max-bs=1024 --enable-symm-memServer (symm-mem disabled): same as above without Client: python3 -m sglang.bench_one_batch_server --model-path Qwen/Qwen3-Next-80B-A3B-Thinking-FP8 --dataset-name random --input-len 1024 --output-len 1024 --batch-size 1024 512 128 --base-url http://127.0.0.1:30000
DEP4 ConfigurationServer (symm-mem enabled): python3 -m sglang.launch_server --model Qwen/Qwen3-Next-80B-A3B-Thinking-FP8 --disable-radix-cache --attention-backend trtllm_mha --tp-size 4 --ep 4 --cuda-graph-max-bs 512 --enable-dp-attention --dp 4 --stream-interval 10 --mem-fraction-static 0.9 --max-running-requests 2048 --enable-dp-lm-head --mamba-ssm-dtype float32 --fp8-gemm-backend flashinfer_trtllm --chunked-prefill-size 8192 --enable-symm-memServer (symm-mem disabled): same as above without Client: python3 -m sglang.bench_one_batch_server --model-path Qwen/Qwen3-Next-80B-A3B-Thinking-FP8 --dataset-name random --input-len 1024 --output-len 1024 --batch-size 2048 --base-url http://127.0.0.1:30000
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hlu1
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Feb 18, 2026
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/tag-and-rerun-ci |
ispobock
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Feb 20, 2026
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Motivation
Perform add op in-place so that the MoE output still belongs to the symmetric memory pool (when symm mem is enabled).
Modifications
Accuracy Tests
Benchmarking and Profiling
Checklist
Review Process
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