Sub-board infrastructure with export-tap#486
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This reverts commit b4168b8.
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Pull request overview
Introduces SubboardBlock and WrapperSubboardBlock Block subclasses as infrastructure for sub-board partitioning. Adds an "export-tap" mechanism (a non-propagating Export variant compatible with existing connections on the exterior port) at the proto/compiler/HDL level, refactors Vl53l0xConnector and PololuA4988 from the old WrapperFootprintBlock (now removed) to the new infrastructure, and bumps the EDG proto version from 11 → 12.
Changes:
- New
ExportedExpr.tapproto field plus compiler support: non-propagating semantics, validity check pass (ExportTapCheck), andBoardScopedTransformbase class to scope netlisting/refdes assignment per board. - New
SubboardBlock/WrapperSubboardBlockPython classes withexport_tapandBlock(..., external=True)API; removedWrapperFootprintBlock. - Refactored
PololuA4988andVl53l0xConnectorconsumers, plus updated reference netlists/svgpcb outputs; replaced ScalaBlockConnectivityAnalysisand Pythontest_netlist_wrapper.pywith new subboard tests.
Reviewed changes
Copilot reviewed 27 out of 28 changed files in this pull request and generated 4 comments.
Show a summary per file
| File | Description |
|---|---|
| proto/edgir/expr.proto | Add tap bool to ExportedExpr. |
| edg/edgir/expr_pb2.py, .pyi | Regenerated protobuf bindings for tap field. |
| edg/hdl_server/main.py | Bump EDG_PROTO_VERSION to 12. |
| edg/electronics_model/SubboardBlock.py | New SubboardBlock/WrapperSubboardBlock with export_tap. |
| edg/electronics_model/BoardScopedTransform.py | New base transform tracking per-block board scope. |
| edg/electronics_model/NetlistGenerator.py | Switch to BoardScopedTransform; assert single board. |
| edg/electronics_model/RefdesRefinementPass.py | Switch to BoardScopedTransform. |
| edg/electronics_model/init.py | Export new classes; remove WrapperFootprintBlock. |
| edg/electronics_model/test_netlist_wrapper.py | Deleted; replaced by new tests. |
| edg/electronics_model/test_netlist_subboard.py | New tests for WrapperSubboardBlock. |
| edg/electronics_model/test_netlist_subboard_array.py | New array-port wrapper tests. |
| edg/parts/StepperDriver_A4988.py | Refactor PololuA4988 to WrapperSubboardBlock. |
| edg/parts/Distance_Vl53l0x.py | Refactor Vl53l0xConnector to WrapperSubboardBlock. |
| compiler/.../Compiler.scala | Plumb tap through connect elaboration; bump expected proto version to 12. |
| compiler/.../ExportTapCheck.scala | New design-map pass validating tap-export constraints. |
| compiler/.../ExprToString.scala | Pretty-print tap exports. |
| compiler/.../ElemBuilder.scala | Add tap arg to Exported/ExportedArray builders. |
| compiler/test/.../ExportTapTest.scala | New tap-export tests. |
| compiler/test/.../ExportTunnelTest.scala | Renamed TunnelExportTest → ExportTunnelTest. |
| compiler/test/.../CompilerTestUtil.scala | Run ExportTapCheck in test harness. |
| compiler/.../BlockConnectivityAnalysis.scala, test | Deleted (unused). |
| examples/RobotDriver, PcbBot (.net.ref, .svgpcb.js) | Updated reference outputs reflecting new edg paths/values. |
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| from typing import List, Tuple, override, Any | ||
| from typing_extensions import TypeVar |
| @@ -0,0 +1,66 @@ | |||
| from typing import Optional, Dict, List, cast, override | |||
| self.export_tap(self.reset, self.wrapper.reset) | ||
| self.export_tap(self.sleep, self.wrapper.sleep) | ||
| self.export_tap(self.enable, self.wrapper.enable) | ||
| self.export_tap(self.reset, self.wrapper.reset) |
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| fp_external_blocks = self._design.get_value(context.path.to_tuple() + ("fp_external_blocks",)) | ||
| assert isinstance(fp_external_blocks, list) | ||
| external_blocks: Optional[List[str]] = cast(List[str], fp_external_blocks) |
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Adds a SubblockBoard and WrapperSubblockBoard Block subclasses which have their internal implementation (links and blocks) in a separate board (or in the Wrapper case, discarded - the internal implementation is for electronics modeling only). Blocks marked as external can be used for, for example, connectors that sit on the carrier board.
Implementation-wise, this adds an export-tap construct, an export (or export-array) construct that does not propagate parameters but can be hooked onto exterior ports that have other exports (including export-taps). A compiler check pass checks that inner ports do not have defined parameters (are empty) and (in the array case) elements are equal.
Refactors A4988 and VL53L0x connectors to use this new infrastructure instead of the older WrapperFootprintBlock. which is removed.
Infrastructure towards #367, #389
Future PRs will: