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[https://nvbugs/5863443][fix] Fix message truncation in Helix CP cache transmission - #11252

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brb-nv:user/brb/fix-helix-cache-message-truncate
Feb 5, 2026
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[https://nvbugs/5863443][fix] Fix message truncation in Helix CP cache transmission#11252
brb-nv merged 1 commit into
NVIDIA:release/1.2from
brb-nv:user/brb/fix-helix-cache-message-truncate

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@brb-nv brb-nv commented Feb 4, 2026

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Description

This MR fixes https://nvbugs/5863443.

Issue

Cache transmission fails with certain disaggregated serving configurations, specifically when using high context PP (e.g., ctx_PP=4) with generation-side CP (e.g., gen_TP=2, gen_CP=2). The failure manifests as:

  • Message truncated errors in DataRequester .
  • std::bad_cast exception during KV cache receive.

Root Cause

  • The cacheIdx calculation in MLACacheFormatter::format() incorrectly assumed connection ordering. Connections from targetIRanks() are ordered CP-major (all connections for CP=0, then CP=1, etc.), but cacheIdx was computed as processIdx % (pPDomainSize * cPDomainSize), which doesn't account for this ordering.

Fix

// Before (incorrect):
auto cacheIdx = processIdx % (pPDomainSize * cPDomainSize);

// After (correct):
auto connectionsPerCPDomain = connections.size() / cPDomainSize;
auto cpDomainIdx = processIdx / connectionsPerCPDomain;
auto ppDomainIdx = (processIdx % connectionsPerCPDomain) % pPDomainSize;
auto cacheIdx = cpDomainIdx * pPDomainSize + ppDomainIdx;

Test Coverage

$ TRTLLM_USE_UCX_KVCACHE=1 mpirun -n 8 ./tests/unit_tests/multi_gpu/cacheTransceiverTest --gtest_filter="AsymmetricCaseTest*WithCPForMLAUnevenLayer*"

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Summary by CodeRabbit

  • Bug Fixes

    • Improved cache index computation with CP-aware ordering for multi-GPU environments.
    • Enhanced rank calculation logic in distributed multi-dimensional MPI setups.
  • Tests

    • Expanded test coverage for asymmetric cache configurations and uneven layer distributions.
    • Updated test diagnostics with improved debugging context.

@brb-nv
brb-nv requested a review from a team as a code owner February 4, 2026 02:34
…e transmission

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
@brb-nv
brb-nv force-pushed the user/brb/fix-helix-cache-message-truncate branch from 7f4e9db to ed6919d Compare February 4, 2026 02:36
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brb-nv requested a review from chuangz0 February 4, 2026 02:37
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📝 Walkthrough

Walkthrough

Changes refactor cache indexing in the MLA cache formatter to use CP-major ordering instead of modulo-based indexing. Related test updates adjust rank calculation logic and add multiple new parameterized test instantiations for asymmetric cache scenarios with uneven layer distributions.

Changes

Cohort / File(s) Summary
Cache Indexing Logic
cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp
Replaces cache index calculation with CP-major ordering aware computation. Derives cpDomainIdx from processIdx, derives ppDomainIdx from within-CP-domain position, and computes cacheIdx as cpDomainIdx \* pPDomainSize + ppDomainIdx. Adds validation for connectionsPerCPDomain > 0 and documents CP-major and PP-domain ordering intent.
Test Framework Updates
cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
Reorders multi-dimensional MPI rank calculations: mCpRank now computed first as mRankInInstance % mCpSize, mTpRank as (mRankInInstance / mCpSize) % mTpSize. Updates assertion messages to include WorldRank and CpRank. Adds four new asymmetric test instantiations with uneven layer distributions (AsymmetricCaseTest0/1/2WithCPForMLAUnevenLayer and related variants).

Estimated code review effort

🎯 3 (Moderate) | ⏱️ ~22 minutes

🚥 Pre-merge checks | ✅ 2 | ❌ 1
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✅ Passed checks (2 passed)
Check name Status Explanation
Title check ✅ Passed The title clearly and specifically describes the fix: correcting message truncation in Helix CP cache transmission, directly matching the main change in the changeset.
Description check ✅ Passed The description comprehensively covers the issue, root cause, and fix with code examples, test coverage command, and completed PR checklist items as required by the template.

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Actionable comments posted: 1

🤖 Fix all issues with AI agents
In `@cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp`:
- Around line 252-270: The CP-major mapping can produce out-of-range cacheIdx
when connections.size() isn't divisible by cPDomainSize or when
connectionsPerCPDomain isn't divisible by pPDomainSize; in sendBufferFun compute
connectionsPerCPDomain as const, then add explicit checks that
connections.size() % cPDomainSize == 0 and connectionsPerCPDomain % pPDomainSize
== 0 (or otherwise validate cpDomainIdx and cacheIdx against
outputSplitCaches.size()) and bail/log if they fail, and mark cpDomainIdx,
ppDomainIdx and cacheIdx as const to follow immutability guidelines.

Comment thread cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp
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brb-nv commented Feb 4, 2026

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/bot run --disable-fail-fast

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brb-nv commented Feb 4, 2026

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/bot run --disable-fail-fast

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PR_Github #34831 [ run ] triggered by Bot. Commit: ed6919d

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PR_Github #34831 [ run ] completed with state SUCCESS. Commit: ed6919d
/LLM/release-1.2/L0_MergeRequest_PR pipeline #321 completed with status: 'FAILURE'

⚠️ Action Required:

  • Please check the failed tests and fix your PR
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  • Once fixed, request an NVIDIA team member to trigger CI again

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/bot run --disable-fail-fast

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PR_Github #34855 [ run ] triggered by Bot. Commit: ed6919d

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PR_Github #34855 [ run ] completed with state SUCCESS. Commit: ed6919d
/LLM/release-1.2/L0_MergeRequest_PR pipeline #324 completed with status: 'FAILURE'

⚠️ Action Required:

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/bot run --disable-fail-fast

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PR_Github #34914 [ run ] triggered by Bot. Commit: ed6919d

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PR_Github #34914 [ run ] completed with state SUCCESS. Commit: ed6919d
/LLM/release-1.2/L0_MergeRequest_PR pipeline #332 completed with status: 'SUCCESS'

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brb-nv merged commit 1d875d8 into NVIDIA:release/1.2 Feb 5, 2026
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dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Feb 23, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Feb 23, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Feb 23, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Feb 23, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Feb 23, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Feb 23, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Feb 23, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
schetlur-nv pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Feb 23, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
mikeiovine pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Feb 23, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
Signed-off-by: Mike Iovine <miovine@nvidia.com>
mikeiovine pushed a commit that referenced this pull request Feb 24, 2026
…e transmission (#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
Signed-off-by: Mike Iovine <miovine@nvidia.com>
dominicshanshan pushed a commit to dominicshanshan/TensorRT-LLM that referenced this pull request Mar 9, 2026
…e transmission (NVIDIA#11252)

Signed-off-by: Balaram Buddharaju <169953907+brb-nv@users.noreply.github.com>
Signed-off-by: Wangshanshan <30051912+dominicshanshan@users.noreply.github.com>
Signed-off-by: Mike Iovine <miovine@nvidia.com>
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