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[https://nvbugs/6402048][fix] Mirror MXFP4's pattern in MXFP8CutlassFusedMoEMethod — round… - #15846

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[https://nvbugs/6402048][fix] Mirror MXFP4's pattern in MXFP8CutlassFusedMoEMethod — round…#15846
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tensorrt-cicd:repair-bot-bug6402048

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@trtllm-agent trtllm-agent commented Jul 1, 2026

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Summary

  • Root cause: MXFP8CutlassFusedMoEMethod.create_weights hard-asserted intermediate_size_per_partition % 128 == 0, which breaks whenever moe_tp_size > 1 shards a non-128-aligned intermediate axis (e.g. Qwen1.5-MoE-A2.7B intermediate_size=1408 with TTP moe_tp_size=4 gives 352).
  • Fix: Mirror MXFP4's pattern in MXFP8CutlassFusedMoEMethod — round intermediate_size_per_partition up to weight_alignment for storage, and override load_expert_w{3_w1,2}_weight plus pad-before-shard in load_quant_scales so per-shard e4m3 weights and UE8M0 SF tensors land aligned; padded entries are zeros so reduce-scatter output matches the unpadded reference.
  • Automated fix generated by repair-bot

Test plan

  • Verify fix on the same GPU type as the original failure
  • Check for regressions in related tests

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Summary by CodeRabbit

  • Bug Fixes

    • Improved handling of expert weight and scale loading so tensor shapes are aligned consistently, reducing the chance of shape-related issues during model loading and sharding.
    • Updated scale loading behavior to better match padded weight layouts for more reliable mixed-precision MoE execution.
  • Tests

    • Removed a test skip entry, so one previously waived MoE test selection will now run again.

@trtllm-agent
trtllm-agent requested a review from a team as a code owner July 1, 2026 17:28
@trtllm-agent
trtllm-agent requested a review from xxi-nv July 1, 2026 17:28
…ate for TP

`MXFP8CutlassFusedMoEMethod.create_weights` asserted
`intermediate_size_per_partition % 128 == 0`, which fails whenever
`moe_tp_size > 1` shards a non-128-aligned intermediate axis (e.g.
Qwen1.5-MoE-A2.7B: intermediate_size=1408 with TTP moe_tp_size=4 gives
352, breaking the UE8M0 int32 SF packing constraint).

Mirror the auto-padding pattern already used by
`MXFP4WeightFusedMoEMethod` (create_weights + pad-before-shard in
load_expert_w{3_w1,2}_weight): round `intermediate_size_per_partition`
up to the 128 weight_alignment (with lcm(weight_alignment, tp_size,
scaling_vector_size) via `_get_weight_alignment`), pad the source
weight and scale tensors before sharding, and allocate storage for the
padded shape. Padded rows/columns are zeros so their reduce-scatter/
all-reduce contribution to the final output is zero, preserving the
reference computation on unpadded slots.

Signed-off-by: trtllm-agent <296075020+trtllm-agent@users.noreply.github.com>
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trtllm-agent force-pushed the repair-bot-bug6402048 branch from 7ed4a7c to 154e60f Compare July 1, 2026 17:37
@coderabbitai

coderabbitai Bot commented Jul 1, 2026

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📝 Walkthrough

Walkthrough

MXFP8 Cutlass fused-MoE weight and scale-factor loading now pads the intermediate-size axis to a computed alignment before buffer allocation and before sharding checkpoint tensors, affecting create_weights, load_expert_w3_w1_weight, load_expert_w2_weight, and load_quant_scales. A test waiver entry was also removed.

Changes

MXFP8 padding alignment

Layer / File(s) Summary
Padded weight/scale allocation and loading overrides
tensorrt_llm/_torch/modules/fused_moe/quantization.py
create_weights rounds intermediate_size_per_partition up to weight_alignment for both w3_w1 and w2 weight/scale buffers; load_expert_w3_w1_weight/load_expert_w2_weight pad checkpoint tensors to per-shard alignment before delegating to base sharding logic.
Padded scale loading in load_quant_scales
tensorrt_llm/_torch/modules/fused_moe/quantization.py
load_quant_scales pads w1_sf/w3_sf and w2_sf tensors to computed alignment before column/row sharding, replacing direct unpadded shard loads.

Test waiver cleanup

Layer / File(s) Summary
Removed obsolete waiver entry
tests/integration/test_lists/waives.txt
Removes the skip waiver for test_configurable_moe_multi_gpu with the CUTLASS -k filter.

Estimated code review effort: 4 (Complex) | ~45 minutes

Possibly related PRs

  • NVIDIA/TensorRT-LLM#15825: Both PRs edit tests/integration/test_lists/waives.txt for the same test_configurable_moe_multi_gpu waiver entry, one adding/updating it and this one removing it.

Suggested reviewers: taylor-yb-lee, nvchenghaoz, yingguo-trt

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🧪 Generate unit tests (beta)
  • Create PR with unit tests

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@xxi-nv

xxi-nv commented Jul 2, 2026

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Superseded by #15865, which takes a test-skip route (adding QuantAlgo.MXFP8 to should_skip_cutlass's tp_alignment_quants) consistent with how the sibling non-128-aligned quant algos (W8A16 / NVFP4 / W4A8_AWQ) are already handled, instead of an in-kernel padding change. Closing this one.

@xxi-nv xxi-nv closed this Jul 2, 2026
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