[https://nvbugs/6402048][test] Skip MXFP8 CUTLASS MoE with non-128-aligned per-shard intermediate - #15865
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📝 WalkthroughWalkthroughThis PR modifies the ChangesMoE CUTLASS Skip Logic and Waiver Update
Estimated code review effort: 2 (Simple) | ~10 minutes Possibly related PRs
Suggested reviewers: 🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
✨ Finishing Touches🧪 Generate unit tests (beta)
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…per-shard failure MXFP8CutlassFusedMoEMethod.create_weights hard-asserts intermediate_size_per_partition % 128 == 0 for its int32 UE8M0 SF packing. When moe_tp_size > 1 shards a non-128-aligned intermediate axis (e.g. Qwen1.5-MoE-A2.7B intermediate_size=1408 with TTP/DTP moe_tp_size=4 gives per-shard 352), the assertion raises and test_configurable_moe_multi_gpu fails. Changes: - should_skip_cutlass: add QuantAlgo.MXFP8 to tp_alignment_quants so non-128-aligned per-shard MXFP8 configs are skipped at param-gen time, matching W8A16 / NVFP4 / W4A8_AWQ. Non-sharded non-aligned sizes (e.g. GPT-OSS 2880) are already covered by get_quick_skip_reason; plain FP8 (no alignment assertion) is unaffected. - waives.txt: remove the now-redundant SKIP entry for this test. - l0_dgx_b200.yml post-merge: add 'and not MXFP8' so that selector stays on plain FP8 QDQ as its comment intends. - l0_dgx_b200.yml pre-merge: add an explicit 'CUTLASS and MXFP8 and not W4A8' entry so aligned MXFP8 configs (DeepSeek-V4/boundary all modes, Qwen1.5 EP modes) get real coverage while non-aligned ones auto-skip. Signed-off-by: xxi <xxi@nvidia.com>
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…igned per-shard intermediate (NVIDIA#15865) Signed-off-by: xxi <xxi@nvidia.com>
Description
MXFP8CutlassFusedMoEMethod.create_weightshard-assertsintermediate_size_per_partition % 128 == 0for its int32 UE8M0 scale-factor packing. Whenmoe_tp_size > 1shards a non-128-aligned intermediate axis — e.g. Qwen1.5-MoE-A2.7Bintermediate_size=1408with TTP/DTPmoe_tp_size=4gives per-shard352— the assertion raises andtest_configurable_moe_multi_gpu -k "CUTLASS and FP8 and not FP8_BLOCK_SCALES and not W4A8"fails (nvbugs/6402048). The post-merge selector was matchingMXFP8via theFP8substring even though it was intended for plain FP8 QDQ.Changes
should_skip_cutlass— addQuantAlgo.MXFP8totp_alignment_quants, so non-128-aligned per-shard MXFP8 configs are skipped at parameter-generation time, matchingW8A16/NVFP4/W4A8_AWQ.waives.txt— remove the now-redundant SKIP entry (the case no longer reaches collection).l0_dgx_b200.ymlpost-merge — addand not MXFP8to theCUTLASS and FP8 ...selector so it stays on plain FP8 QDQ, as its comment intends.l0_dgx_b200.ymlpre-merge — add an explicitCUTLASS and MXFP8 and not W4A8entry so aligned MXFP8 configs get real coverage.Scope check
352, now skipped (the failing case). EP modes (DEP/TEP, unsharded 1408) still run.512/128aligned).get_quick_skip_reason.FP8QDQFusedMoEMethodhas no alignment assertion; unaffected.can_implement(MXFP8 needs SM100/103); B300 uses detailed test-ids that don't include MXFP8. Neither needs changes.Test Coverage
unittest/_torch/modules/moe/test_moe_module.py::test_configurable_moe_multi_gpuNotes
Supersedes repair-bot PR #15846 (in-kernel padding fix); this takes the lighter test-skip route consistent with the sibling non-128-aligned quant algos.